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Biswapriyo Nath
0a586c2c8e arm64: dts: qcom: sm6125: Add PRNG node 
Add a node for the PRNG to enable hardware accelerated pseudo random
number generation.

Signed-off-by: Biswapriyo Nath <nathbappai@gmail.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20260121-xiaomi-ginkgo-features-v2-2-fb3ee94922d0@gmail.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
 2026-03-26 09:40:34 -05:00
Biswapriyo Nath
c0580b57a3 arm64: dts: qcom: sm6125-xiaomi-ginkgo: Fix volume up button 
gpio6 in pm6125 is used for EMMC and UFS thermal monitoring. It is
changed to the correct gpio for volume up button.

Fixes: 9b1a6c925c ("arm64: dts: qcom: sm6125: Initial support for xiaomi-ginkgo")
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Signed-off-by: Biswapriyo Nath <nathbappai@gmail.com>
Link: https://lore.kernel.org/r/20260121-xiaomi-ginkgo-features-v2-1-fb3ee94922d0@gmail.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
 2026-03-26 09:40:34 -05:00
Nihal Kumar Gupta
95b97fe010 arm64: dts: qcom: monaco-evk-camera: Add DT overlay 
Monaco EVK board does not include a camera sensor in its default hardware
configuration. Introducing a device tree overlay to support optional
integration of the IMX577 sensor via CSIPHY1.

Camera reset is handled through an I2C expander, and power is enabled
via TLMM GPIO74.

An example media-ctl pipeline for the imx577 is:

media-ctl --reset
media-ctl -V '"imx577 3-001a":0[fmt:SRGGB10/4056x3040 field:none]'
media-ctl -V '"msm_csiphy1":0[fmt:SRGGB10/4056x3040]'
media-ctl -V '"msm_csid0":0[fmt:SRGGB10/4056x3040]'
media-ctl -V '"msm_vfe0_rdi0":0[fmt:SRGGB10/4056x3040]'
media-ctl -l '"msm_csiphy1":1->"msm_csid0":0[1]'
media-ctl -l '"msm_csid0":1->"msm_vfe0_rdi0":0[1]'
yavta -B capture-mplane -c -I -n 5 -f SRGGB10P -s 4056x3040 -F /dev/video1

Co-developed-by: Ravi Shankar <quic_rshankar@quicinc.com>
Signed-off-by: Ravi Shankar <quic_rshankar@quicinc.com>
Co-developed-by: Vishal Verma <quic_vishverm@quicinc.com>
Signed-off-by: Vishal Verma <quic_vishverm@quicinc.com>
Signed-off-by: Nihal Kumar Gupta <quic_nihalkum@quicinc.com>
Reviewed-by: Vladimir Zapolskiy <vladimir.zapolskiy@linaro.org>
Reviewed-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20260213132058.521474-6-quic_nihalkum@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
 2026-03-26 09:40:34 -05:00
Nihal Kumar Gupta
66e70dea65 arm64: dts: qcom: monaco-evk: Add camera AVDD regulators 
Define three fixed regulators for camera AVDD rails, each gpio-controlled
with corresponding pinctrl definitions.

Signed-off-by: Nihal Kumar Gupta <quic_nihalkum@quicinc.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Reviewed-by: Vladimir Zapolskiy <vladimir.zapolskiy@linaro.org>
Link: https://lore.kernel.org/r/20260213132058.521474-5-quic_nihalkum@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
 2026-03-26 09:40:34 -05:00
Nihal Kumar Gupta
14733a228b arm64: dts: qcom: monaco: Add camera MCLK pinctrl 
Define pinctrl definitions to enable camera master clocks on Monaco.

Signed-off-by: Nihal Kumar Gupta <quic_nihalkum@quicinc.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Reviewed-by: Vladimir Zapolskiy <vladimir.zapolskiy@linaro.org>
Link: https://lore.kernel.org/r/20260213132058.521474-4-quic_nihalkum@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
 2026-03-26 09:40:33 -05:00
Nihal Kumar Gupta
a16f9d5373 arm64: dts: qcom: monaco: Add CCI definitions 
Qualcomm QCS8300 SoC contains three Camera Control Interface (CCI).
Compared to Lemans, the key difference is in SDA/SCL GPIO assignments
and number of CCIs.

Co-developed-by: Ravi Shankar <quic_rshankar@quicinc.com>
Signed-off-by: Ravi Shankar <quic_rshankar@quicinc.com>
Co-developed-by: Vishal Verma <quic_vishverm@quicinc.com>
Signed-off-by: Vishal Verma <quic_vishverm@quicinc.com>
Co-developed-by: Suresh Vankadara <quic_svankada@quicinc.com>
Signed-off-by: Suresh Vankadara <quic_svankada@quicinc.com>
Signed-off-by: Nihal Kumar Gupta <quic_nihalkum@quicinc.com>
Reviewed-by: Vladimir Zapolskiy <vladimir.zapolskiy@linaro.org>
Reviewed-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20260213132058.521474-3-quic_nihalkum@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
 2026-03-26 09:40:33 -05:00
Luca Weiss
9fc67d20c9 arm64: dts: qcom: milos-fairphone-fp6: Add Hall Effect sensor 
Add a node for the Hall Effect sensor, used to detect whether the Flip
Cover is closed or not.

The sensor is powered through vreg_l10b, so let's put a
regulator-always-on on that to make sure the sensor gets power.

Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20260213-fp6-hall-sensor-v2-1-ecd113d4919c@fairphone.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
 2026-03-26 09:40:33 -05:00
Ayushi Makhija
8540abbf33 arm64: dts: qcom: qcs8300-ride: add anx7625 DSI to DP bridge node 
Add anx7625 DSI to DP bridge device node.

Signed-off-by: Ayushi Makhija <quic_amakhija@quicinc.com>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20260217090955.2446470-3-quic_amakhija@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
 2026-03-26 09:40:33 -05:00
Ayushi Makhija
3333dfc08a arm64: dts: qcom: qcs8300: add Display Serial Interface device nodes 
Add device tree nodes for the DSI0 controller with their corresponding
PHY found on Qualcomm QCS8300 SoC.

Signed-off-by: Ayushi Makhija <quic_amakhija@quicinc.com>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20260217090955.2446470-2-quic_amakhija@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
 2026-03-26 09:40:33 -05:00
Luca Weiss
ed9d901253 arm64: dts: qcom: milos: Sort pinctrl subnodes by pins 
As documented in the "Devicetree Sources (DTS) Coding Style" document,
pinctrl subnodes should be sorted by the pins property. Do this once for
milos.dtsi so that future additions can be added at the right places.

Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20260213-milos-pinctrl-sort-v1-1-799bae597074@fairphone.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
 2026-03-26 09:40:32 -05:00
Dmitry Baryshkov
d5574bb935 arm64: dts: qcom: qrb2210-arduino-imola: describe DSI / DP bridge 
Aruino Uno-Q uses Analogix ANX7625 DSI-to-DP bridge to convert DSI
signals to the connected USB-C DisplayPort dongles. Decribe the chip,
USB-C connector and routing of USB and display signals.

Co-developed-by: Martino Facchin <m.facchin@arduino.cc>
Signed-off-by: Martino Facchin <m.facchin@arduino.cc>
Tested-by: Loic Poulain <loic.poulain@oss.qualcomm.com>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20260213-uno-q-anx7625-v2-1-c23359616528@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
 2026-03-26 09:40:32 -05:00
Riccardo Mereu
1a040df09f arm64: dts: qcom: arduino-imola: fix faulty spidev node 
CS pin added on pinctrl0 property is causing spidev to return -ENODEV
since that GPIO is already part of spi5 pinmuxing.

Fixes: 3f745bc0f1 ("arm64: dts: qcom: qrb2210: add dts for Arduino unoq")
Signed-off-by: Riccardo Mereu <r.mereu@arduino.cc>
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20260213101002.105238-1-r.mereu.kernel@arduino.cc
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
 2026-03-26 09:40:32 -05:00
Xilin Wu
99e38f5683 arm64: dts: qcom: sm8550: Add UART15 
Add uart15 node for UART bus present on sm8550 SoC.

Signed-off-by: Molly Sophia <mollysophia379@gmail.com>
Signed-off-by: Xilin Wu <wuxilin123@gmail.com>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Aaron Kling <webgeek1234@gmail.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20260212-sm8550-uart15-v3-1-b90405f94bec@gmail.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
 2026-03-26 09:40:32 -05:00
Yedaya Katsman
8cbbb33904 arm64: dts: qcom: sm6125-xiaomi-laurel-sprout: Add Focaltech FT3518 touchscreen 
Add device tree node for the Focaltech FT3518 touchscreen on
Xiaomi Mi A3 (laurel-sprout).

Enable qupv3_id_0 and i2c2 bus that the touchscreen is on.

Downstream references:
Link: https://github.com/MiCode/Xiaomi_Kernel_OpenSource/blob/laurel-r-oss/arch/arm64/boot/dts/qcom/trinket-pinctrl.dtsi
Link: https://github.com/MiCode/Xiaomi_Kernel_OpenSource/blob/laurel-r-oss/arch/arm64/boot/dts/qcom/laurel_sprout-qrd.dtsi

Co-developed-by: Kamil Gołda <kamil.golda@protonmail.com>
Signed-off-by: Kamil Gołda <kamil.golda@protonmail.com>
Signed-off-by: Yedaya Katsman <yedaya.ka@gmail.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20260208-touchscreen-patches-v5-1-5821dff9c9a2@gmail.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
 2026-03-26 09:40:32 -05:00
Aleksandrs Vinarskis
09d72b0ef8 arm64: dts: qcom: x1-asus-zenbook-a14: add HDMI port 
Add HDMI port that utilizes qmpphy via Parade PS185HDM DP-HDMI
bridge.

Based on commit 34d76723c4 ("arm64: dts: qcom: x1e80100-vivobook-s15:
add HDMI port")

Signed-off-by: Aleksandrs Vinarskis <alex@vinarskis.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20260211-zenbook-a14-improvements-v1-1-d970af6e25a3@vinarskis.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
 2026-03-26 09:40:32 -05:00
Xueyao An
cb7db0f401 arm64: dts: qcom: hamoa-iot-som: Add firmware-name to QUPv3 nodes 
Traditionally, firmware loading for Serial Engines (SE) in the QUP hardware
of Qualcomm SoCs has been managed by TrustZone (TZ). While this approach
ensures secure SE assignment and access control, it limits flexibility for
developers who need to enable various protocols on different SEs.

Add the firmware-name property to QUPv3 nodes in the device tree to enable
firmware loading from the Linux environment. Handle SE assignments and
access control permissions directly within Linux, removing the dependency
on TrustZone.

Signed-off-by: Xueyao An <xueyao.an@oss.qualcomm.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20260212082558.2811953-1-xueyao.an@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
 2026-03-26 09:40:31 -05:00
Luca Weiss
73feb0d1e2 arm64: dts: qcom: kodiak: Add I2S1 pinctrl definitions 
Add the pinctrl definitions to configure gpio6-gpio9 of the lpass_tlmm
for I2S output.

Co-developed-by: Bharadwaj Raju <bharadwaj.raju@machinesoul.in>
Signed-off-by: Bharadwaj Raju <bharadwaj.raju@machinesoul.in>
Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20260211-kodiak-i2s1-v1-1-b3a7fad8014e@fairphone.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
 2026-03-26 09:40:31 -05:00
Manivannan Sadhasivam
408b79c097 arm64: dts: qcom: x1e80100: Add '#cooling-cells' for CPU nodes 
Enable passive cooling for CPUs in the X1E80100 SoC by adding the
'#cooling-cells' property. This will allow the OS to mitigate the CPU
power dissipation with the help of SCMI DVFS.

Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@oss.qualcomm.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Tested-by: Gaurav Kohli <gaurav.kohli@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20260210070321.17033-1-manivannan.sadhasivam@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
 2026-03-18 07:16:51 -05:00
Krzysztof Kozlowski
90b7cc18e9 arm64: dts: qcom: x1-crd: add USB DisplayPort audio 
Add support for playing audio over USB DisplayPort (the two left USB-C
ports on the CRD device).

Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20260209093237.33287-2-krzysztof.kozlowski@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
 2026-03-18 07:14:54 -05:00
Roger Shimizu
1cde54c54b arm64: dts: qcom: qcs6490: Add Thundercomm AI Mini PC G1 IoT 
Thundercomm AI MiniPC G1 IoT is single board computer with
AI capability based on Qualcomm QCS6490 platform.

This device tree is confirmed to work as below:
- GPU
- HDMI output port
- PCIe M.2 port (for external Wi-Fi or 5G connectivity)
- UART / serial console port
- UFS
- USB Type-C port, with Display Port

Signed-off-by: Roger Shimizu <rosh@debian.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20260207-next-20260130_rosh-v2-3-548bbe0c7742@debian.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
 2026-03-18 07:14:18 -05:00
Roger Shimizu
5230355252 arm64: dts: qcom: kodiak: Add missing usb-role-switch property 
Add missing usb-role-switch property to usb_1 node.

Signed-off-by: Roger Shimizu <rosh@debian.org>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20260207-next-20260130_rosh-v2-2-548bbe0c7742@debian.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
 2026-03-18 07:13:43 -05:00
Roger Shimizu
bc7cc1c4a3 dt-bindings: arm: qcom: Add Thundercomm AI Mini PC G1 IoT 
Document Thundercomm AI Mini PC G1 IoT.

Signed-off-by: Roger Shimizu <rosh@debian.org>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20260207-next-20260130_rosh-v2-1-548bbe0c7742@debian.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
 2026-03-18 07:13:43 -05:00
Aaron Kling
453f8a1523 arm64: dts: qcom: sm8550: Add ACD levels for GPU 
Update GPU node to include acd level values.

Signed-off-by: Aaron Kling <webgeek1234@gmail.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20260207-sm8550-acd-v1-1-53d084c58c9a@gmail.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
 2026-03-18 07:13:15 -05:00
Xilin Wu
ce26eb2967 arm64: dts: qcom: pmk8550: Add PWM controller 
Add the PWM function to the pmk8550 dtsi, which is usually used
to control PWM backlight on platforms using this PMIC.

Signed-off-by: Xilin Wu <wuxilin123@gmail.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Aaron Kling <webgeek1234@gmail.com>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20260207-pmk8550-pwm-v1-1-f2b26ab98d8b@gmail.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
 2026-03-18 07:13:08 -05:00
Bartosz Golaszewski
7aedf0ebbf arm64: dts: qcom: remove msm8996-v3.0.dtsi 
This file is not used anywhere. Remove it.

Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@oss.qualcomm.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Closes: https://lore.kernel.org/all/20251212203226.458694-3-robh@kernel.org/
Link: https://lore.kernel.org/r/20260206134506.72679-1-bartosz.golaszewski@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
 2026-03-18 07:12:46 -05:00
Varadarajan Narayanan
f69b0d8d51 arm64: dts: qcom: ipq9574: Enable eMMC variant 
RDP433/RDP418 can have NAND or eMMC based on a board level rework. Since
the same GPIOS are used for both the interfaces, only one of them can be
used. Add a new DTS file to enable eMMC.

Signed-off-by: Varadarajan Narayanan <varadarajan.narayanan@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20260205085936.3220108-5-varadarajan.narayanan@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
 2026-03-18 07:12:20 -05:00
Varadarajan Narayanan
26c980a7d3 dt-bindings: arm: qcom: Add IPQ9574 AL02-c2 and AL02-c7 eMMC variant 
Document the IPQ9574 AL02-c2 and AL02-c7 eMMC variant.

Signed-off-by: Varadarajan Narayanan <varadarajan.narayanan@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20260205085936.3220108-4-varadarajan.narayanan@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
 2026-03-18 07:12:20 -05:00
Varadarajan Narayanan
fc1fd9d52a arm64: dts: qcom: ipq9574-rdp433: Reorganize DTS to introduce eMMC support 
The RDP433 has NAND and eMMC variants. Presently, only NAND variant is
supported. To enable support for eMMC variant, move the common nodes from
ipq9574-rdp433.dts to ipq9574-rdp433-common.dtsi. ipq9574-rdp433-common.dtsi
will be included in rdp433 NAND and eMMC DT files.

Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Signed-off-by: Varadarajan Narayanan <varadarajan.narayanan@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20260205085936.3220108-3-varadarajan.narayanan@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
 2026-03-18 07:12:20 -05:00
Varadarajan Narayanan
53f5d2d61a arm64: dts: qcom: ipq9574: Add details for eMMC 
RDP433 and RDP418 has NAND and eMMC variants. Presently, only NAND
variant is supported. To enable support for eMMC variant, add the
relevant GPIO and regulator information.

Do not enable NAND or eMMC by default in ipq9574-rdp-common.dtsi. Enable
it in board specific DTS as applicable.

Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Signed-off-by: Varadarajan Narayanan <varadarajan.narayanan@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20260205085936.3220108-2-varadarajan.narayanan@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
 2026-03-18 07:12:20 -05:00
Odelu Kukatla
7aec47be7c arm64: dts: qcom: qcs8300: Add clocks for QoS configuration 
Add clocks which need to be enabled for configuring QoS on
qcs8300 SoC.

Signed-off-by: Odelu Kukatla <odelu.kukatla@oss.qualcomm.com>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20260127090116.1438780-4-odelu.kukatla@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
 2026-03-18 07:10:48 -05:00
Barnabás Czémán
7131f6d909 arm64: dts: qcom: msm8953-xiaomi-daisy: fix backlight 
The backlight on this device is connected via 3 strings. Currently,
the DT claims only two are present, which results in visible stripes
on the display (since every third backlight string remains unconfigured).

Fix the number of strings to avoid that.

Fixes: 38d779c263 ("arm64: dts: qcom: msm8953: Add device tree for Xiaomi Mi A2 Lite")
Signed-off-by: Barnabás Czémán <barnabas.czeman@mainlining.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20260116-pmi8950-wled-v3-7-e6c93de84079@mainlining.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
 2026-03-18 07:07:26 -05:00
Barnabás Czémán
9bc4b18a42 arm64: dts: qcom: msm8937-xiaomi-land: correct wled ovp value 
PMI8950 doesn't actually support setting an OVP threshold value of
29.6 V. The closest allowed value is 29.5 V. Set that instead.

Fixes: 2144f6d57d ("arm64: dts: qcom: Add Xiaomi Redmi 3S")
Signed-off-by: Barnabás Czémán <barnabas.czeman@mainlining.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20260116-pmi8950-wled-v3-6-e6c93de84079@mainlining.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
 2026-03-18 07:07:26 -05:00
Barnabás Czémán
9e87f0eaad arm64: dts: qcom: msm8953-xiaomi-vince: correct wled ovp value 
PMI8950 doesn't actually support setting an OVP threshold value of
29.6 V. The closest allowed value is 29.5 V. Set that instead.

Fixes: aa17e707e0 ("arm64: dts: qcom: msm8953: Add device tree for Xiaomi Redmi 5 Plus")
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Signed-off-by: Barnabás Czémán <barnabas.czeman@mainlining.org>
Link: https://lore.kernel.org/r/20260116-pmi8950-wled-v3-5-e6c93de84079@mainlining.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
 2026-03-18 07:07:25 -05:00
Xilin Wu
00569c6342 arm64: dts: qcom: sm8550: Update EAS properties 
The original values provided by Qualcomm appear to be quite
inaccurate. Specifically, some heavy gaming tasks could be
improperly assigned to the A510 cores by the scheduler, resulting
in a CPU bottleneck. This update to the EAS properties aims to
enhance the user experience across various scenarios.

The power numbers were obtained using a Type-C power meter, which
was directly connected to the battery connector on the AYN Odin 2
motherboard, acting as a fake battery.

It should be noted that the A715 cores seem less efficient than the
A710 cores. Therefore, an average value has been assigned to them,
considering that the A715 and A710 cores share a single cpufreq
domain.

Cortex-A510 cores:
441 kHz, 564 mV, 43 mW, 350 Cx
556 kHz, 580 mV, 59 mW, 346 Cx
672 kHz, 592 mV, 71 mW, 312 Cx
787 kHz, 604 mV, 83 mW, 290 Cx
902 kHz, 608 mV, 96 mW, 288 Cx
1017 kHz, 624 mV, 107 mW, 264 Cx
1113 kHz, 636 mV, 117 mW, 252 Cx
1228 kHz, 652 mV, 130 mW, 240 Cx
1344 kHz, 668 mV, 146 mW, 235 Cx
1459 kHz, 688 mV, 155 mW, 214 Cx
1555 kHz, 704 mV, 166 mW, 205 Cx
1670 kHz, 724 mV, 178 mW, 192 Cx
1785 kHz, 744 mV, 197 mW, 189 Cx
1900 kHz, 764 mV, 221 mW, 190 Cx
2016 kHz, 784 mV, 243 mW, 188 Cx
Your dynamic-power-coefficient for cpu 1: 251

Cortex-A715 cores:
614 kHz, 572 mV, 97 mW, 470 Cx
729 kHz, 592 mV, 123 mW, 473 Cx
844 kHz, 608 mV, 152 mW, 486 Cx
940 kHz, 624 mV, 178 mW, 485 Cx
1056 kHz, 644 mV, 207 mW, 465 Cx
1171 kHz, 656 mV, 243 mW, 480 Cx
1286 kHz, 672 mV, 271 mW, 459 Cx
1401 kHz, 692 mV, 310 mW, 454 Cx
1536 kHz, 716 mV, 368 mW, 462 Cx
1651 kHz, 740 mV, 416 mW, 454 Cx
1785 kHz, 760 mV, 492 mW, 475 Cx
1920 kHz, 784 mV, 544 mW, 457 Cx
2054 kHz, 804 mV, 613 mW, 458 Cx
2188 kHz, 828 mV, 702 mW, 465 Cx
2323 kHz, 852 mV, 782 mW, 461 Cx
2457 kHz, 876 mV, 895 mW, 473 Cx
2592 kHz, 896 mV, 1020 mW, 490 Cx
2707 kHz, 920 mV, 1140 mW, 498 Cx
2803 kHz, 940 mV, 1215 mW, 490 Cx
Your dynamic-power-coefficient for cpu 3: 472

Cortex-A710 cores:
614 kHz, 572 mV, 91 mW, 388 Cx
729 kHz, 592 mV, 116 mW, 424 Cx
844 kHz, 608 mV, 143 mW, 443 Cx
940 kHz, 624 mV, 165 mW, 434 Cx
1056 kHz, 644 mV, 195 mW, 430 Cx
1171 kHz, 656 mV, 218 mW, 414 Cx
1286 kHz, 672 mV, 250 mW, 415 Cx
1401 kHz, 692 mV, 286 mW, 412 Cx
1536 kHz, 716 mV, 331 mW, 407 Cx
1651 kHz, 740 mV, 374 mW, 401 Cx
1785 kHz, 760 mV, 439 mW, 417 Cx
1920 kHz, 784 mV, 495 mW, 411 Cx
2054 kHz, 804 mV, 557 mW, 412 Cx
2188 kHz, 828 mV, 632 mW, 415 Cx
2323 kHz, 852 mV, 721 mW, 422 Cx
2457 kHz, 876 mV, 813 mW, 427 Cx
2592 kHz, 896 mV, 912 mW, 435 Cx
2707 kHz, 920 mV, 1019 mW, 442 Cx
2803 kHz, 940 mV, 1087 mW, 436 Cx
Your dynamic-power-coefficient for cpu 5: 421

Cortex-X3 core:
729 kHz, 568 mV, 252 mW, 1110 Cx
864 kHz, 580 mV, 312 mW, 1097 Cx
998 kHz, 592 mV, 379 mW, 1109 Cx
1132 kHz, 608 mV, 453 mW, 1099 Cx
1248 kHz, 624 mV, 517 mW, 1067 Cx
1363 kHz, 636 mV, 587 mW, 1067 Cx
1478 kHz, 648 mV, 657 mW, 1058 Cx
1593 kHz, 664 mV, 739 mW, 1049 Cx
1708 kHz, 680 mV, 813 mW, 1020 Cx
1843 kHz, 704 mV, 940 mW, 1021 Cx
1977 kHz, 724 mV, 1054 mW, 1007 Cx
2092 kHz, 740 mV, 1201 mW, 1045 Cx
2227 kHz, 768 mV, 1358 mW, 1029 Cx
2342 kHz, 788 mV, 1486 mW, 1016 Cx
2476 kHz, 812 mV, 1711 mW, 1046 Cx
2592 kHz, 836 mV, 1846 mW, 1014 Cx
2726 kHz, 856 mV, 2046 mW, 1020 Cx
2841 kHz, 880 mV, 2266 mW, 1027 Cx
2956 kHz, 908 mV, 2616 mW, 1074 Cx
3187 kHz, 956 mV, 3326 mW, 1147 Cx
Your dynamic-power-coefficient for cpu 7: 1057

7-zip benchmark single-core MIPS:
2128   4416   4632   6686

Signed-off-by: Xilin Wu <wuxilin123@gmail.com>
Signed-off-by: Aaron Kling <webgeek1234@gmail.com>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Reviewed-by: Lukasz Luba <lukasz.luba@arm.com>
Link: https://lore.kernel.org/r/20260128-sm8550-eas-v1-1-fb80615bed5c@gmail.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
 2026-03-18 07:06:44 -05:00
Xin Liu
47c88db49f arm64: dts: qcom: hamoa: Add remoteproc IOMMUS in EL2 device trees 
All the existing variants Hamoa boards are using Gunyah hypervisor
which means that, so far, Linux-based OS could only boot in EL1 on
those devices. However, it is possible for us to boot Linux at EL2
on these devices [1].

When running under Gunyah, the remote processor firmware IOMMU streams
are controlled by Gunyah. However, without Gunyah, the IOMMU is managed
by the consumer of this DeviceTree. Therefore, describe the firmware
streams for each remote processor.

Add remoteproc IOMMUS to the EL2 device trees to generate the
corresponding -el2.dtb files.

[1]
https://docs.qualcomm.com/bundle/publicresource/topics/80-70020-4/boot-developer-touchpoints.html#uefi

Reviewed-by: Abel Vesa <abel.vesa@oss.qualcomm.com>
Signed-off-by: Xin Liu <xin.liu@oss.qualcomm.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20260203063244.1498699-1-xin.liu@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
 2026-03-18 07:06:15 -05:00
Sibi Sankar
5044a0b030 arm64: dts: qcom: glymur: Fix deprecated cpu compatibles 
The generic Qualcomm Oryon CPU compatible used by the Glymur
SoC is deprecated and incorrect since it uses a single compatible
to describe two different core variants. It is now replaced with
two different core-specific compatibles based on MIDR part and
variant number.

CPUS 0-5:
MIDR_EL1[PART_NUM] - 0x2
MIDR_EL1[VARIANT] - 0x2

CPUS 6-17:
MIDR_EL1[PART_NUM] - 0x2
MIDR_EL1[VARIANT] - 0x1

Fixes: 41b6e8db40 ("arm64: dts: qcom: Introduce Glymur base dtsi")
Signed-off-by: Sibi Sankar <sibi.sankar@oss.qualcomm.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20260313103439.1255247-3-sibi.sankar@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
 2026-03-15 21:57:19 -05:00
Sibi Sankar
96e71f817b dt-bindings: arm: cpus: Extend Qualcomm Oryon compatibles 
The generic Qualcomm Oryon CPU compatible documented in the binding
doesn't account for differences between core types and has been
deprecated. Introduce core-specific compatibles, by appending the
compatible with MIDR part and variant numbers as listed below.

qcom,oryon-MIDR_EL1[PART_NUM]-MIDR_EL1[VARIANT]

Signed-off-by: Sibi Sankar <sibi.sankar@oss.qualcomm.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20260313103439.1255247-2-sibi.sankar@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
 2026-03-15 21:57:11 -05:00
Val Packett
bb4d28e377 arm64: dts: qcom: sm6125: Add missing MDSS core reset 
To make sure the display subsystem starts in a predictable state, we
need to reset it. Otherwise, unpredictable issues can happen, e.g.
on the xiaomi-laurel-sprout smartphone DSI would not work on boot.

Wire up the reset to fix.

Fixes: 0865d23a02 ("arm64: dts: qcom: sm6125: Add display hardware nodes")
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Tested-by: Yedaya Katsman <yedaya.ka@gmail.com>
Signed-off-by: Val Packett <val@packett.cool>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20260303034847.13870-7-val@packett.cool
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
 2026-03-11 15:46:45 -05:00
Val Packett
1cc317d418 arm64: dts: qcom: sm6115: Add missing MDSS core reset 
To make sure the display subsystem starts in a predictable state, we
need to reset it. Otherwise, unpredictable issues can happen, e.g.
on the motorola-guamp smartphone DSI would not transmit anything.

Wire up the reset to fix.

Fixes: 705e50427d ("arm64: dts: qcom: sm6115: Add mdss/dpu node")
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Signed-off-by: Val Packett <val@packett.cool>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20260303034847.13870-6-val@packett.cool
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
 2026-03-11 15:46:45 -05:00
Bjorn Andersson
3c0101cdf2 Merge branch '20260303034847.13870-2-val@packett.cool' into arm64-for-7.1 
Merge the MDSS reset constants for SM6115 and SM6125 from topic branch
to get access to the constants.
 2026-03-11 15:45:53 -05:00
Val Packett
0221b14be8 dt-bindings: clock: qcom,dispcc-sm6125: Define MDSS resets 
Add the missing defines for MDSS resets, which are necessary to reset
the display subsystem in order to avoid issues caused by state left over
from the bootloader.

While here, align comment style with other SoCs.

Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com>
Signed-off-by: Val Packett <val@packett.cool>
Link: https://lore.kernel.org/r/20260303034847.13870-3-val@packett.cool
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
 2026-03-11 15:44:18 -05:00
Val Packett
a5c7b4fc84 dt-bindings: clock: qcom,sm6115-dispcc: Define MDSS resets 
Add the missing defines for MDSS resets, which are necessary to reset
the display subsystem in order to avoid issues caused by state left over
from the bootloader.

While here, align comment style with other SoCs.

Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com>
Signed-off-by: Val Packett <val@packett.cool>
Link: https://lore.kernel.org/r/20260303034847.13870-2-val@packett.cool
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
 2026-03-11 15:44:18 -05:00
Dmitry Baryshkov
a5c21b9bd5 arm64: dts: qcom: correct RBR opp entry 
DisplayPort Reduced Bit Rate uses link rate of 1.62 Gbps, the main link
clock should be 162 MHz. Having the incorrect frequency (160 MHz) in the
OPP table will result in selecting wrong link frequency. Correct the
entry in the OPP table.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20260304-msm-fix-rbr-v1-1-b9eba986eaef@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
 2026-03-09 18:09:48 -05:00
Swati Agarwal
8eb46e0a7a arm64: dts: qcom: monaco-evk: Enable the secondary USB controller 
Enable the secondary USB controller connected to micro usb port in OTG mode
on Monaco EVK platform.

Signed-off-by: Swati Agarwal <swati.agarwal@oss.qualcomm.com>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20260303082157.523847-4-swati.agarwal@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
 2026-03-09 18:09:48 -05:00
Swati Agarwal
d2b1f22108 arm64: dts: qcom: monaco: Add role-switch support and HS endpoint for secondary USB controller 
Enable usb-role-switch for the secondary HS USB controller on Monaco.

Additionally, add a port node with an HS endpoint so the controller can be
linked through the DT graph to the corresponding connector.

Signed-off-by: Swati Agarwal <swati.agarwal@oss.qualcomm.com>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20260303082157.523847-3-swati.agarwal@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
 2026-03-09 18:09:48 -05:00
Swati Agarwal
d99862e710 arm64: dts: qcom: monaco-evk: Enable GPIO expander interrupt for Monaco EVK 
Enable PCA9538 expander as interrupt controller on Monaco EVK and configure
the corresponding TLMM pins via pinctrl to operate as GPIO inputs with
internal pull-ups.

Signed-off-by: Swati Agarwal <swati.agarwal@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20260303082157.523847-2-swati.agarwal@oss.qualcomm.com
[bjorn: Reordered nodes under &tlmm]
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
 2026-03-09 18:09:48 -05:00
David Heidelberg
7ffe83b617 arm64: dts: qcom: sdm845: Introduce camera master clock pinctrl 
Put clock pins configuration for camera master clock into the dtsi.

Reviewed-by: Vladimir Zapolskiy <vladimir.zapolskiy@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Signed-off-by: David Heidelberg <david@ixit.cz>
Link: https://lore.kernel.org/r/20260114-sdm845-mclk-v3-1-c9351deaf4f2@ixit.cz
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
 2026-03-09 18:09:47 -05:00
Janaki Ramaiah Thota
af2385d532 arm64: dts: qcom: qcm6490-idp: add and enable BT node 
Add the PMU node for WCN6750 present on the qcm6490-idp
board and assign its power outputs to the Bluetooth module.

In WCN6750 module sw_ctrl and wifi-enable pins are handled
in the wifi controller firmware. Therefore, it is not required
to have those pins' entries in the PMU node.

Signed-off-by: Janaki Ramaiah Thota <janaki.thota@oss.qualcomm.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20260203071807.764036-1-janaki.thota@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
 2026-03-09 18:09:47 -05:00
Loic Poulain
c2dd39323d arm64: dts: qcom: monaco-evk: Enable SDHC1 for eMMC 
Monaco EVK has onboard eMMC, that can be used either as primary
boot storage or as secondary storage when booting from UFS.

Signed-off-by: Loic Poulain <loic.poulain@oss.qualcomm.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20260116214354.256878-3-loic.poulain@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
 2026-03-09 17:13:32 -05:00
Loic Poulain
978400b7a6 arm64: dts: qcom: monaco: Complete SDHC definition 
Add the missing SDHC properties required to enable HS200, HS400,
and HS400 Enhanced Strobe modes, as supported by this controller.

Select the proper default pinctrls.

Signed-off-by: Loic Poulain <loic.poulain@oss.qualcomm.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20260116214354.256878-2-loic.poulain@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
 2026-03-09 17:13:32 -05:00