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arm64: dts: qcom: monaco-evk: Enable GPIO expander interrupt for Monaco EVK

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Enable PCA9538 expander as interrupt controller on Monaco EVK and configure
the corresponding TLMM pins via pinctrl to operate as GPIO inputs with
internal pull-ups.

Signed-off-by: Swati Agarwal <swati.agarwal@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20260303082157.523847-2-swati.agarwal@oss.qualcomm.com
[bjorn: Reordered nodes under &tlmm]
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
This commit is contained in:
Swati Agarwal
2026-03-03 13:51:55 +05:30
committed by Bjorn Andersson
parent 7ffe83b617
commit d99862e710
1 changed files with 77 additions and 1 deletions
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78
arch/arm64/boot/dts/qcom/monaco-evk.dts
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@@ -371,6 +371,11 @@ expander0: gpio@38 {
reg = <0x38>;
#gpio-cells = <2>;
gpio-controller;
#interrupt-cells = <2>;
interrupt-controller;
interrupts-extended = <&tlmm 56 IRQ_TYPE_LEVEL_LOW>;
pinctrl-0 = <&expander0_int>;
pinctrl-names = "default";
};
expander1: gpio@39 {
@@ -378,6 +383,11 @@ expander1: gpio@39 {
reg = <0x39>;
#gpio-cells = <2>;
gpio-controller;
#interrupt-cells = <2>;
interrupt-controller;
interrupts-extended = <&tlmm 16 IRQ_TYPE_LEVEL_LOW>;
pinctrl-0 = <&expander1_int>;
pinctrl-names = "default";
};
expander2: gpio@3a {
@@ -385,6 +395,11 @@ expander2: gpio@3a {
reg = <0x3a>;
#gpio-cells = <2>;
gpio-controller;
#interrupt-cells = <2>;
interrupt-controller;
interrupts-extended = <&tlmm 95 IRQ_TYPE_LEVEL_LOW>;
pinctrl-0 = <&expander2_int>;
pinctrl-names = "default";
};
expander3: gpio@3b {
@@ -392,6 +407,11 @@ expander3: gpio@3b {
reg = <0x3b>;
#gpio-cells = <2>;
gpio-controller;
#interrupt-cells = <2>;
interrupt-controller;
interrupts-extended = <&tlmm 24 IRQ_TYPE_LEVEL_LOW>;
pinctrl-0 = <&expander3_int>;
pinctrl-names = "default";
};
expander4: gpio@3c {
@@ -399,6 +419,11 @@ expander4: gpio@3c {
reg = <0x3c>;
#gpio-cells = <2>;
gpio-controller;
#interrupt-cells = <2>;
interrupt-controller;
interrupts-extended = <&tlmm 96 IRQ_TYPE_LEVEL_LOW>;
pinctrl-0 = <&expander4_int>;
pinctrl-names = "default";
};
expander5: gpio@3d {
@@ -406,6 +431,11 @@ expander5: gpio@3d {
reg = <0x3d>;
#gpio-cells = <2>;
gpio-controller;
#interrupt-cells = <2>;
interrupt-controller;
interrupts-extended = <&tlmm 3 IRQ_TYPE_LEVEL_LOW>;
pinctrl-0 = <&expander5_int>;
pinctrl-names = "default";
};
expander6: gpio@3e {
@@ -413,6 +443,11 @@ expander6: gpio@3e {
reg = <0x3e>;
#gpio-cells = <2>;
gpio-controller;
#interrupt-cells = <2>;
interrupt-controller;
interrupts-extended = <&tlmm 52 IRQ_TYPE_LEVEL_LOW>;
pinctrl-0 = <&expander6_int>;
pinctrl-names = "default";
};
};
@@ -514,7 +549,6 @@ tpm@0 {
};
&tlmm {
pcie0_default_state: pcie0-default-state {
wake-pins {
pins = "gpio0";
@@ -554,6 +588,18 @@ ethernet0_mdio: ethernet0-mdio-pins {
};
};
expander5_int: expander5-int-state {
pins = "gpio3";
function = "gpio";
bias-pull-up;
};
expander1_int: expander1-int-state {
pins = "gpio16";
function = "gpio";
bias-pull-up;
};
qup_i2c1_default: qup-i2c1-state {
pins = "gpio19", "gpio20";
function = "qup0_se1";
@@ -584,12 +630,42 @@ perst-pins {
};
};
expander3_int: expander3-int-state {
pins = "gpio24";
function = "gpio";
bias-pull-up;
};
expander6_int: expander6-int-state {
pins = "gpio52";
function = "gpio";
bias-pull-up;
};
expander0_int: expander0-int-state {
pins = "gpio56";
function = "gpio";
bias-pull-up;
};
qup_i2c15_default: qup-i2c15-state {
pins = "gpio91", "gpio92";
function = "qup1_se7";
drive-strength = <2>;
bias-pull-up;
};
expander2_int: expander2-int-state {
pins = "gpio95";
function = "gpio";
bias-pull-up;
};
expander4_int: expander4-int-state {
pins = "gpio96";
function = "gpio";
bias-pull-up;
};
};
&uart7 {