arm64: dts: qcom: qcs8300: Add clocks for QoS configuration

Add clocks which need to be enabled for configuring QoS on
qcs8300 SoC.

Signed-off-by: Odelu Kukatla <odelu.kukatla@oss.qualcomm.com>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20260127090116.1438780-4-odelu.kukatla@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
This commit is contained in:
Odelu Kukatla
2026-01-27 14:31:16 +05:30
committed by Bjorn Andersson
parent 7131f6d909
commit 7aec47be7c

View File

@@ -2234,6 +2234,10 @@ aggre1_noc: interconnect@16c0000 {
reg = <0x0 0x016c0000 0x0 0x17080>;
#interconnect-cells = <2>;
qcom,bcm-voters = <&apps_bcm_voter>;
clocks = <&gcc GCC_AGGRE_UFS_PHY_AXI_CLK>,
<&gcc GCC_AGGRE_NOC_QUPV3_AXI_CLK>,
<&gcc GCC_AGGRE_USB2_PRIM_AXI_CLK>,
<&gcc GCC_AGGRE_USB3_PRIM_AXI_CLK>;
};
aggre2_noc: interconnect@1700000 {
@@ -2241,6 +2245,7 @@ aggre2_noc: interconnect@1700000 {
reg = <0x0 0x01700000 0x0 0x1a080>;
#interconnect-cells = <2>;
qcom,bcm-voters = <&apps_bcm_voter>;
clocks = <&rpmhcc RPMH_IPA_CLK>;
};
pcie_anoc: interconnect@1760000 {
@@ -5113,6 +5118,7 @@ gem_noc: interconnect@9100000 {
reg = <0x0 0x9100000 0x0 0xf7080>;
#interconnect-cells = <2>;
qcom,bcm-voters = <&apps_bcm_voter>;
clocks = <&gcc GCC_DDRSS_GPU_AXI_CLK>;
};
llcc: system-cache-controller@9200000 {