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Author SHA1 Message Date
Xiaojian Du
1dd13b4518 drm/amd/pm: update the smu v11.5 smc header for vangogh 
This patch is to update the smu v11.5 smc header for vangogh.

Signed-off-by: Xiaojian Du <Xiaojian.Du@amd.com>
Reviewed-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2020-10-30 00:57:48 -04:00
Dennis Li
676deb3877 drm/amdgpu: fix the issue of reserving bad pages failed 
In amdgpu_ras_reset_gpu, because bad pages may not be freed,
it has high probability to reserve bad pages failed.

Change to reserve bad pages when freeing VRAM.

v2:
1. avoid allocating the drm_mm node outside of amdgpu_vram_mgr.c
2. move bad page reserving into amdgpu_ras_add_bad_pages, if vram mgr
   reserve bad page failed, it will put it into pending list, otherwise
   put it into processed list;
3. remove amdgpu_ras_release_bad_pages, because retired page's info has
   been moved into amdgpu_vram_mgr

v3:
1. formate code style;
2. rename amdgpu_vram_reserve_scope as amdgpu_vram_reservation;
3. rename scope_pending as reservations_pending;
4. rename scope_processed as reserved_pages;
5. change to iterate over all the pending ones and try to insert them
   with drm_mm_reserve_node();

v4:
1. rename amdgpu_vram_mgr_reserve_scope as
amdgpu_vram_mgr_reserve_range;
2. remove unused include "amdgpu_ras.h";
3. rename amdgpu_vram_mgr_check_and_reserve as
amdgpu_vram_mgr_do_reserve;
4. refine amdgpu_vram_mgr_reserve_range to call
amdgpu_vram_mgr_do_reserve.

Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Hawking Zhang <hawking.zhang@amd.com>
Signed-off-by: Dennis Li <Dennis.Li@amd.com>
Signed-off-by: Wenhui Sheng <Wenhui.Sheng@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2020-10-30 00:57:29 -04:00
Dennis Li
5eeb45934c drm/amdgpu: remove redundant GPU reset 
Because bad pages saving has been moved to UMC error interrupt callback,
which will trigger a new GPU reset after saving.

Signed-off-by: Dennis Li <Dennis.Li@amd.com>
Reviewed-by: Hawking Zhang <hawking.zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2020-10-30 00:57:23 -04:00
Dennis Li
22503d803d drm/amdgpu: change to save bad pages in UMC error interrupt callback 
Instead of saving bad pages in amdgpu_ras_reset_gpu, it will reduce
the unnecessary calling of amdgpu_ras_save_bad_pages.

Signed-off-by: Dennis Li <Dennis.Li@amd.com>
Reviewed-by: Hawking Zhang <hawking.zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2020-10-30 00:57:17 -04:00
Flora Cui
9c94b5ef75 drm/amdgpu: rename nv_is_headless_sku() 
for headless NAVI ASICs

Signed-off-by: Flora Cui <flora.cui@amd.com>
Reviewed-by: Guchun Chen <guchun.chen@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2020-10-30 00:57:11 -04:00
Flora Cui
dd657888e0 drm/amdgpu: disable DCN and VCN for Navi14 0x7340/C9 SKU 
Navi14 0x7340/C9 SKU has no display and video support, remove them.

Signed-off-by: Flora Cui <flora.cui@amd.com>
Reviewed-by: Guchun Chen <guchun.chen@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2020-10-30 00:57:03 -04:00
Alex Deucher
29226f04fd drm/amdgpu/display: fix indentation in defer_delay_converter_wa() 
Fixes this warning:
drivers/gpu/drm/amd/amdgpu/../display/dc/core/dc_link_ddc.c: In function ‘defer_delay_converter_wa’:
drivers/gpu/drm/amd/amdgpu/../display/dc/core/dc_link_ddc.c:285:2: warning: this ‘if’ clause does not guard... [-Wmisleading-indentation]
  285 |  if (link->dpcd_caps.branch_dev_id == DP_BRANCH_DEVICE_ID_0080E1 &&
      |  ^~
drivers/gpu/drm/amd/amdgpu/../display/dc/core/dc_link_ddc.c:291:3: note: ...this statement, but the latter is misleadingly indented as if it were guarded by the ‘if’
  291 |   if (link->dpcd_caps.branch_dev_id == DP_BRANCH_DEVICE_ID_006037 &&
      |   ^~

Reviewed-by: Evan Quan <evan.quan@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2020-10-30 00:56:53 -04:00
Alex Deucher
a87a9a73d0 drm/amdgpu/display: re-add surface size calculation in dcn30_hwseq.c 
This is required for MALL.  Was accidently removed in PSR update.

Fixes: 48e48e5984 ("drm/amd/display: Disable idle optimization when PSR is enabled")
Fixes: 52f2e83e2f ("drm/amdgpu/display: add MALL support (v2)")
Acked-by: Slava Abramov <slava.abramov@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2020-10-27 17:43:43 -04:00
Sandeep Raghuraman
fddc611ca3 drm/radeon: Expose vddc through hwmon 
Create hwmon attribute for vddc, that uses previously declared get_current_vddc() callback if there's an implementation available.

Also hides vddc, if there is no implementation for the current chipset (as per Alexander Deucher's suggestion).

Signed-off-by: Sandeep Raghuraman <sandy.8925@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2020-10-27 17:43:42 -04:00
Sandeep Raghuraman
c57a8308e2 drm/radeon: Add implementation of get_current_vddc for Sumo 
Add implementation of get_current_vddc() callback for Sumo.

Signed-off-by: Sandeep Raghuraman <sandy.8925@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2020-10-27 17:43:42 -04:00
Sandeep Raghuraman
ca22f3beb6 drm/radeon: Add new callback that exposes vddc 
This patch adds a callback for reporting vddc, to the dpm field of the radeon_asic structure.

Signed-off-by: Sandeep Raghuraman <sandy.8925@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2020-10-27 17:43:42 -04:00
Alex Deucher
4f00d6d5ba drm/amdgpu/pm: fix the fan speed in fan1_input in manual mode for navi1x 
It has been confirmed that the SMU metrics table should always reflect
the current fan speed even in manual mode.

Fixes: f6eb433954 ("drm/amdgpu/swsmu: handle manual fan readback on SMU11")
Reviewed-by: Evan Quan <evan.quan@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2020-10-27 17:43:28 -04:00
Alex Deucher
19cc89dcb9 drm/amdgpu/swsmu: drop smu i2c bus on navi1x 
Stop registering the SMU i2c bus on navi1x.  This leads to instability
issues when userspace processes mess with the bus and also seems to
cause display stability issues in some cases.

Bug: https://gitlab.freedesktop.org/drm/amd/-/issues/1314
Bug: https://gitlab.freedesktop.org/drm/amd/-/issues/1341
Reviewed-by: Evan Quan <evan.quan@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2020-10-27 12:01:40 -04:00
Christian König
923e15d634 drm/amdgpu: drop mem_global_referenced 
Not used any more.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2020-10-27 12:01:35 -04:00
Huang Rui
c345c89b64 drm/amdgpu: add vangogh apu flag 
This patch is to add vangogh apu flag to support more kickers that
belongs vangogh series.

Signed-off-by: Huang Rui <ray.huang@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2020-10-27 12:01:29 -04:00
Evan Quan
191a3c0479 drm/amdgpu: enable MULTI_MON_PP_MCLK_SWITCH DC feature at default 
With this, for multiple monitors in sync(e.g. with the same model),
mclk switching will be allowed. That helps saving some idle power on
some ASICs(e.g. Polaris).

Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2020-10-27 12:01:23 -04:00
Evan Quan
a2475e624e drm/amd/display: correct asic type check V2 
Check chip family also to avoid wrong identification.

V2: use the correct macro without AMDGPU prefix

Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2020-10-27 12:01:16 -04:00
Evan Quan
b1878847ac drm/amd/pm: drop redundant display setting 
As this is already performed in smu7_set_power_state_tasks().

Signed-off-by: Evan Quan <evan.quan@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2020-10-27 12:00:52 -04:00
Evan Quan
62ff83a4f6 drm/amd/pm: reconfigure smc on display vbitimeout setting change 
Reconfigure smc display settings on vbitimeout change.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2020-10-27 12:00:47 -04:00
Evan Quan
d49873c93f drm/amd/pm: correct the mclk switching setting 
Correct the mclk switching setting for multiple displays.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2020-10-27 12:00:41 -04:00
Evan Quan
b03fd3e7e6 drm/amd/pm: enable Polaris watermark table setting 
Enable watermark table setting for Polaris.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2020-10-27 12:00:34 -04:00
Evan Quan
690cdc2635 drm/amd/pm: fulfill the Polaris implementation for get_clock_by_type_with_latency() 
Fulfill Polaris get_clock_by_type_with_latency().

Signed-off-by: Evan Quan <evan.quan@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2020-10-27 12:00:28 -04:00
Evan Quan
db6f5c7f95 drm/amd/pm: correct vddc_dep_on_dal_pwrl setup 
Correct Polaris10 setup.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2020-10-27 12:00:21 -04:00
Evan Quan
9182fefcb8 drm/amd/pm: correct SMC sclk/mclk boot level setup 
Correct Polaris smc boot level setup.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2020-10-27 12:00:15 -04:00
Evan Quan
8f97e221d6 drm/amd/pm: correct pcie spc cap setup 
Correct Polaris10 pcie spc cap setting.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2020-10-27 12:00:09 -04:00
Evan Quan
ba4601feba drm/amd/pm: correct clk/voltage dependence setup 
Correct Polaris10 clk/voltage dependence setup.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2020-10-27 12:00:03 -04:00
Evan Quan
be56f22b62 drm/amd/pm: correct the way to get the highest vddc 
Populate the correct highest vddc setting on Polaris.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2020-10-27 11:59:57 -04:00
Evan Quan
d765129a71 drm/amd/pm: correct sclk/mclk dpm enablement 
Correct Polaris10 sclk/mclk dpm enablement.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2020-10-27 11:59:51 -04:00
Evan Quan
baa495f764 drm/amd/pm: correct smc voltage controller setup 
Correct Polaris10 smc voltage controller setup.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2020-10-27 11:59:45 -04:00
Evan Quan
326d0ff7aa drm/amd/pm: correct platformcaps setup 
Correct Polaris10 platformcaps setup.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2020-10-27 11:59:39 -04:00
Evan Quan
55411d1623 drm/amd/pm: correct VRconfig setting 
Correct Polaris VRconfig setting.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2020-10-27 11:59:34 -04:00
Evan Quan
a6d8a6eb3e drm/amd/pm: correct vddc phase control setting 
Correct Polaris10 vddc phase control.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2020-10-27 11:59:28 -04:00
Evan Quan
b23dbd603b drm/amd/pm: correct avfs fuse settings 
Correct Polaris10 avfs fuse setting.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2020-10-27 11:59:22 -04:00
Evan Quan
dba1953168 drm/amd/pm: correct Polaris DIDT configurations 
Correct Polaris DIDT enablement.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2020-10-27 11:59:16 -04:00
Evan Quan
d8b61d5a0d drm/amd/pm: correct Polaris powertune table setup 
Correct powertune table setup for Polaris.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2020-10-27 11:59:10 -04:00
Evan Quan
f6638d0e6f drm/amd/pm: correct the checks for sclk/mclk SS support 
Correct sclk/mclk SS support checks.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2020-10-27 11:59:03 -04:00
Evan Quan
a8588b8bb3 drm/amd/pm: correct VR shared rail info 
Add VR shared rail info.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2020-10-27 11:58:57 -04:00
Evan Quan
5f92b48cf6 drm/amd/pm: add mc register table initialization 
Add mc register table initialization.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2020-10-27 11:58:51 -04:00
Evan Quan
8f0804c6b7 drm/amd/pm: add edc leakage controller setting 
Enable edc controller table setting.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2020-10-27 11:58:45 -04:00
Evan Quan
9610a3bfde drm/amd/pm: setup zero rpm parameters for polaris10 
Only if the ZeroRPM feature is supported.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2020-10-27 11:58:39 -04:00
Evan Quan
c420418f1d drm/amd/pm: correct polaris10 clock stretcher data table setting 
By using the saved copy of ro_range_maximum and ro_range_minimum.
Correct the setting for "LdoRefSel".

Signed-off-by: Evan Quan <evan.quan@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2020-10-27 11:58:33 -04:00
Evan Quan
a90e6fbe47 drm/amd/pm: correct the settings for ro range minimum and maximum 
Make the settings more precise.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2020-10-27 11:58:27 -04:00
Evan Quan
029479acca drm/amd/pm: drop redundant efuse mask calculations 
By moving that in atomfw_read_efuse().

Signed-off-by: Evan Quan <evan.quan@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2020-10-27 11:58:21 -04:00
Evan Quan
555440822b drm/amd/pm: optimize AC timing programming 
Programming AC Timing Parameters is only dependent on MCLK.
No need to nest loop for each SCLK DPM level.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2020-10-27 11:58:15 -04:00
Evan Quan
18973c6ec4 drm/amd/powerplay: separate Polaris fan table setup from Tonga 
Instead of sharing the fan table setup with Tonga, Polaris has
its own fan table setup.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2020-10-27 11:58:08 -04:00
Evan Quan
8c23cc29d5 drm/amd/pm: add PWR_CKS_CNTL setting 
This is for some special Polaris10 ASICs.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2020-10-27 11:58:01 -04:00
Evan Quan
92995254af drm/amdgpu: correct CG_ACLK_CNTL setting 
Correct polaris CG_ACLK_CNTL setting.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2020-10-27 11:57:55 -04:00
Evan Quan
7f95a2e01c drm/amd/pm: drop arb table first byte workaround 
As this is not needed for polaris.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2020-10-27 11:57:48 -04:00
Evan Quan
e9016fc2ad drm/amd/pm: add pptable VRHotLevel setting 
Add missing VRHotLevel setting.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2020-10-27 11:57:42 -04:00
Evan Quan
3a9f6bb21d drm/amd/pm: correct the BootLinkLevel setup 
Set the BootLinkLevel as the max level.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2020-10-27 11:57:36 -04:00