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drm/amd/pm: correct the BootLinkLevel setup

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Set the BootLinkLevel as the max level.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Evan Quan
2020-06-18 16:16:51 +08:00
committed by Alex Deucher
parent a193d97741
commit 3a9f6bb21d
1 changed files with 1 additions and 1 deletions
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drivers/gpu/drm/amd/pm/powerplay/smumgr/polaris10_smumgr.c
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@@ -2023,7 +2023,7 @@ static int polaris10_init_smc_table(struct pp_hwmgr *hwmgr)
table->VoltageResponseTime = 0;
table->PhaseResponseTime = 0;
table->MemoryThermThrottleEnable = 1;
table->PCIeBootLinkLevel = 0;
table->PCIeBootLinkLevel = hw_data->dpm_table.pcie_speed_table.count;
table->PCIeGenInterval = 1;
table->VRConfig = 0;