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drm/amd/pm: optimize AC timing programming

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Programming AC Timing Parameters is only dependent on MCLK.
No need to nest loop for each SCLK DPM level.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Evan Quan
2020-06-18 16:42:36 +08:00
committed by Alex Deucher
parent 18973c6ec4
commit 555440822b
1 changed files with 1 additions and 1 deletions
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2
drivers/gpu/drm/amd/pm/powerplay/smumgr/polaris10_smumgr.c
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@@ -1465,7 +1465,7 @@ static int polaris10_program_memory_timing_parameters(struct pp_hwmgr *hwmgr)
hw_data->dpm_table.sclk_table.dpm_levels[i].value,
hw_data->dpm_table.mclk_table.dpm_levels[j].value,
&arb_regs.entries[i][j]);
if (result == 0)
if (result == 0 && i == 0)
result = atomctrl_set_ac_timing_ai(hwmgr, hw_data->dpm_table.mclk_table.dpm_levels[j].value, j);
if (result != 0)
return result;