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drm/amd/pm: correct SMC sclk/mclk boot level setup

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Correct Polaris smc boot level setup.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Evan Quan
2020-09-25 14:36:09 +08:00
committed by Alex Deucher
parent 8f97e221d6
commit 9182fefcb8
1 changed files with 8 additions and 0 deletions
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8
drivers/gpu/drm/amd/pm/powerplay/smumgr/polaris10_smumgr.c
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@@ -1587,10 +1587,18 @@ static int polaris10_populate_smc_boot_level(struct pp_hwmgr *hwmgr,
result = phm_find_boot_level(&(data->dpm_table.sclk_table),
data->vbios_boot_state.sclk_bootup_value,
(uint32_t *)&(table->GraphicsBootLevel));
if (result) {
table->GraphicsBootLevel = 0;
result = 0;
}
result = phm_find_boot_level(&(data->dpm_table.mclk_table),
data->vbios_boot_state.mclk_bootup_value,
(uint32_t *)&(table->MemoryBootLevel));
if (result) {
table->MemoryBootLevel = 0;
result = 0;
}
table->BootVddc = data->vbios_boot_state.vddc_bootup_value *
VOLTAGE_SCALE;