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drm/amd/pm: correct VRconfig setting

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Correct Polaris VRconfig setting.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Evan Quan
2020-09-25 14:10:21 +08:00
committed by Alex Deucher
parent a6d8a6eb3e
commit 55411d1623
1 changed files with 14 additions and 1 deletions
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15
drivers/gpu/drm/amd/pm/powerplay/smumgr/polaris10_smumgr.c
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@@ -1712,6 +1712,9 @@ static int polaris10_populate_vr_config(struct pp_hwmgr *hwmgr,
if (SMU7_VOLTAGE_CONTROL_BY_SVID2 == data->voltage_control) {
config = VR_SVI2_PLANE_1;
table->VRConfig |= config;
} else if (SMU7_VOLTAGE_CONTROL_BY_GPIO == data->voltage_control) {
config = VR_SMIO_PATTERN_1;
table->VRConfig |= config;
} else {
PP_ASSERT_WITH_CODE(false,
"VDDC should be on SVI2 control in merged mode!",
@@ -1730,7 +1733,17 @@ static int polaris10_populate_vr_config(struct pp_hwmgr *hwmgr,
}
/* Set Mvdd Voltage Controller */
if (SMU7_VOLTAGE_CONTROL_BY_SVID2 == data->mvdd_control) {
config = VR_SVI2_PLANE_2;
if (config != VR_SVI2_PLANE_2) {
config = VR_SVI2_PLANE_2;
table->VRConfig |= (config << VRCONF_MVDD_SHIFT);
cgs_write_ind_register(hwmgr->device, CGS_IND_REG__SMC, smu_data->smu7_data.soft_regs_start +
offsetof(SMU74_SoftRegisters, AllowMvddSwitch), 0x1);
} else {
config = VR_STATIC_VOLTAGE;
table->VRConfig |= (config << VRCONF_MVDD_SHIFT);
}
} else if (SMU7_VOLTAGE_CONTROL_BY_GPIO == data->mvdd_control) {
config = VR_SMIO_PATTERN_2;
table->VRConfig |= (config << VRCONF_MVDD_SHIFT);
cgs_write_ind_register(hwmgr->device, CGS_IND_REG__SMC, smu_data->smu7_data.soft_regs_start +
offsetof(SMU74_SoftRegisters, AllowMvddSwitch), 0x1);