Commit Graph

967205 Commits

Author SHA1 Message Date
Arnd Bergmann
c8b53b1c6b Merge tag 'arm-soc/for-5.11/devicetree' of https://github.com/Broadcom/stblinux into arm/dt
This pull request contains Broadcom ARM-based SoCs changes for 5.11,
please pull the following:

- Vivek updates the Linksys EA9500 DTS by adding the two additional
  switch port nodes (5 & 7), providing a flash partition layout to
  make the device usable with OpenWrt, and finally switches to using
  the pin controller rather than using mdio-mux to get the same outcome.

- Serge fixes the USB Device Tree nodes unit name to be conformant to
  the recommended name patterns.

- Rafal re-arranges all the nodes that belonged to the CRU block to be
  under the CRU node (such as PLLs). He also disables the USB3 PHY node
  for devices that lack USB3 and adds USB3 support to the Luxul XWR-3150
  DTS.

- Jonathan drops the incorrect 'io-channel-ranges' from the Cygnus SoC
  DTSI.

- Maxime disables the Wi-Fi frequencies (around 2.4GHz) for HDMI on the
  Raspberry Pi 4 due to some cross-talk between the two blocks.

- Pavel updates the DWC2 USB controller RX FIFO sizes to be more
  accurate for all BCM283x (Raspberr Pi) SoCs.

- Florian updates all BCM5301x and NSP Device Tree files to allow
  switching the Broadcom B53 Ethernet switch device tree binding to YAML.

* tag 'arm-soc/for-5.11/devicetree' of https://github.com/Broadcom/stblinux: (22 commits)
  dt-bindings: net: dsa: b53: Add YAML bindings
  ARM: dts: NSP: Provide defaults ports container node
  ARM: dts: NSP: Add a SRAB compatible string for each board
  ARM: dts: NSP: Fix Ethernet switch SGMII register name
  ARM: dts: NSP: Update ethernet switch node name
  ARM: dts: BCM5301X: Provide defaults ports container node
  ARM: dts: BCM5301X: Add a default compatible for switch node
  ARM: dts: BCM5301X: Update Ethernet switch node name
  dt-bindings: net: dsa: Document sfp and managed properties
  dt-bindings: net: dsa: Extend switch nodes pattern
  ARM: dts: bcm283x: increase dwc2's RX FIFO size
  ARM: dts: rpi-4: disable wifi frequencies
  ARM: dts: Cygnus: Drop incorrect io-channel-ranges property.
  ARM: dts: BCM5301X: Enable USB 3 PHY on Luxul XWR-3150
  ARM: dts: BCM5301X: Disable USB 3 PHY on devices without USB 3
  ARM: dts: BCM5301X: Move CRU devices to the CRU node
  ARM: dts: BCM5301X: Linksys EA9500 make use of pinctrl
  ARM: dts: BCM5301X: Use corretc pinctrl compatible for 4709x
  ARM: dts: BCM5301X: Linksys EA9500 add fixed partitions
  ARM: dts: BCM5310X: Harmonize xHCI DT nodes name
  ...

Link: https://lore.kernel.org/r/20201128163410.1691529-3-f.fainelli@gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-12-08 23:36:22 +01:00
Arnd Bergmann
915a391915 Merge tag 'sunxi-dt-for-5.11' of git://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux into arm/dt
Our usual bunch of patches to support the Allwinner SoCs, this time
adding:
  - Some nice pinephone additions
  - I2S support for the A64, H3, H5 and H6
  - New boards: Elimo Impetus, Elimo Initium, FriendlyArm ZeroPi, NanoPi R1

* tag 'sunxi-dt-for-5.11' of git://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux: (21 commits)
  ARM: dts: sun8i-h2-plus-bananapi-m2-zero: add gpio-line-names
  ARM: dts: sun8i: h3: Add initial NanoPi R1 support
  arm64: dts: allwinner: pinephone: Use generic sensor node names
  ARM: dts: sun8i: s3: Add dts for the Elimo Initium SBC
  dt-bindings: arm: sunxi: add Elimo bindings
  ARM: dts: sun8i: s3: Add dtsi for the Elimo Impetus SoM
  arm64: dts: allwinner: pinephone: Add Bluetooth support
  arm64: dts: allwinner: pinephone: Add WiFi support
  arm64: dts: allwinner: pinephone: Add light/proximity sensor
  arm64: dts: allwinner: pinephone: Add LED flash
  arm64: dts: allwinner: pinephone: Set ALDO3 to exactly 3v0
  arm64: dts: allwinner: pinephone: Remove AC power supply
  arm: dts: sunxi: h3/h5: Add I2S2 node
  arm64: dts: allwinner: a64: Add I2S2 node
  arm64: dts: allwinner: h6: Add I2S1 node
  arm64: dts: allwinner: h6: PineH64 model B: Add wifi
  ARM: dts: sun8i-v3s: Add I2C1 PB pins description
  ARM: dts: sun8i: V3/S3: Add UART1 pin definitions to the V3/S3 dtsi
  dt-bindings: vendors: add Elimo Engineering vendor prefix
  ARM: dts: sun8i: add FriendlyArm ZeroPi support
  ...

Link: https://lore.kernel.org/r/551fdf4f-8a0b-4a22-ba49-b4f61520a9ab.lettre@localhost
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-12-08 23:34:53 +01:00
Arnd Bergmann
ab8d302c48 Merge tag 'at91-dt-5.11' of git://git.kernel.org/pub/scm/linux/kernel/git/at91/linux into arm/dt
AT91 DT for 5.11:

 - fix USB host pinctrl
 - fix DT schema warnings

* tag 'at91-dt-5.11' of git://git.kernel.org/pub/scm/linux/kernel/git/at91/linux:
  ARM: dts: at91: sama5d3_xplained: add pincontrol for USB Host
  ARM: dts: at91: sama5d4_xplained: add pincontrol for USB Host
  ARM: dts: at91: sam9x60: add pincontrol for USB Host
  ARM: dts: at91: at91-sama5d27_som1: fix EEPROM compatible
  ARM: dts: at91: Fix schema warnings for pwm-leds
  ARM: dts: at91: smartkiz: Reference led node directly

Link: https://lore.kernel.org/r/20201127220403.GA1735041@piout.net
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-12-08 23:33:37 +01:00
Arnd Bergmann
914b8de3dd Merge tag 'tegra-for-5.11-arm64-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into arm/dt
arm64: tegra: Device tree changes for v5.11-rc1

These changes are mostly minor fixes across the board, but they also
enable PMUs on Tegra186 and enable SATA support on Jetson TX2.

* tag 'tegra-for-5.11-arm64-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
  arm64: tegra: Fix Tegra194 HDA {clock,reset}-names ordering
  arm64: tegra: Enable AHCI on Jetson TX2
  arm64: tegra: Change order of SATA resets for Tegra132 and Tegra210
  arm64: tegra: Add XUSB pad controller interrupt
  arm64: tegra: Rename ADMA device nodes for Tegra210
  arm64: tegra: Hook up edp interrupt on Tegra132 SOCTHERM
  arm64: tegra: Add missing hot temperatures to Tegra210 thermal-zones
  arm64: tegra: Add missing gpu-throt-level to Tegra210 soctherm
  arm64: tegra: Add missing hot temperatures to Tegra132 thermal-zones
  arm64: tegra: Fix DT binding for IO High Voltage entry
  arm64: tegra: Fix GIC400 missing GICH/GICV register regions
  arm64: tegra: Add missing CPU PMUs on Tegra186
  arm64: tegra: Fix Tegra234 VDK node names
  arm64: tegra: Wrong AON HSP reg property size
  arm64: tegra: Fix USB_VBUS_EN0 regulator on Jetson TX1
  arm64: tegra: Correct the UART for Jetson Xavier NX
  arm64: tegra: Disable the ACONNECT for Jetson TX2

Link: https://lore.kernel.org/r/20201127144329.124891-5-thierry.reding@gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-11-27 18:05:15 +01:00
Arnd Bergmann
9c49a39c8c Merge tag 'tegra-for-5.11-arm-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into arm/dt
ARM: tegra: Device tree changes for v5.11-rc1

This adds support for the Tegra30-based Ouya game console and enhances a
number of existing device trees. It also fixes a couple of minor issues
that were found during DT validation.

* tag 'tegra-for-5.11-arm-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux: (23 commits)
  ARM: tegra: Add EMC OPP and ICC properties to Tegra124 EMC and ACTMON device-tree nodes
  ARM: tegra: Add EMC OPP and ICC properties to Tegra30 EMC and ACTMON device-tree nodes
  ARM: tegra: Add EMC OPP properties to Tegra20 device-trees
  ARM: tegra: Add nvidia,memory-controller phandle to Tegra20 EMC device-tree
  ARM: tegra: Add interconnect properties to Tegra124 device-tree
  ARM: tegra: Add interconnect properties to Tegra30 device-tree
  ARM: tegra: Add interconnect properties to Tegra20 device-tree
  ARM: tegra: acer-a500: Add Embedded Controller
  ARM: tegra: Change order of SATA resets for Tegra124
  ARM: tegra: Correct EMC registers size in Tegra20 device-tree
  ARM: tegra: Properly align clocks for SOCTHERM
  ARM: tegra: Hook up edp interrupt on Tegra124 SOCTHERM
  ARM: tegra: Add missing hot temperatures to Tegra124 thermal-zones
  ARM: tegra: Add missing gpu-throt-level to Tegra124 soctherm
  ARM: tegra: Populate OPP table for Tegra20 Ventana
  ARM: tegra: nexus7: Use panel-lvds as the only panel compatible
  ARM: tegra: nexus7: Rename gpio-hog nodes
  ARM: tegra: nexus7: Add power-supply to lvds-encoder node
  ARM: tegra: nexus7: Improve CPU passive-cooling threshold
  ARM: tegra: nexus7: Correct thermal zone names
  ...

Link: https://lore.kernel.org/r/20201127144329.124891-4-thierry.reding@gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-11-27 18:04:28 +01:00
Arnd Bergmann
3f02c6a828 Merge tag 'tegra-for-5.11-dt-bindings' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into arm/dt
dt-bindings: Changes for v5.11-rc1

This contains a couple of conversions of bindings to json-schema, as
well as symbolic names for the various memory clients on Tegra20,
Tegra30 and Tegra124. There's also a couple of fixes for Tegra194
pinmux and ARM GIC bindings. Finally, a new vendor prefix is added
for Ouya and the Ouya game console compatible string is defined.

* tag 'tegra-for-5.11-dt-bindings' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
  dt-bindings: bus: Convert ACONNECT doc to json-schema
  dt-bindings: interrupt-controller: arm,gic: Update Tegra compatibles
  dt-bindings: dma: Convert ADMA doc to json-schema
  dt-bindings: Fix entry name for I/O High Voltage property
  dt-bindings: ARM: tegra: Add Ouya game console
  dt-bindings: Add vendor prefix for Ouya Inc.
  dt-bindings: memory: tegra124: Add memory client IDs
  dt-bindings: memory: tegra30: Add memory client IDs
  dt-bindings: memory: tegra20: Add memory client IDs

Link: https://lore.kernel.org/r/20201127144329.124891-1-thierry.reding@gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-11-27 18:03:16 +01:00
Arnd Bergmann
eb149c927d Merge tag 'renesas-arm-dt-for-v5.11-tag2' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel into arm/dt
Renesas ARM DT updates for v5.11 (take two)

  - PCIe endpoint support for the R-Car H3 ES2.0+ SoC.

* tag 'renesas-arm-dt-for-v5.11-tag2' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel:
  arm64: dts: renesas: r8a77951: Add PCIe EP nodes

Link: https://lore.kernel.org/r/20201127132155.77418-2-geert@linux-m68k.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-11-27 18:02:46 +01:00
Arnd Bergmann
fcc3e3c3a4 Merge tag 'stm32-dt-for-v5.11-1' of git://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32 into arm/dt
STM32 DT updates for v5.11, round 1

Highlights:
----------

MCU part:
 -Fix dmamux reg property (length) on stm32h743.
 -Explicitly set DCMI bus type on stm32429i eval board.

MPU part:
 -Enable FIFO mode with half-full threshold for DCMI.
 -Harmonize EHCI/OHCI nodes.
 -Move SDMMC IP version to v2.0 to get features improvements.
 -Add LP-timer wakeup support.
 -Enable crypto/hash/crc support.
 -Explicitly set DCMI bus type on stm32mp157 eval board.
 -Add USB type-c controller (STUSB1600) on stm32mp15 DK boards
  (It is connected to I2C4).
 -Fix dmamux reg property (length) on stm32mp151.
 -Optimize USB OTG FIFO sizes on stm32mp151.
 -Declare tamp node also as "simple-mfd".

 -LXA:
  -Document Octavo vendor-prefixes yaml file.
  -Document lxa,stm32mp157c-mc1 in STM32 yaml file.

 -DH:
  -Connect PHY IRQ line on DH SoM.
  -Add KS8851 Ethernet support on DHCOM which is mapped to FMC2.
  -Document all DH compatible strings in STM32 yaml file.
  -Add DHCOM based PicoITX board. This board embedds ethernet port,
   USB, CAN LEDS and a custom board-to-board connector.

* tag 'stm32-dt-for-v5.11-1' of git://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32: (34 commits)
  ARM: dts: stm32: lxa-mc1: add OSD32MP15x to list of compatibles
  dt-bindings: arm: stm32: add extra SiP compatible for lxa,stm32mp157c-mc1
  dt-bindings: vendor-prefixes: document Octavo Systems oct prefix
  ARM: dts: stm32: Add DHCOM based PicoITX board
  dt-bindings: arm: stm32: Add compatible strings for DH SoMs and boards
  ARM: dts: stm32: support child mfd cells for the stm32mp1 TAMP syscon
  dt-bindings: arm: stm32: add simple-mfd compatible for tamp node
  ARM: dts: stm32: update stm32mp151 for remote proc synchronization support
  ARM: dts: stm32: adjust USB OTG gadget fifo sizes in stm32mp151
  ARM: dts: stm32: fix dmamux reg property on stm32h743
  ARM: dts: stm32: fix dmamux reg property on stm32mp151
  ARM: dts: stm32: fix mdma1 clients channel priority level on stm32mp151
  ARM: dts: stm32: add STUSB1600 Type-C using I2C4 on stm32mp15xx-dkx
  dt-bindings: usb: Add DT bindings for STUSB160x Type-C controller
  dt-bindings: connector: add typec-power-opmode property to usb-connector
  ARM: dts: stm32: reorder spi4 within stm32mp15-pinctrl
  ARM: dts: stm32: set bus-type in DCMI endpoint for stm32429i-eval board
  ARM: dts: stm32: set bus-type in DCMI endpoint for stm32mp157c-ev1 board
  ARM: dts: stm32: enable CRYP by default on stm32mp15
  ARM: dts: stm32: enable CRC1 by default on stm32mp15
  ...

Link: https://lore.kernel.org/r/873c17a5-28d5-9261-f691-1b917611c932@foss.st.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-11-27 18:00:08 +01:00
Arnd Bergmann
3a53840627 Merge tag 'omap-for-v5.11/dt-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into arm/dt
Devicetree changes for omaps for v5.11 merge window

- Two non-urgent pandaboard updates to get gpio button and bluetooth
  working on pandaboard-es

- Updates to follow devicetree binding docs for dwc3 and pwm-leds

- Add initial support for droid bionic based on what we have for droid4

- Add second sha instance for dra7

- Add eQEP nodes for am335x for boneblue

- Fix wrong comments for am335x gpio_31

* tag 'omap-for-v5.11/dt-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
  ARM: dts: am335x: Fix comments for AM335X_PIN_GPMC_WPN pin in GPIO mode
  ARM: dts: am335x-boneblue: Enable eQEP
  ARM: dts: am33xx: Add nodes for eQEP
  ARM: dts: dra7: add second SHA instance
  ARM: dts: xt875: add section for kionix kxtf9
  ARM: dts: mapphone: separate out xt894 specific things
  ARM: dts: omap: Fix schema warnings for pwm-leds
  ARM: dts: omap5: Harmonize DWC USB3 DT nodes name
  ARM: dts: am437x: Correct DWC USB3 compatible string
  ARM: dts: pandaboard es: add bluetooth uart for HCI
  ARM: dts: pandaboard: fix pinmux for gpio user button of Pandaboard ES

Link: https://lore.kernel.org/r/pull-1606462656-588116@atomide.com-2
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-11-27 17:58:28 +01:00
Yuya Hamamachi
0f80b9b812 arm64: dts: renesas: r8a77951: Add PCIe EP nodes
Add PCIe EP nodes for R8A77951 SoC dtsi.

Signed-off-by: Yuya Hamamachi <yuya.hamamachi.sx@renesas.com>
Link: https://lore.kernel.org/r/20201125073303.19057-3-yuya.hamamachi.sx@renesas.com
Signed-off-by: Geert Uytterhoeven <geert@linux-m68k.org>
2020-11-27 09:07:06 +01:00
Arnd Bergmann
2df8aa0373 Merge tag 'hisi-arm64-dt-for-5.11' of git://github.com/hisilicon/linux-hisi into arm/dt
ARM64: DT: Hisilicon ARM64 DT updates for 5.11

- Cleanups of the hisilicon DTS to align with the dtschema. All of them do not
  have any functional effect except passing dtschema checks or dtc W=2 builds.

* tag 'hisi-arm64-dt-for-5.11' of git://github.com/hisilicon/linux-hisi:
  arm64: dts: hisilicon: Use generic "ngpios" rather than "snps,nr-gpios"
  arm64: dts: hi3660: Harmonize DWC USB3 DT nodes name
  arm64: dts: hisilicon: list all clocks required by snps-dw-apb-uart.yaml
  arm64: dts: hisilicon: list all clocks required by pl011.yaml
  arm64: dts: hisilicon: list all clocks required by spi-pl022.yaml
  arm64: dts: hisilicon: normalize the node name of the UART devices
  arm64: dts: hisilicon: normalize the node name of the usb devices
  arm64: dts: hisilicon: normalize the node name of the SMMU devices
  arm64: dts: hisilicon: place clock-names "biu" before "ciu"
  arm64: dts: hisilicon: remove unused property pinctrl-names
  arm64: dts: hisilicon: write the values of property-units into a uint32 array
  arm64: dts: hisilicon: separate each group of data in the property "reg"
  arm64: dts: hisilicon: normalize the node name of the ITS devices

Link: https://lore.kernel.org/r/5FBDC416.5060008@hisilicon.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-11-26 22:11:52 +01:00
Arnd Bergmann
3319f1489e Merge tag 'hisi-arm32-dt-for-5.11' of git://github.com/hisilicon/linux-hisi into arm/dt
ARM: DT: Hisilicon ARM32 DT updates for 5.11

- Cleanups of the hisilicon DTS to align with the dtschema including
  serial, usb, amba-bus, memory, mmc, spi and syscon. All of them do not
  have any functional effect except passing dtschema checks or dtc W=2
  builds.

* tag 'hisi-arm32-dt-for-5.11' of git://github.com/hisilicon/linux-hisi:
  ARM: dts: hisilicon: fix errors detected by syscon.yaml
  ARM: dts: hisilicon: fix errors detected by spi-pl022.yaml
  ARM: dts: hisilicon: fix errors detected by synopsys-dw-mshc.yaml
  ARM: dts: hisilicon: fix errors detected by root-node.yaml
  ARM: dts: hisilicon: fix errors detected by simple-bus.yaml
  ARM: dts: hisilicon: fix errors detected by usb yaml
  ARM: dts: hisilicon: fix errors detected by pl011.yaml
  ARM: dts: hisilicon: fix errors detected by snps-dw-apb-uart.yaml

Link: https://lore.kernel.org/r/5FBDC347.4050102@hisilicon.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-11-26 22:09:36 +01:00
Dmitry Osipenko
d63250d7fd ARM: tegra: Add EMC OPP and ICC properties to Tegra124 EMC and ACTMON device-tree nodes
Add EMC OPP DVFS/DFS tables and interconnect paths that will be used for
dynamic memory bandwidth scaling based on memory utilization statistics.
Update board device-trees by removing unsupported EMC OPPs.

Note that ACTMON watches all memory interconnect paths, but we use a
single CPU-READ interconnect path for driving memory bandwidth, for
simplicity.

Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-11-26 19:08:39 +01:00
Dmitry Osipenko
881741fa44 ARM: tegra: Add EMC OPP and ICC properties to Tegra30 EMC and ACTMON device-tree nodes
Add EMC OPP tables and interconnect paths that will be used for
dynamic memory bandwidth scaling based on memory utilization statistics.
Update board device-trees by removing unsupported EMC OPPs.

Note that ACTMON watches all memory interconnect paths, but we use a
single CPU-READ interconnect path for driving memory bandwidth, for
simplicity.

Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-11-26 19:08:29 +01:00
Dmitry Osipenko
f5204ac47b ARM: tegra: Add EMC OPP properties to Tegra20 device-trees
Add EMC OPP DVFS tables and update board device-trees by removing
unsupported OPPs.

Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-11-26 19:08:17 +01:00
Dmitry Osipenko
b97967d7d5 ARM: tegra: Add nvidia,memory-controller phandle to Tegra20 EMC device-tree
Add nvidia,memory-controller to the Tegra20 External Memory Controller
node. This allows to perform a direct lookup of the Memory Controller
instead of walking up the whole tree. This puts Tegra20 device-tree on
par with Tegra30+.

Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-11-26 19:07:49 +01:00
Dmitry Osipenko
5cf0cdbd55 ARM: tegra: Add interconnect properties to Tegra124 device-tree
Add interconnect properties to the Memory Controller, External Memory
Controller and the Display Controller nodes in order to describe hardware
interconnection.

Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-11-26 19:07:39 +01:00
Dmitry Osipenko
69ea8fa77f ARM: tegra: Add interconnect properties to Tegra30 device-tree
Add interconnect properties to the Memory Controller, External Memory
Controller and the Display Controller nodes in order to describe hardware
interconnection.

Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-11-26 19:07:25 +01:00
Dmitry Osipenko
30b81e77a0 ARM: tegra: Add interconnect properties to Tegra20 device-tree
Add interconnect properties to the Memory Controller, External Memory
Controller and the Display Controller nodes in order to describe hardware
interconnection.

Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-11-26 19:07:14 +01:00
Dmitry Osipenko
d3e815eaab ARM: tegra: acer-a500: Add Embedded Controller
This patch adds device-tree node for the Embedded Controller which is
found on the Picasso board. The Embedded Controller itself is ENE KB930,
it provides functions like battery-gauge/LED/GPIO/etc and it uses firmware
that is specifically customized for the Acer A500 device.

Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-11-26 19:06:48 +01:00
Sowjanya Komatineni
dd2a21d093 ARM: tegra: Change order of SATA resets for Tegra124
Tegra AHCI dt-binding doc is converted from text based to yaml based.

dtbs_check valdiation strictly follows reset-names order specified
in yaml dt-binding.

Tegra124 thru Tegra210 has 3 resets sata, sata-oob and sata-cold.
Tegra186 has 2 resets sata and sata-cold.

This patch changes order of SATA resets to maintain proper resets
order for commonly available resets across Tegra124 thru Tegra186
for dtbs_check to pass.

Signed-off-by: Sowjanya Komatineni <skomatineni@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-11-26 19:06:47 +01:00
Dmitry Osipenko
8b809ba66c ARM: tegra: Correct EMC registers size in Tegra20 device-tree
Fix the size of Tegra20 EMC registers, which should be twice bigger.

Acked-by: Krzysztof Kozlowski <krzk@kernel.org>
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-11-26 19:06:47 +01:00
Thierry Reding
6fb123f1f5 ARM: tegra: Properly align clocks for SOCTHERM
Entries on subsequent lines should be aligned with the entry on the
first line.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-11-26 19:06:47 +01:00
Thierry Reding
17401ce98e ARM: tegra: Hook up edp interrupt on Tegra124 SOCTHERM
For some reason this was never hooked up. Do it now so that over-current
interrupts can be logged.

Reported-by: Nicolas Chauvet <kwizart@gmail.com>
Suggested-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-11-26 19:06:47 +01:00
Nicolas Chauvet
252cc72af6 ARM: tegra: Add missing hot temperatures to Tegra124 thermal-zones
According to dmesg, thermal-zones for mem and cpu are missing hot
temperatures properties.

  throttrip: pll: missing hot temperature
...
  throttrip: mem: missing hot temperature
...

Adding them will clear the messages.

Signed-off-by: Nicolas Chauvet <kwizart@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-11-26 19:06:47 +01:00
Nicolas Chauvet
37ac8c4c04 ARM: tegra: Add missing gpu-throt-level to Tegra124 soctherm
On Jetson TK1 the following message can be seen:

 tegra_soctherm 700e2000.thermal-sensor: throttle-cfg: heavy: no throt prop or invalid prop

This patch will fix the invalid prop issue according to the binding.

Signed-off-by: Nicolas Chauvet <kwizart@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-11-26 19:06:46 +01:00
Jon Hunter
bd7cd7e05a ARM: tegra: Populate OPP table for Tegra20 Ventana
Commit 9ce2746304 ("cpufreq: tegra20: Use generic cpufreq-dt driver
(Tegra30 supported now)") update the Tegra20 CPUFREQ driver to use the
generic CPUFREQ device-tree driver. Since this change CPUFREQ support
on the Tegra20 Ventana platform has been broken because the necessary
device-tree nodes with the operating point information are not populated
for this platform. Fix this by updating device-tree for Venata to
include the operating point informration for Tegra20.

Fixes: 9ce2746304 ("cpufreq: tegra20: Use generic cpufreq-dt driver (Tegra30 supported now)")
Cc: stable@vger.kernel.org
Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-11-26 19:06:46 +01:00
Dmitry Osipenko
a21f18a993 ARM: tegra: nexus7: Use panel-lvds as the only panel compatible
Depending on a driver probe order, panel-simple driver may probe first,
which results in this error:

  panel-simple display-panel: Reject override mode: panel has a fixed mode

We don't want to use panel-simple anyways because customized timings are
preferred for Nexus 7, hence remove the panel-simple compatibles from the
panel node.

Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-11-26 19:06:46 +01:00
Dmitry Osipenko
b8ae171506 ARM: tegra: nexus7: Rename gpio-hog nodes
Devicetree schema now requires gpio-hog nodes to have a certain naming
pattern, like a -hog suffix. This patch fixes dtbs_check warnings about
the names.

Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-11-26 19:06:46 +01:00
Dmitry Osipenko
810719453c ARM: tegra: nexus7: Add power-supply to lvds-encoder node
The lvds-encoder binding now supports power-supply property, let's specify
it in the device-tree for completeness.

Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-11-26 19:06:45 +01:00
Dmitry Osipenko
2b22393b27 ARM: tegra: nexus7: Improve CPU passive-cooling threshold
The current CPU thermal limit is a bit inappropriate for Nexus 7 once
device is getting used on a daily bases. For example, currently it's may
be impossible to watch a hardware accelerated 720p video without hitting
a severe CPU throttling, which ruins user experience. This patch improves
the thermal throttling thresholds.

In my experience setting CPU thermal threshold to 57C provides the most
reasonable result, where device is a bit warm under constant load and
not getting overly hot, in the same time performance is okay. Let's bump
the passive-cooling threshold from 50C to 57C and also lower the thermal
hysteresis to 0.2C in order to make throttling more reactive.

Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-11-26 19:06:45 +01:00
Dmitry Osipenko
8857779a9f ARM: tegra: nexus7: Correct thermal zone names
Rename thermal zones in order fix dt_binding_check warning telling that
names do not match the expected pattern.

Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-11-26 19:06:45 +01:00
Dmitry Osipenko
5b0455f82b ARM: tegra: acer-a500: Add power-supply to lvds-encoder node
The lvds-encoder binding now supports power-supply property, let's specify
it in the device-tree for completeness.

Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-11-26 19:06:44 +01:00
Dmitry Osipenko
94f13b9ca3 ARM: tegra: acer-a500: Correct thermal zone names
Rename thermal zones in order fix dt_binding_check warning telling that
names do not match the expected pattern.

Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-11-26 19:06:44 +01:00
Peter Geis
d7195ac5c9 ARM: tegra: Add device-tree for Ouya
The Ouya was the sole device produced by Ouya Inc in 2013.
It was a game console originally running Android 5 on top of Linux 3.1.10.

This patch adds the device tree supporting the Ouya.
It has been tested on the original variant with Samsung ram.

Signed-off-by: Peter Geis <pgwipeout@gmail.com>
Reviewed-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-11-26 19:06:44 +01:00
Thierry Reding
85b16c8753 Merge branch 'for-5.11/dt-bindings' into for-5.11/arm/dt 2020-11-26 19:06:15 +01:00
Sameer Pujar
e36f938142 dt-bindings: bus: Convert ACONNECT doc to json-schema
Move ACONNECT documentation to YAML format.

Signed-off-by: Sameer Pujar <spujar@nvidia.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-11-26 19:05:17 +01:00
Sameer Pujar
d806cdaea1 dt-bindings: interrupt-controller: arm,gic: Update Tegra compatibles
Update Tegra compatibles to support newer Tegra chips and required
combinations.

Signed-off-by: Sameer Pujar <spujar@nvidia.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-11-26 19:05:17 +01:00
Sameer Pujar
15f76096fa dt-bindings: dma: Convert ADMA doc to json-schema
Move ADMA documentation to YAML format.

Signed-off-by: Sameer Pujar <spujar@nvidia.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-11-26 19:05:17 +01:00
Dmitry Osipenko
24a7eaea0a dt-bindings: memory: tegra124: Add memory client IDs
Each memory client has unique hardware ID, add these IDs.

Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Acked-by: Krzysztof Kozlowski <krzk@kernel.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-11-26 19:05:16 +01:00
Vidya Sagar
3394f98435 dt-bindings: Fix entry name for I/O High Voltage property
Correct the name of the I/O High Voltage Property from
'nvidia,io-high-voltage' to 'nvidia,io-hv'.

Fixes: 2585a584f8 ("pinctrl: Add Tegra194 pinctrl DT bindings")
Signed-off-by: Vidya Sagar <vidyas@nvidia.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-11-26 19:05:16 +01:00
Peter Geis
1f956a6430 dt-bindings: ARM: tegra: Add Ouya game console
Add a binding for the Tegra30-based Ouya game console.

Signed-off-by: Peter Geis <pgwipeout@gmail.com>
Acked-by: Rob Herring <robh@kernel.org>
Reviewed-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-11-26 19:05:16 +01:00
Peter Geis
9572399af3 dt-bindings: Add vendor prefix for Ouya Inc.
Ouya is a defunct company from 2012 to 2015.
They produced a single device, the Ouya game console.
In 2015 they were purchased by Razer Inc. and the Ouya was discontinued.
All Ouya services were shuttered in 2019.

Signed-off-by: Peter Geis <pgwipeout@gmail.com>
Acked-by: Rob Herring <robh@kernel.org>
Reviewed-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-11-26 19:05:16 +01:00
Dmitry Osipenko
f25696bce9 dt-bindings: memory: tegra30: Add memory client IDs
Each memory client has unique hardware ID, add these IDs.

Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Acked-by: Krzysztof Kozlowski <krzk@kernel.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-11-26 19:05:15 +01:00
Dmitry Osipenko
825c7f4aa2 dt-bindings: memory: tegra20: Add memory client IDs
Each memory client has unique hardware ID, add these IDs.

Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Acked-by: Krzysztof Kozlowski <krzk@kernel.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-11-26 19:05:15 +01:00
Sameer Pujar
48f6e19503 arm64: tegra: Fix Tegra194 HDA {clock,reset}-names ordering
As per the HDA binding doc reorder {clock,reset}-names entries for
Tegra194. This also serves as a preparation for converting existing
binding doc to json-schema.

Signed-off-by: Sameer Pujar <spujar@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-11-26 16:33:04 +01:00
Sowjanya Komatineni
e061fbdf7d arm64: tegra: Enable AHCI on Jetson TX2
This patch enables AHCI on Jetson TX2.

Signed-off-by: Sowjanya Komatineni <skomatineni@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-11-26 16:25:50 +01:00
Sowjanya Komatineni
c84ebdfd26 arm64: tegra: Change order of SATA resets for Tegra132 and Tegra210
Tegra AHCI dt-binding doc is converted from text based to yaml based.

dtbs_check valdiation strictly follows reset-names order specified
in yaml dt-binding.

Tegra124 thru Tegra210 has 3 resets sata, sata-oob and sata-cold.
Tegra186 has 2 resets sata and sata-cold.

This patch changes order of SATA resets to maintain proper resets
order for commonly available resets across Tegra124 thru Tegra186
for dtbs_check to pass.

Signed-off-by: Sowjanya Komatineni <skomatineni@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-11-26 16:24:59 +01:00
JC Kuo
6450da3dab arm64: tegra: Add XUSB pad controller interrupt
This commit adds "interrupts" property to Tegra210/Tegra186/Tegra194
XUSB PADCTL node. XUSB PADCTL interrupt will be raised when USB wake
event happens. This is required for supporting XUSB host controller
ELPG.

Signed-off-by: JC Kuo <jckuo@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-11-26 16:15:51 +01:00
Ahmad Fatoum
6660e24455 ARM: dts: stm32: lxa-mc1: add OSD32MP15x to list of compatibles
Earlier commit modified the binding, so the SiP is to be specified
as well. Adjust the device tree accordingly.

Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
2020-11-26 14:42:41 +01:00