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ARM: tegra: Add interconnect properties to Tegra30 device-tree

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Add interconnect properties to the Memory Controller, External Memory
Controller and the Display Controller nodes in order to describe hardware
interconnection.

Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
This commit is contained in:
Dmitry Osipenko
2020-11-23 03:27:18 +03:00
committed by Thierry Reding
parent 30b81e77a0
commit 69ea8fa77f
1 changed files with 26 additions and 1 deletions
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27
arch/arm/boot/dts/tegra30.dtsi
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@@ -210,6 +210,17 @@ dc@54200000 {
nvidia,head = <0>;
interconnects = <&mc TEGRA30_MC_DISPLAY0A &emc>,
<&mc TEGRA30_MC_DISPLAY0B &emc>,
<&mc TEGRA30_MC_DISPLAY1B &emc>,
<&mc TEGRA30_MC_DISPLAY0C &emc>,
<&mc TEGRA30_MC_DISPLAYHC &emc>;
interconnect-names = "wina",
"winb",
"winb-vfilter",
"winc",
"cursor";
rgb {
status = "disabled";
};
@@ -229,6 +240,17 @@ dc@54240000 {
nvidia,head = <1>;
interconnects = <&mc TEGRA30_MC_DISPLAY0AB &emc>,
<&mc TEGRA30_MC_DISPLAY0BB &emc>,
<&mc TEGRA30_MC_DISPLAY1BB &emc>,
<&mc TEGRA30_MC_DISPLAY0CB &emc>,
<&mc TEGRA30_MC_DISPLAYHCB &emc>;
interconnect-names = "wina",
"winb",
"winb-vfilter",
"winc",
"cursor";
rgb {
status = "disabled";
};
@@ -748,15 +770,18 @@ mc: memory-controller@7000f000 {
#iommu-cells = <1>;
#reset-cells = <1>;
#interconnect-cells = <1>;
};
memory-controller@7000f400 {
emc: memory-controller@7000f400 {
compatible = "nvidia,tegra30-emc";
reg = <0x7000f400 0x400>;
interrupts = <GIC_SPI 78 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&tegra_car TEGRA30_CLK_EMC>;
nvidia,memory-controller = <&mc>;
#interconnect-cells = <0>;
};
fuse@7000f800 {