Merge tag 'tegra-for-5.11-arm-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into arm/dt

ARM: tegra: Device tree changes for v5.11-rc1

This adds support for the Tegra30-based Ouya game console and enhances a
number of existing device trees. It also fixes a couple of minor issues
that were found during DT validation.

* tag 'tegra-for-5.11-arm-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux: (23 commits)
  ARM: tegra: Add EMC OPP and ICC properties to Tegra124 EMC and ACTMON device-tree nodes
  ARM: tegra: Add EMC OPP and ICC properties to Tegra30 EMC and ACTMON device-tree nodes
  ARM: tegra: Add EMC OPP properties to Tegra20 device-trees
  ARM: tegra: Add nvidia,memory-controller phandle to Tegra20 EMC device-tree
  ARM: tegra: Add interconnect properties to Tegra124 device-tree
  ARM: tegra: Add interconnect properties to Tegra30 device-tree
  ARM: tegra: Add interconnect properties to Tegra20 device-tree
  ARM: tegra: acer-a500: Add Embedded Controller
  ARM: tegra: Change order of SATA resets for Tegra124
  ARM: tegra: Correct EMC registers size in Tegra20 device-tree
  ARM: tegra: Properly align clocks for SOCTHERM
  ARM: tegra: Hook up edp interrupt on Tegra124 SOCTHERM
  ARM: tegra: Add missing hot temperatures to Tegra124 thermal-zones
  ARM: tegra: Add missing gpu-throt-level to Tegra124 soctherm
  ARM: tegra: Populate OPP table for Tegra20 Ventana
  ARM: tegra: nexus7: Use panel-lvds as the only panel compatible
  ARM: tegra: nexus7: Rename gpio-hog nodes
  ARM: tegra: nexus7: Add power-supply to lvds-encoder node
  ARM: tegra: nexus7: Improve CPU passive-cooling threshold
  ARM: tegra: nexus7: Correct thermal zone names
  ...

Link: https://lore.kernel.org/r/20201127144329.124891-4-thierry.reding@gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This commit is contained in:
Arnd Bergmann
2020-11-27 18:04:28 +01:00
20 changed files with 5656 additions and 22 deletions

View File

@@ -1242,7 +1242,8 @@ dtb-$(CONFIG_ARCH_TEGRA_3x_SOC) += \
tegra30-beaver.dtb \
tegra30-cardhu-a02.dtb \
tegra30-cardhu-a04.dtb \
tegra30-colibri-eval-v3.dtb
tegra30-colibri-eval-v3.dtb \
tegra30-ouya.dtb
dtb-$(CONFIG_ARCH_TEGRA_114_SOC) += \
tegra114-dalmore.dtb \
tegra114-roth.dtb \

View File

@@ -1465,3 +1465,11 @@ timing-924000000 {
};
};
};
&emc_icc_dvfs_opp_table {
/delete-node/ opp@1200000000,1100;
};
&emc_bw_dfs_opp_table {
/delete-node/ opp@1200000000;
};

View File

@@ -2420,3 +2420,11 @@ timing-924000000 {
};
};
};
&emc_icc_dvfs_opp_table {
/delete-node/ opp@1200000000,1100;
};
&emc_bw_dfs_opp_table {
/delete-node/ opp@1200000000;
};

View File

@@ -6649,3 +6649,13 @@ timing-792000000 {
};
};
};
&emc_icc_dvfs_opp_table {
/delete-node/ opp@924000000,1100;
/delete-node/ opp@1200000000,1100;
};
&emc_bw_dfs_opp_table {
/delete-node/ opp@924000000;
/delete-node/ opp@1200000000;
};

View File

@@ -2048,3 +2048,13 @@ timing-792000000 {
};
};
};
&emc_icc_dvfs_opp_table {
/delete-node/ opp@924000000,1100;
/delete-node/ opp@1200000000,1100;
};
&emc_bw_dfs_opp_table {
/delete-node/ opp@924000000;
/delete-node/ opp@1200000000;
};

View File

@@ -0,0 +1,419 @@
// SPDX-License-Identifier: GPL-2.0
/ {
emc_icc_dvfs_opp_table: emc-dvfs-opp-table {
compatible = "operating-points-v2";
opp@12750000,800 {
opp-microvolt = <800000 800000 1150000>;
opp-hz = /bits/ 64 <12750000>;
opp-supported-hw = <0x0003>;
};
opp@12750000,950 {
opp-microvolt = <950000 950000 1150000>;
opp-hz = /bits/ 64 <12750000>;
opp-supported-hw = <0x0008>;
};
opp@12750000,1050 {
opp-microvolt = <1050000 1050000 1150000>;
opp-hz = /bits/ 64 <12750000>;
opp-supported-hw = <0x0010>;
};
opp@12750000,1110 {
opp-microvolt = <1110000 1110000 1150000>;
opp-hz = /bits/ 64 <12750000>;
opp-supported-hw = <0x0004>;
};
opp@20400000,800 {
opp-microvolt = <800000 800000 1150000>;
opp-hz = /bits/ 64 <20400000>;
opp-supported-hw = <0x0003>;
};
opp@20400000,950 {
opp-microvolt = <950000 950000 1150000>;
opp-hz = /bits/ 64 <20400000>;
opp-supported-hw = <0x0008>;
};
opp@20400000,1050 {
opp-microvolt = <1050000 1050000 1150000>;
opp-hz = /bits/ 64 <20400000>;
opp-supported-hw = <0x0010>;
};
opp@20400000,1110 {
opp-microvolt = <1110000 1110000 1150000>;
opp-hz = /bits/ 64 <20400000>;
opp-supported-hw = <0x0004>;
};
opp@40800000,800 {
opp-microvolt = <800000 800000 1150000>;
opp-hz = /bits/ 64 <40800000>;
opp-supported-hw = <0x0003>;
};
opp@40800000,950 {
opp-microvolt = <950000 950000 1150000>;
opp-hz = /bits/ 64 <40800000>;
opp-supported-hw = <0x0008>;
};
opp@40800000,1050 {
opp-microvolt = <1050000 1050000 1150000>;
opp-hz = /bits/ 64 <40800000>;
opp-supported-hw = <0x0010>;
};
opp@40800000,1110 {
opp-microvolt = <1110000 1110000 1150000>;
opp-hz = /bits/ 64 <40800000>;
opp-supported-hw = <0x0004>;
};
opp@68000000,800 {
opp-microvolt = <800000 800000 1150000>;
opp-hz = /bits/ 64 <68000000>;
opp-supported-hw = <0x0003>;
};
opp@68000000,950 {
opp-microvolt = <950000 950000 1150000>;
opp-hz = /bits/ 64 <68000000>;
opp-supported-hw = <0x0008>;
};
opp@68000000,1050 {
opp-microvolt = <1050000 1050000 1150000>;
opp-hz = /bits/ 64 <68000000>;
opp-supported-hw = <0x0010>;
};
opp@68000000,1110 {
opp-microvolt = <1110000 1110000 1150000>;
opp-hz = /bits/ 64 <68000000>;
opp-supported-hw = <0x0004>;
};
opp@102000000,800 {
opp-microvolt = <800000 800000 1150000>;
opp-hz = /bits/ 64 <102000000>;
opp-supported-hw = <0x0003>;
};
opp@102000000,950 {
opp-microvolt = <950000 950000 1150000>;
opp-hz = /bits/ 64 <102000000>;
opp-supported-hw = <0x0008>;
};
opp@102000000,1050 {
opp-microvolt = <1050000 1050000 1150000>;
opp-hz = /bits/ 64 <102000000>;
opp-supported-hw = <0x0010>;
};
opp@102000000,1110 {
opp-microvolt = <1110000 1110000 1150000>;
opp-hz = /bits/ 64 <102000000>;
opp-supported-hw = <0x0004>;
};
opp@204000000,800 {
opp-microvolt = <800000 800000 1150000>;
opp-hz = /bits/ 64 <204000000>;
opp-supported-hw = <0x0003>;
};
opp@204000000,950 {
opp-microvolt = <950000 950000 1150000>;
opp-hz = /bits/ 64 <204000000>;
opp-supported-hw = <0x0008>;
};
opp@204000000,1050 {
opp-microvolt = <1050000 1050000 1150000>;
opp-hz = /bits/ 64 <204000000>;
opp-supported-hw = <0x0010>;
};
opp@204000000,1110 {
opp-microvolt = <1110000 1110000 1150000>;
opp-hz = /bits/ 64 <204000000>;
opp-supported-hw = <0x0004>;
};
opp@264000000,800 {
opp-microvolt = <800000 800000 1150000>;
opp-hz = /bits/ 64 <264000000>;
opp-supported-hw = <0x0003>;
};
opp@264000000,950 {
opp-microvolt = <950000 950000 1150000>;
opp-hz = /bits/ 64 <264000000>;
opp-supported-hw = <0x0008>;
};
opp@264000000,1050 {
opp-microvolt = <1050000 1050000 1150000>;
opp-hz = /bits/ 64 <264000000>;
opp-supported-hw = <0x0010>;
};
opp@264000000,1110 {
opp-microvolt = <1110000 1110000 1150000>;
opp-hz = /bits/ 64 <264000000>;
opp-supported-hw = <0x0004>;
};
opp@300000000,850 {
opp-microvolt = <850000 850000 1150000>;
opp-hz = /bits/ 64 <300000000>;
opp-supported-hw = <0x0003>;
};
opp@300000000,950 {
opp-microvolt = <950000 950000 1150000>;
opp-hz = /bits/ 64 <300000000>;
opp-supported-hw = <0x0008>;
};
opp@300000000,1050 {
opp-microvolt = <1050000 1050000 1150000>;
opp-hz = /bits/ 64 <300000000>;
opp-supported-hw = <0x0010>;
};
opp@300000000,1110 {
opp-microvolt = <1110000 1110000 1150000>;
opp-hz = /bits/ 64 <300000000>;
opp-supported-hw = <0x0004>;
};
opp@348000000,850 {
opp-microvolt = <850000 850000 1150000>;
opp-hz = /bits/ 64 <348000000>;
opp-supported-hw = <0x0003>;
};
opp@348000000,950 {
opp-microvolt = <950000 950000 1150000>;
opp-hz = /bits/ 64 <348000000>;
opp-supported-hw = <0x0008>;
};
opp@348000000,1050 {
opp-microvolt = <1050000 1050000 1150000>;
opp-hz = /bits/ 64 <348000000>;
opp-supported-hw = <0x0010>;
};
opp@348000000,1110 {
opp-microvolt = <1110000 1110000 1150000>;
opp-hz = /bits/ 64 <348000000>;
opp-supported-hw = <0x0004>;
};
opp@396000000,950 {
opp-microvolt = <950000 950000 1150000>;
opp-hz = /bits/ 64 <396000000>;
opp-supported-hw = <0x0008>;
};
opp@396000000,1000 {
opp-microvolt = <1000000 1000000 1150000>;
opp-hz = /bits/ 64 <396000000>;
opp-supported-hw = <0x0003>;
};
opp@396000000,1050 {
opp-microvolt = <1050000 1050000 1150000>;
opp-hz = /bits/ 64 <396000000>;
opp-supported-hw = <0x0010>;
};
opp@396000000,1110 {
opp-microvolt = <1110000 1110000 1150000>;
opp-hz = /bits/ 64 <396000000>;
opp-supported-hw = <0x0004>;
};
opp@528000000,950 {
opp-microvolt = <950000 950000 1150000>;
opp-hz = /bits/ 64 <528000000>;
opp-supported-hw = <0x0008>;
};
opp@528000000,1000 {
opp-microvolt = <1000000 1000000 1150000>;
opp-hz = /bits/ 64 <528000000>;
opp-supported-hw = <0x0003>;
};
opp@528000000,1050 {
opp-microvolt = <1050000 1050000 1150000>;
opp-hz = /bits/ 64 <528000000>;
opp-supported-hw = <0x0010>;
};
opp@528000000,1110 {
opp-microvolt = <1110000 1110000 1150000>;
opp-hz = /bits/ 64 <528000000>;
opp-supported-hw = <0x0004>;
};
opp@600000000,950 {
opp-microvolt = <950000 950000 1150000>;
opp-hz = /bits/ 64 <600000000>;
opp-supported-hw = <0x0008>;
};
opp@600000000,1000 {
opp-microvolt = <1000000 1000000 1150000>;
opp-hz = /bits/ 64 <600000000>;
opp-supported-hw = <0x0003>;
};
opp@600000000,1050 {
opp-microvolt = <1050000 1050000 1150000>;
opp-hz = /bits/ 64 <600000000>;
opp-supported-hw = <0x0010>;
};
opp@600000000,1110 {
opp-microvolt = <1110000 1110000 1150000>;
opp-hz = /bits/ 64 <600000000>;
opp-supported-hw = <0x0004>;
};
opp@792000000,1000 {
opp-microvolt = <1000000 1000000 1150000>;
opp-hz = /bits/ 64 <792000000>;
opp-supported-hw = <0x000B>;
};
opp@792000000,1050 {
opp-microvolt = <1050000 1050000 1150000>;
opp-hz = /bits/ 64 <792000000>;
opp-supported-hw = <0x0010>;
};
opp@792000000,1110 {
opp-microvolt = <1110000 1110000 1150000>;
opp-hz = /bits/ 64 <792000000>;
opp-supported-hw = <0x0004>;
};
opp@924000000,1100 {
opp-microvolt = <1100000 1100000 1150000>;
opp-hz = /bits/ 64 <924000000>;
opp-supported-hw = <0x0013>;
};
opp@1200000000,1100 {
opp-microvolt = <1100000 1100000 1150000>;
opp-hz = /bits/ 64 <1200000000>;
opp-supported-hw = <0x0003>;
};
};
emc_bw_dfs_opp_table: emc-bandwidth-opp-table {
compatible = "operating-points-v2";
opp@12750000 {
opp-hz = /bits/ 64 <12750000>;
opp-supported-hw = <0x001F>;
opp-peak-kBps = <204000>;
};
opp@20400000 {
opp-hz = /bits/ 64 <20400000>;
opp-supported-hw = <0x001F>;
opp-peak-kBps = <326400>;
};
opp@40800000 {
opp-hz = /bits/ 64 <40800000>;
opp-supported-hw = <0x001F>;
opp-peak-kBps = <652800>;
};
opp@68000000 {
opp-hz = /bits/ 64 <68000000>;
opp-supported-hw = <0x001F>;
opp-peak-kBps = <1088000>;
};
opp@102000000 {
opp-hz = /bits/ 64 <102000000>;
opp-supported-hw = <0x001F>;
opp-peak-kBps = <1632000>;
};
opp@204000000 {
opp-hz = /bits/ 64 <204000000>;
opp-supported-hw = <0x001F>;
opp-peak-kBps = <3264000>;
};
opp@264000000 {
opp-hz = /bits/ 64 <264000000>;
opp-supported-hw = <0x001F>;
opp-peak-kBps = <4224000>;
};
opp@300000000 {
opp-hz = /bits/ 64 <300000000>;
opp-supported-hw = <0x001F>;
opp-peak-kBps = <4800000>;
};
opp@348000000 {
opp-hz = /bits/ 64 <348000000>;
opp-supported-hw = <0x001F>;
opp-peak-kBps = <5568000>;
};
opp@396000000 {
opp-hz = /bits/ 64 <396000000>;
opp-supported-hw = <0x001F>;
opp-peak-kBps = <6336000>;
};
opp@528000000 {
opp-hz = /bits/ 64 <528000000>;
opp-supported-hw = <0x001F>;
opp-peak-kBps = <8448000>;
};
opp@600000000 {
opp-hz = /bits/ 64 <600000000>;
opp-supported-hw = <0x001F>;
opp-peak-kBps = <9600000>;
};
opp@792000000 {
opp-hz = /bits/ 64 <792000000>;
opp-supported-hw = <0x001F>;
opp-peak-kBps = <12672000>;
};
opp@924000000 {
opp-hz = /bits/ 64 <924000000>;
opp-supported-hw = <0x0013>;
opp-peak-kBps = <14784000>;
};
opp@1200000000 {
opp-hz = /bits/ 64 <1200000000>;
opp-supported-hw = <0x0003>;
opp-peak-kBps = <19200000>;
};
};
};

View File

@@ -8,6 +8,8 @@
#include <dt-bindings/thermal/tegra124-soctherm.h>
#include <dt-bindings/soc/tegra-pmc.h>
#include "tegra124-peripherals-opp.dtsi"
/ {
compatible = "nvidia,tegra124";
interrupt-parent = <&lic>;
@@ -113,6 +115,19 @@ dc@54200000 {
iommus = <&mc TEGRA_SWGROUP_DC>;
nvidia,head = <0>;
interconnects = <&mc TEGRA124_MC_DISPLAY0A &emc>,
<&mc TEGRA124_MC_DISPLAY0B &emc>,
<&mc TEGRA124_MC_DISPLAY0C &emc>,
<&mc TEGRA124_MC_DISPLAYHC &emc>,
<&mc TEGRA124_MC_DISPLAYD &emc>,
<&mc TEGRA124_MC_DISPLAYT &emc>;
interconnect-names = "wina",
"winb",
"winc",
"cursor",
"wind",
"wint";
};
dc@54240000 {
@@ -127,6 +142,15 @@ dc@54240000 {
iommus = <&mc TEGRA_SWGROUP_DCB>;
nvidia,head = <1>;
interconnects = <&mc TEGRA124_MC_DISPLAY0AB &emc>,
<&mc TEGRA124_MC_DISPLAY0BB &emc>,
<&mc TEGRA124_MC_DISPLAY0CB &emc>,
<&mc TEGRA124_MC_DISPLAYHCB &emc>;
interconnect-names = "wina",
"winb",
"winc",
"cursor";
};
hdmi: hdmi@54280000 {
@@ -268,6 +292,9 @@ actmon@6000c800 {
clock-names = "actmon", "emc";
resets = <&tegra_car 119>;
reset-names = "actmon";
operating-points-v2 = <&emc_bw_dfs_opp_table>;
interconnects = <&mc TEGRA124_MC_MPCORER &emc>;
interconnect-names = "cpu-read";
};
gpio: gpio@6000d000 {
@@ -628,6 +655,7 @@ mc: memory-controller@70019000 {
#iommu-cells = <1>;
#reset-cells = <1>;
#interconnect-cells = <1>;
};
emc: external-memory-controller@7001b000 {
@@ -637,6 +665,9 @@ emc: external-memory-controller@7001b000 {
clock-names = "emc";
nvidia,memory-controller = <&mc>;
operating-points-v2 = <&emc_icc_dvfs_opp_table>;
#interconnect-cells = <0>;
};
sata@70020000 {
@@ -650,9 +681,9 @@ sata@70020000 {
<&tegra_car TEGRA124_CLK_PLL_E>;
clock-names = "sata", "sata-oob", "cml1", "pll_e";
resets = <&tegra_car 124>,
<&tegra_car 123>,
<&tegra_car 129>;
reset-names = "sata", "sata-oob", "sata-cold";
<&tegra_car 129>,
<&tegra_car 123>;
reset-names = "sata", "sata-cold", "sata-oob";
status = "disabled";
};
@@ -898,9 +929,11 @@ soctherm: thermal-sensor@700e2000 {
reg = <0x0 0x700e2000 0x0 0x600>, /* SOC_THERM reg_base */
<0x0 0x60006000 0x0 0x400>; /* CAR reg_base */
reg-names = "soctherm-reg", "car-reg";
interrupts = <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>;
interrupts = <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "thermal", "edp";
clocks = <&tegra_car TEGRA124_CLK_TSENSOR>,
<&tegra_car TEGRA124_CLK_SOC_THERM>;
<&tegra_car TEGRA124_CLK_SOC_THERM>;
clock-names = "tsensor", "soctherm";
resets = <&tegra_car 78>;
reset-names = "soctherm";
@@ -910,6 +943,7 @@ throttle-cfgs {
throttle_heavy: heavy {
nvidia,priority = <100>;
nvidia,cpu-throt-percent = <85>;
nvidia,gpu-throt-level = <TEGRA_SOCTHERM_THROT_LEVEL_HIGH>;
#cooling-cells = <2>;
};
@@ -1247,6 +1281,11 @@ mem-shutdown-trip {
hysteresis = <0>;
type = "critical";
};
mem-throttle-trip {
temperature = <99000>;
hysteresis = <1000>;
type = "hot";
};
};
cooling-maps {
@@ -1298,6 +1337,11 @@ pllx-shutdown-trip {
hysteresis = <0>;
type = "critical";
};
pllx-throttle-trip {
temperature = <99000>;
hysteresis = <1000>;
type = "hot";
};
};
cooling-maps {

View File

@@ -512,6 +512,16 @@ panel_ddc: i2c@1 {
reg = <1>;
#address-cells = <1>;
#size-cells = <0>;
embedded-controller@58 {
compatible = "acer,a500-iconia-ec", "ene,kb930";
reg = <0x58>;
system-power-controller;
monitored-battery = <&bat1010>;
power-supplies = <&mains>;
};
};
};
@@ -794,6 +804,13 @@ backlight: backlight {
default-brightness-level = <20>;
};
bat1010: battery-2s1p {
compatible = "simple-battery";
charge-full-design-microamp-hours = <3260000>;
energy-full-design-microwatt-hours = <24000000>;
operating-range-celsius = <0 40>;
};
/* PMIC has a built-in 32KHz oscillator which is used by PMC */
clk32k_in: clock@0 {
compatible = "fixed-clock";
@@ -907,6 +924,7 @@ lvds-encoder {
compatible = "ti,sn75lvds83", "lvds-encoder";
powerdown-gpios = <&gpio TEGRA_GPIO(B, 2) GPIO_ACTIVE_LOW>;
power-supply = <&vdd_3v3_sys>;
ports {
#address-cells = <1>;
@@ -1020,14 +1038,14 @@ sound {
};
thermal-zones {
nct1008-local {
skin-thermal {
polling-delay-passive = <1000>; /* milliseconds */
polling-delay = <0>; /* milliseconds */
thermal-sensors = <&nct1008 0>;
};
nct1008-remote {
cpu-thermal {
polling-delay-passive = <1000>; /* milliseconds */
polling-delay = <5000>; /* milliseconds */
@@ -1450,3 +1468,8 @@ emc-table@300000 {
};
};
};
&emc_icc_dvfs_opp_table {
/delete-node/ opp@666000000;
/delete-node/ opp@760000000;
};

View File

@@ -742,6 +742,10 @@ sound {
};
};
&emc_icc_dvfs_opp_table {
/delete-node/ opp@760000000;
};
&gpio {
lan-reset-n {
gpio-hog;

View File

@@ -662,3 +662,7 @@ cpu@1 {
};
};
};
&emc_icc_dvfs_opp_table {
/delete-node/ opp@760000000;
};

View File

@@ -0,0 +1,109 @@
// SPDX-License-Identifier: GPL-2.0
/ {
emc_icc_dvfs_opp_table: emc-dvfs-opp-table {
compatible = "operating-points-v2";
opp@36000000 {
opp-microvolt = <950000 950000 1300000>;
opp-hz = /bits/ 64 <36000000>;
opp-supported-hw = <0x000F>;
};
opp@47500000 {
opp-microvolt = <950000 950000 1300000>;
opp-hz = /bits/ 64 <47500000>;
opp-supported-hw = <0x000F>;
};
opp@50000000 {
opp-microvolt = <950000 950000 1300000>;
opp-hz = /bits/ 64 <50000000>;
opp-supported-hw = <0x000F>;
};
opp@54000000 {
opp-microvolt = <950000 950000 1300000>;
opp-hz = /bits/ 64 <54000000>;
opp-supported-hw = <0x000F>;
};
opp@57000000 {
opp-microvolt = <950000 950000 1300000>;
opp-hz = /bits/ 64 <57000000>;
opp-supported-hw = <0x000F>;
};
opp@100000000 {
opp-microvolt = <1000000 1000000 1300000>;
opp-hz = /bits/ 64 <100000000>;
opp-supported-hw = <0x000F>;
};
opp@108000000 {
opp-microvolt = <1000000 1000000 1300000>;
opp-hz = /bits/ 64 <108000000>;
opp-supported-hw = <0x000F>;
};
opp@126666000 {
opp-microvolt = <1000000 1000000 1300000>;
opp-hz = /bits/ 64 <126666000>;
opp-supported-hw = <0x000F>;
};
opp@150000000 {
opp-microvolt = <1000000 1000000 1300000>;
opp-hz = /bits/ 64 <150000000>;
opp-supported-hw = <0x000F>;
};
opp@190000000 {
opp-microvolt = <1000000 1000000 1300000>;
opp-hz = /bits/ 64 <190000000>;
opp-supported-hw = <0x000F>;
};
opp@216000000 {
opp-microvolt = <1000000 1000000 1300000>;
opp-hz = /bits/ 64 <216000000>;
opp-supported-hw = <0x000F>;
};
opp@300000000 {
opp-microvolt = <1000000 1000000 1300000>;
opp-hz = /bits/ 64 <300000000>;
opp-supported-hw = <0x000F>;
};
opp@333000000 {
opp-microvolt = <1000000 1000000 1300000>;
opp-hz = /bits/ 64 <333000000>;
opp-supported-hw = <0x000F>;
};
opp@380000000 {
opp-microvolt = <1100000 1100000 1300000>;
opp-hz = /bits/ 64 <380000000>;
opp-supported-hw = <0x000F>;
};
opp@600000000 {
opp-microvolt = <1200000 1200000 1300000>;
opp-hz = /bits/ 64 <600000000>;
opp-supported-hw = <0x000F>;
};
opp@666000000 {
opp-microvolt = <1200000 1200000 1300000>;
opp-hz = /bits/ 64 <666000000>;
opp-supported-hw = <0x000F>;
};
opp@760000000 {
opp-microvolt = <1300000 1300000 1300000>;
opp-hz = /bits/ 64 <760000000>;
opp-supported-hw = <0x000F>;
};
};
};

View File

@@ -3,6 +3,7 @@
#include <dt-bindings/input/input.h>
#include "tegra20.dtsi"
#include "tegra20-cpu-opp.dtsi"
/ {
model = "NVIDIA Tegra20 Ventana evaluation board";
@@ -592,6 +593,16 @@ clk32k_in: clock@0 {
#clock-cells = <0>;
};
cpus {
cpu0: cpu@0 {
operating-points-v2 = <&cpu0_opp_table>;
};
cpu@1 {
operating-points-v2 = <&cpu0_opp_table>;
};
};
gpio-keys {
compatible = "gpio-keys";

View File

@@ -6,6 +6,8 @@
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/soc/tegra-pmc.h>
#include "tegra20-peripherals-opp.dtsi"
/ {
compatible = "nvidia,tegra20";
interrupt-parent = <&lic>;
@@ -111,6 +113,17 @@ dc@54200000 {
nvidia,head = <0>;
interconnects = <&mc TEGRA20_MC_DISPLAY0A &emc>,
<&mc TEGRA20_MC_DISPLAY0B &emc>,
<&mc TEGRA20_MC_DISPLAY1B &emc>,
<&mc TEGRA20_MC_DISPLAY0C &emc>,
<&mc TEGRA20_MC_DISPLAYHC &emc>;
interconnect-names = "wina",
"winb",
"winb-vfilter",
"winc",
"cursor";
rgb {
status = "disabled";
};
@@ -128,6 +141,17 @@ dc@54240000 {
nvidia,head = <1>;
interconnects = <&mc TEGRA20_MC_DISPLAY0AB &emc>,
<&mc TEGRA20_MC_DISPLAY0BB &emc>,
<&mc TEGRA20_MC_DISPLAY1BB &emc>,
<&mc TEGRA20_MC_DISPLAY0CB &emc>,
<&mc TEGRA20_MC_DISPLAYHCB &emc>;
interconnect-names = "wina",
"winb",
"winb-vfilter",
"winc",
"cursor";
rgb {
status = "disabled";
};
@@ -630,15 +654,20 @@ mc: memory-controller@7000f000 {
interrupts = <GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH>;
#reset-cells = <1>;
#iommu-cells = <0>;
#interconnect-cells = <1>;
};
memory-controller@7000f400 {
emc: memory-controller@7000f400 {
compatible = "nvidia,tegra20-emc";
reg = <0x7000f400 0x200>;
reg = <0x7000f400 0x400>;
interrupts = <GIC_SPI 78 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&tegra_car TEGRA20_CLK_EMC>;
#address-cells = <1>;
#size-cells = <0>;
#interconnect-cells = <0>;
operating-points-v2 = <&emc_icc_dvfs_opp_table>;
nvidia,memory-controller = <&mc>;
};
fuse@7000f800 {

View File

@@ -75,7 +75,7 @@ lcd_output: endpoint {
};
gpio@6000d000 {
init-mode {
init-mode-hog {
gpio-hog;
gpios = <TEGRA_GPIO(DD, 7) GPIO_ACTIVE_HIGH>,
<TEGRA_GPIO(CC, 6) GPIO_ACTIVE_HIGH>,
@@ -83,7 +83,7 @@ init-mode {
output-low;
};
init-low-power-mode {
init-low-power-mode-hog {
gpio-hog;
gpios = <TEGRA_GPIO(I, 6) GPIO_ACTIVE_HIGH>;
input;
@@ -1073,8 +1073,16 @@ cpu@3 {
};
display-panel {
compatible = "hydis,hv070wx2-1e0", "chunghwa,claa070wp03xg",
"panel-lvds";
/*
* Nexus 7 supports two compatible panel models:
*
* 1. hydis,hv070wx2-1e0
* 2. chunghwa,claa070wp03xg
*
* We want to use timing which is optimized for Nexus 7,
* hence we need to customize the timing.
*/
compatible = "panel-lvds";
power-supply = <&vdd_pnl>;
backlight = <&backlight>;
@@ -1145,6 +1153,7 @@ lvds-encoder {
compatible = "ti,sn75lvds83", "lvds-encoder";
powerdown-gpios = <&gpio TEGRA_GPIO(N, 6) GPIO_ACTIVE_LOW>;
power-supply = <&vdd_3v3_sys>;
ports {
#address-cells = <1>;
@@ -1240,14 +1249,14 @@ sound {
};
thermal-zones {
nct72-local {
skin-thermal {
polling-delay-passive = <1000>; /* milliseconds */
polling-delay = <0>; /* milliseconds */
thermal-sensors = <&nct72 0>;
};
nct72-remote {
cpu-thermal {
polling-delay-passive = <1000>; /* milliseconds */
polling-delay = <5000>; /* milliseconds */
@@ -1255,9 +1264,9 @@ nct72-remote {
trips {
trip0: cpu-alert0 {
/* start throttling at 50C */
temperature = <50000>;
hysteresis = <3000>;
/* throttle at 57C until temperature drops to 56.8C */
temperature = <57000>;
hysteresis = <200>;
type = "passive";
};

View File

@@ -29,7 +29,7 @@ gpio4 {
};
};
cpu-pwr-req {
cpu-pwr-req-hog {
gpio-hog;
gpios = <6 GPIO_ACTIVE_HIGH>;
input;

View File

@@ -1563,3 +1563,15 @@ timing-667000000 {
};
};
};
&emc_icc_dvfs_opp_table {
/delete-node/ opp@750000000,1300;
/delete-node/ opp@800000000,1300;
/delete-node/ opp@900000000,1350;
};
&emc_bw_dfs_opp_table {
/delete-node/ opp@750000000;
/delete-node/ opp@800000000;
/delete-node/ opp@900000000;
};

View File

@@ -23,7 +23,7 @@ panel-timing {
};
gpio@6000d000 {
init-mode-3g {
init-mode-3g-hog {
gpio-hog;
gpios = <TEGRA_GPIO(D, 2) GPIO_ACTIVE_HIGH>,
<TEGRA_GPIO(C, 6) GPIO_ACTIVE_HIGH>,

File diff suppressed because it is too large Load Diff

View File

@@ -0,0 +1,383 @@
// SPDX-License-Identifier: GPL-2.0
/ {
emc_icc_dvfs_opp_table: emc-dvfs-opp-table {
compatible = "operating-points-v2";
opp@12750000,950 {
opp-microvolt = <950000 950000 1350000>;
opp-hz = /bits/ 64 <12750000>;
opp-supported-hw = <0x0006>;
};
opp@12750000,1000 {
opp-microvolt = <1000000 1000000 1350000>;
opp-hz = /bits/ 64 <12750000>;
opp-supported-hw = <0x0001>;
};
opp@12750000,1250 {
opp-microvolt = <1250000 1250000 1350000>;
opp-hz = /bits/ 64 <12750000>;
opp-supported-hw = <0x0008>;
};
opp@25500000,950 {
opp-microvolt = <950000 950000 1350000>;
opp-hz = /bits/ 64 <25500000>;
opp-supported-hw = <0x0006>;
};
opp@25500000,1000 {
opp-microvolt = <1000000 1000000 1350000>;
opp-hz = /bits/ 64 <25500000>;
opp-supported-hw = <0x0001>;
};
opp@25500000,1250 {
opp-microvolt = <1250000 1250000 1350000>;
opp-hz = /bits/ 64 <25500000>;
opp-supported-hw = <0x0008>;
};
opp@27000000,950 {
opp-microvolt = <950000 950000 1350000>;
opp-hz = /bits/ 64 <27000000>;
opp-supported-hw = <0x0006>;
};
opp@27000000,1000 {
opp-microvolt = <1000000 1000000 1350000>;
opp-hz = /bits/ 64 <27000000>;
opp-supported-hw = <0x0001>;
};
opp@27000000,1250 {
opp-microvolt = <1250000 1250000 1350000>;
opp-hz = /bits/ 64 <27000000>;
opp-supported-hw = <0x0008>;
};
opp@51000000,950 {
opp-microvolt = <950000 950000 1350000>;
opp-hz = /bits/ 64 <51000000>;
opp-supported-hw = <0x0006>;
};
opp@51000000,1000 {
opp-microvolt = <1000000 1000000 1350000>;
opp-hz = /bits/ 64 <51000000>;
opp-supported-hw = <0x0001>;
};
opp@51000000,1250 {
opp-microvolt = <1250000 1250000 1350000>;
opp-hz = /bits/ 64 <51000000>;
opp-supported-hw = <0x0008>;
};
opp@54000000,950 {
opp-microvolt = <950000 950000 1350000>;
opp-hz = /bits/ 64 <54000000>;
opp-supported-hw = <0x0006>;
};
opp@54000000,1000 {
opp-microvolt = <1000000 1000000 1350000>;
opp-hz = /bits/ 64 <54000000>;
opp-supported-hw = <0x0001>;
};
opp@54000000,1250 {
opp-microvolt = <1250000 1250000 1350000>;
opp-hz = /bits/ 64 <54000000>;
opp-supported-hw = <0x0008>;
};
opp@102000000,950 {
opp-microvolt = <950000 950000 1350000>;
opp-hz = /bits/ 64 <102000000>;
opp-supported-hw = <0x0006>;
};
opp@102000000,1000 {
opp-microvolt = <1000000 1000000 1350000>;
opp-hz = /bits/ 64 <102000000>;
opp-supported-hw = <0x0001>;
};
opp@102000000,1250 {
opp-microvolt = <1250000 1250000 1350000>;
opp-hz = /bits/ 64 <102000000>;
opp-supported-hw = <0x0008>;
};
opp@108000000,1000 {
opp-microvolt = <1000000 1000000 1350000>;
opp-hz = /bits/ 64 <108000000>;
opp-supported-hw = <0x0007>;
};
opp@108000000,1250 {
opp-microvolt = <1250000 1250000 1350000>;
opp-hz = /bits/ 64 <108000000>;
opp-supported-hw = <0x0008>;
};
opp@204000000,1000 {
opp-microvolt = <1000000 1000000 1350000>;
opp-hz = /bits/ 64 <204000000>;
opp-supported-hw = <0x0007>;
};
opp@204000000,1250 {
opp-microvolt = <1250000 1250000 1350000>;
opp-hz = /bits/ 64 <204000000>;
opp-supported-hw = <0x0008>;
};
opp@333500000,1000 {
opp-microvolt = <1000000 1000000 1350000>;
opp-hz = /bits/ 64 <333500000>;
opp-supported-hw = <0x0006>;
};
opp@333500000,1200 {
opp-microvolt = <1200000 1200000 1350000>;
opp-hz = /bits/ 64 <333500000>;
opp-supported-hw = <0x0001>;
};
opp@333500000,1250 {
opp-microvolt = <1250000 1250000 1350000>;
opp-hz = /bits/ 64 <333500000>;
opp-supported-hw = <0x0008>;
};
opp@375000000,1000 {
opp-microvolt = <1000000 1000000 1350000>;
opp-hz = /bits/ 64 <375000000>;
opp-supported-hw = <0x0006>;
};
opp@375000000,1200 {
opp-microvolt = <1200000 1200000 1350000>;
opp-hz = /bits/ 64 <375000000>;
opp-supported-hw = <0x0001>;
};
opp@375000000,1250 {
opp-microvolt = <1250000 1250000 1350000>;
opp-hz = /bits/ 64 <375000000>;
opp-supported-hw = <0x0008>;
};
opp@400000000,1000 {
opp-microvolt = <1000000 1000000 1350000>;
opp-hz = /bits/ 64 <400000000>;
opp-supported-hw = <0x0006>;
};
opp@400000000,1200 {
opp-microvolt = <1200000 1200000 1350000>;
opp-hz = /bits/ 64 <400000000>;
opp-supported-hw = <0x0001>;
};
opp@400000000,1250 {
opp-microvolt = <1250000 1250000 1350000>;
opp-hz = /bits/ 64 <400000000>;
opp-supported-hw = <0x0008>;
};
opp@416000000,1200 {
opp-microvolt = <1200000 1200000 1350000>;
opp-hz = /bits/ 64 <416000000>;
opp-supported-hw = <0x0007>;
};
opp@416000000,1250 {
opp-microvolt = <1250000 1250000 1350000>;
opp-hz = /bits/ 64 <416000000>;
opp-supported-hw = <0x0008>;
};
opp@450000000,1200 {
opp-microvolt = <1200000 1200000 1350000>;
opp-hz = /bits/ 64 <450000000>;
opp-supported-hw = <0x0007>;
};
opp@450000000,1250 {
opp-microvolt = <1250000 1250000 1350000>;
opp-hz = /bits/ 64 <450000000>;
opp-supported-hw = <0x0008>;
};
opp@533000000,1200 {
opp-microvolt = <1200000 1200000 1350000>;
opp-hz = /bits/ 64 <533000000>;
opp-supported-hw = <0x0007>;
};
opp@533000000,1250 {
opp-microvolt = <1250000 1250000 1350000>;
opp-hz = /bits/ 64 <533000000>;
opp-supported-hw = <0x0008>;
};
opp@625000000,1200 {
opp-microvolt = <1200000 1200000 1350000>;
opp-hz = /bits/ 64 <625000000>;
opp-supported-hw = <0x0006>;
};
opp@625000000,1250 {
opp-microvolt = <1250000 1250000 1350000>;
opp-hz = /bits/ 64 <625000000>;
opp-supported-hw = <0x0008>;
};
opp@667000000,1200 {
opp-microvolt = <1200000 1200000 1350000>;
opp-hz = /bits/ 64 <667000000>;
opp-supported-hw = <0x0006>;
};
opp@750000000,1300 {
opp-microvolt = <1300000 1300000 1350000>;
opp-hz = /bits/ 64 <750000000>;
opp-supported-hw = <0x0004>;
};
opp@800000000,1300 {
opp-microvolt = <1300000 1300000 1350000>;
opp-hz = /bits/ 64 <800000000>;
opp-supported-hw = <0x0004>;
};
opp@900000000,1350 {
opp-microvolt = <1350000 1350000 1350000>;
opp-hz = /bits/ 64 <900000000>;
opp-supported-hw = <0x0004>;
};
};
emc_bw_dfs_opp_table: emc-bandwidth-opp-table {
compatible = "operating-points-v2";
opp@12750000 {
opp-hz = /bits/ 64 <12750000>;
opp-supported-hw = <0x000F>;
opp-peak-kBps = <102000>;
};
opp@25500000 {
opp-hz = /bits/ 64 <25500000>;
opp-supported-hw = <0x000F>;
opp-peak-kBps = <204000>;
};
opp@27000000 {
opp-hz = /bits/ 64 <27000000>;
opp-supported-hw = <0x000F>;
opp-peak-kBps = <216000>;
};
opp@51000000 {
opp-hz = /bits/ 64 <51000000>;
opp-supported-hw = <0x000F>;
opp-peak-kBps = <408000>;
};
opp@54000000 {
opp-hz = /bits/ 64 <54000000>;
opp-supported-hw = <0x000F>;
opp-peak-kBps = <432000>;
};
opp@102000000 {
opp-hz = /bits/ 64 <102000000>;
opp-supported-hw = <0x000F>;
opp-peak-kBps = <816000>;
};
opp@108000000 {
opp-hz = /bits/ 64 <108000000>;
opp-supported-hw = <0x000F>;
opp-peak-kBps = <864000>;
};
opp@204000000 {
opp-hz = /bits/ 64 <204000000>;
opp-supported-hw = <0x000F>;
opp-peak-kBps = <1632000>;
};
opp@333500000 {
opp-hz = /bits/ 64 <333500000>;
opp-supported-hw = <0x000F>;
opp-peak-kBps = <2668000>;
};
opp@375000000 {
opp-hz = /bits/ 64 <375000000>;
opp-supported-hw = <0x000F>;
opp-peak-kBps = <3000000>;
};
opp@400000000 {
opp-hz = /bits/ 64 <400000000>;
opp-supported-hw = <0x000F>;
opp-peak-kBps = <3200000>;
};
opp@416000000 {
opp-hz = /bits/ 64 <416000000>;
opp-supported-hw = <0x000F>;
opp-peak-kBps = <3328000>;
};
opp@450000000 {
opp-hz = /bits/ 64 <450000000>;
opp-supported-hw = <0x000F>;
opp-peak-kBps = <3600000>;
};
opp@533000000 {
opp-hz = /bits/ 64 <533000000>;
opp-supported-hw = <0x000F>;
opp-peak-kBps = <4264000>;
};
opp@625000000 {
opp-hz = /bits/ 64 <625000000>;
opp-supported-hw = <0x000E>;
opp-peak-kBps = <5000000>;
};
opp@667000000 {
opp-hz = /bits/ 64 <667000000>;
opp-supported-hw = <0x0006>;
opp-peak-kBps = <5336000>;
};
opp@750000000 {
opp-hz = /bits/ 64 <750000000>;
opp-supported-hw = <0x0004>;
opp-peak-kBps = <6000000>;
};
opp@800000000 {
opp-hz = /bits/ 64 <800000000>;
opp-supported-hw = <0x0004>;
opp-peak-kBps = <6400000>;
};
opp@900000000 {
opp-hz = /bits/ 64 <900000000>;
opp-supported-hw = <0x0004>;
opp-peak-kBps = <7200000>;
};
};
};

View File

@@ -6,6 +6,8 @@
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/soc/tegra-pmc.h>
#include "tegra30-peripherals-opp.dtsi"
/ {
compatible = "nvidia,tegra30";
interrupt-parent = <&lic>;
@@ -210,6 +212,17 @@ dc@54200000 {
nvidia,head = <0>;
interconnects = <&mc TEGRA30_MC_DISPLAY0A &emc>,
<&mc TEGRA30_MC_DISPLAY0B &emc>,
<&mc TEGRA30_MC_DISPLAY1B &emc>,
<&mc TEGRA30_MC_DISPLAY0C &emc>,
<&mc TEGRA30_MC_DISPLAYHC &emc>;
interconnect-names = "wina",
"winb",
"winb-vfilter",
"winc",
"cursor";
rgb {
status = "disabled";
};
@@ -229,6 +242,17 @@ dc@54240000 {
nvidia,head = <1>;
interconnects = <&mc TEGRA30_MC_DISPLAY0AB &emc>,
<&mc TEGRA30_MC_DISPLAY0BB &emc>,
<&mc TEGRA30_MC_DISPLAY1BB &emc>,
<&mc TEGRA30_MC_DISPLAY0CB &emc>,
<&mc TEGRA30_MC_DISPLAYHCB &emc>;
interconnect-names = "wina",
"winb",
"winb-vfilter",
"winc",
"cursor";
rgb {
status = "disabled";
};
@@ -395,6 +419,9 @@ actmon@6000c800 {
clock-names = "actmon", "emc";
resets = <&tegra_car TEGRA30_CLK_ACTMON>;
reset-names = "actmon";
operating-points-v2 = <&emc_bw_dfs_opp_table>;
interconnects = <&mc TEGRA30_MC_MPCORER &emc>;
interconnect-names = "cpu-read";
};
gpio: gpio@6000d000 {
@@ -748,15 +775,19 @@ mc: memory-controller@7000f000 {
#iommu-cells = <1>;
#reset-cells = <1>;
#interconnect-cells = <1>;
};
memory-controller@7000f400 {
emc: memory-controller@7000f400 {
compatible = "nvidia,tegra30-emc";
reg = <0x7000f400 0x400>;
interrupts = <GIC_SPI 78 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&tegra_car TEGRA30_CLK_EMC>;
nvidia,memory-controller = <&mc>;
operating-points-v2 = <&emc_icc_dvfs_opp_table>;
#interconnect-cells = <0>;
};
fuse@7000f800 {