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Brian Norris
ae04430959 arm64: dts: rockchip: add RK3399 Gru gpio-line-names 
It's convenient to get nice names for GPIOs. In particular, Chrome OS
tooling looks for "AP_FLASH_WP" and "AP_FLASH_WP_L". The rest are
provided for convenience.

Gru-Bob and Gru-Kevin share the gru-chromebook.dtsi, and for the most
part they share pin meanings. I omitted a few areas where components
were available only on one or the other.

Signed-off-by: Brian Norris <briannorris@chromium.org>
Reviewed-by: Douglas Anderson <dianders@chromium.org>
Link: https://lore.kernel.org/r/20210820133829.1.Ica46f428de8c3beb600760dbcd63cf879ec24baf@changeid
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
 2021-09-15 17:50:43 +02:00
Chris Morgan
e31083f918 arm64: dts: rockchip: Enable SFC for Odroid Go Advance 
This enables the Rockchip Serial Flash Controller for the Odroid Go
Advance. Note that while the attached SPI NOR flash and the controller
both support quad read mode, only 2 of the required 4 pins are present.
The rx bus width is set to 2 for this reason, and tx bus width is set
to 1 for compatibility reasons.

Signed-off-by: Chris Morgan <macromorgan@hotmail.com>
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
Link: https://lore.kernel.org/r/20210812134639.31586-2-jon.lin@rock-chips.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
 2021-09-15 17:50:42 +02:00
Chris Morgan
e2c58ea861 arm64: dts: rockchip: Add SFC to RK3308 
Add a devicetree entry for the Rockchip SFC for the RK3308 SOC.

Signed-off-by: Chris Morgan <macromorgan@hotmail.com>
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
Link: https://lore.kernel.org/r/20210812134639.31586-1-jon.lin@rock-chips.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
 2021-09-15 17:50:41 +02:00
Chris Morgan
4d97b78aec arm64: dts: rockchip: Add SFC to PX30 
Add a devicetree entry for the Rockchip SFC for the PX30 SOC.

Signed-off-by: Chris Morgan <macromorgan@hotmail.com>
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
Link: https://lore.kernel.org/r/20210812134546.31340-4-jon.lin@rock-chips.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
 2021-09-15 17:50:41 +02:00
Peter Geis
40b0bfbb95 arm64: dts: rockchip: add thermal support to Quartz64 Model A 
Add the thermal nodes for the Quartz64 Model A.
The Model A supports a single speed gpio fan.

Signed-off-by: Peter Geis <pgwipeout@gmail.com>
Link: https://lore.kernel.org/r/20210728180034.717953-9-pgwipeout@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
 2021-09-15 17:50:40 +02:00
Peter Geis
1330875dc2 arm64: dts: rockchip: add rk3568 tsadc nodes 
Add the thermal and tsadc nodes to the rk3568 device tree.
There are two sensors, one for the cpu, one for the gpu.

Signed-off-by: Peter Geis <pgwipeout@gmail.com>
Link: https://lore.kernel.org/r/20210728180034.717953-6-pgwipeout@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
 2021-09-15 17:50:40 +02:00
Peter Geis
3d9170c3ea arm64: dts: rockchip: add rk356x gpio debounce clocks 
The rk356x added a debounce clock to the gpio devices. This clock is
necessary for the new v2 gpio driver to bind.
Add the clocks to the rk356x device tree.

Signed-off-by: Peter Geis <pgwipeout@gmail.com>
Link: https://lore.kernel.org/r/20210728180034.717953-4-pgwipeout@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
 2021-09-15 17:50:39 +02:00
Michael Riesch
8a599b56a8 arm64: dts: rockchip: add pinctrl and alias to emmc node to rk3568-evb1-v10 
Since the EMMC pins can be used for other functions as well, we need to
configure the pinctrl.

Signed-off-by: Michael Riesch <michael.riesch@wolfvision.net>
Link: https://lore.kernel.org/r/20210805120107.27007-8-michael.riesch@wolfvision.net
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
 2021-09-15 17:50:38 +02:00
Michael Riesch
2a068e19ff arm64: dts: rockchip: add node for sd card to rk3568-evb1-v10 
Add the SD card reader to the device tree of the RK3568 EVB1.

Signed-off-by: Michael Riesch <michael.riesch@wolfvision.net>
Link: https://lore.kernel.org/r/20210805120107.27007-7-michael.riesch@wolfvision.net
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
 2021-09-15 17:50:38 +02:00
Michael Riesch
14f1c34eec arm64: dts: rockchip: add regulators of rk809 pmic to rk3568-evb1-v10 
Add the regulators of the RK809 PMIC to the device tree of the
RK3568 EVB1.

Signed-off-by: Michael Riesch <michael.riesch@wolfvision.net>
Link: https://lore.kernel.org/r/20210805120107.27007-6-michael.riesch@wolfvision.net
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
 2021-09-15 17:50:37 +02:00
Michael Riesch
e86d481098 arm64: dts: rockchip: enable io domains on rk3568-evb1-v10 
Enable the PMU IO domains in the device tree for the RK3568 EVB1.

Signed-off-by: Michael Riesch <michael.riesch@wolfvision.net>
Link: https://lore.kernel.org/r/20210805120107.27007-5-michael.riesch@wolfvision.net
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
 2021-09-15 17:50:36 +02:00
Michael Riesch
2dbcb2514c arm64: dts: rockchip: add core io domains node for rk356x 
Enable the PMU IO domains for the RK3566 and the RK3568.

Signed-off-by: Michael Riesch <michael.riesch@wolfvision.net>
Link: https://lore.kernel.org/r/20210805120107.27007-4-michael.riesch@wolfvision.net
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
 2021-09-15 17:50:36 +02:00
Peter Geis
d09ebc6ba9 arm64: dts: rockchip: add thermal fan control to rockpro64 
The rockpro64 had a fan node since
commit 5882d65c16 ("arm64: dts: rockchip: Add PWM fan for RockPro64")
however it was never tied into the thermal driver for automatic control.

Add the links to the thermal node to permit the kernel to handle this
automatically.
Borrowed from the (rk3399-khadas-edge.dtsi).

Signed-off-by: Peter Geis <pgwipeout@gmail.com>
Link: https://lore.kernel.org/r/20210730151727.729822-1-pgwipeout@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
 2021-09-15 17:50:35 +02:00
Dan Johansen
ef914fb8f7 arm64: dts: rockchip: Setup USB typec port as datarole on for Pinebook Pro 
Some chargers try to put the charged device into device data
role. Before this commit this condition caused the tcpm state machine to
issue a hard reset due to a capability missmatch.

Signed-off-by: Dan Johansen <strit@manjaro.org>
Link: https://lore.kernel.org/r/20210805220426.2693062-1-strit@manjaro.org
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
 2021-09-15 17:50:34 +02:00
Chen-Yu Tsai
5707e34166 arm64: dts: rockchip: Add gru-scarlet-dumo board 
Dumo is another variant of Scarlet, also known as the ASUS Chromebook
Tablet CT100. This is almost the same as Scarlet-Innolux, but uses a
board-specific calibration variant for the WiFi module.

Add a new device tree for it.

Signed-off-by: Chen-Yu Tsai <wenst@chromium.org>
Link: https://lore.kernel.org/r/20210812094753.2359087-3-wenst@chromium.org
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
 2021-09-15 17:50:34 +02:00
Chen-Yu Tsai
3cf697b45e dt-bindings: arm: rockchip: Add gru-scarlet-dumo board 
Dumo is another variant of Scarlet, also known as the ASUS Chromebook
Tablet CT100. This is almost the same as Scarlet-Innolux, but uses a
specific calibration variant for the WiFi module.

Add an entry for the board compatibles.

Signed-off-by: Chen-Yu Tsai <wenst@chromium.org>
Link: https://lore.kernel.org/r/20210812094753.2359087-2-wenst@chromium.org
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
 2021-09-15 17:50:33 +02:00
Michael Riesch
fc57d78344 arm64: dts: rockchip: rk3568-evb1-v10: add ethernet support 
Signed-off-by: Michael Riesch <michael.riesch@wolfvision.net>
Link: https://lore.kernel.org/r/20210729093913.8917-3-michael.riesch@wolfvision.net
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
 2021-09-15 17:50:32 +02:00
Michael Riesch
b8d41e5053 arm64: dts: rockchip: add gmac0 node to rk3568 
While both RK3566 and RK3568 feature the gmac1 node, the gmac0
node is exclusive to the RK3568.

Signed-off-by: Michael Riesch <michael.riesch@wolfvision.net>
Link: https://lore.kernel.org/r/20210729093913.8917-2-michael.riesch@wolfvision.net
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
 2021-09-15 17:50:32 +02:00
Peter Geis
c3dd497fbb arm64: dts: rockchip: enable gmac node on quartz64-a 
Enable the gmac controller on the Pine64 Quartz64 Model A.

Signed-off-by: Peter Geis <pgwipeout@gmail.com>
Link: https://lore.kernel.org/r/20210728180034.717953-8-pgwipeout@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
 2021-09-15 17:50:31 +02:00
Peter Geis
f7c5b9c2a1 arm64: dts: rockchip: adjust rk3568 pll clocks 
The rk3568 gpll should run at 1200mhz and the ppll should run at 200mhz.
These are set incorrectly by the bootloader, so fix them here.

gpll boots at 1188mhz, but to get most accurate dividers for all
gpll_dividers it needs to run at 1200mhz, otherwise everyone downstream
isn't quite right.

ppll feeds the combophys, which has a divide by 2 clock, so 200mhz is
required to reach a 100mhz clock input for them.

The vendor-kernel also makes this fix.

Signed-off-by: Peter Geis <pgwipeout@gmail.com>
[pulled deeper explanation from discussion into commit message]
Link: https://lore.kernel.org/r/20210728180034.717953-7-pgwipeout@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
 2021-09-15 17:50:30 +02:00
Peter Geis
0dcec571ce arm64: dts: rockchip: add rk356x gmac1 node 
Add the gmac1 controller to the rk356x device tree.
This is the controller common to both the rk3568 and rk3566.

Signed-off-by: Peter Geis <pgwipeout@gmail.com>
Link: https://lore.kernel.org/r/20210728180034.717953-5-pgwipeout@gmail.com
[adjusted sorting a bit]
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
 2021-09-15 17:50:30 +02:00
Peter Geis
b6c1a59014 arm64: dts: rockchip: fix rk3568 mbi-alias 
The mbi-alias incorrectly points to 0xfd100000 when it should point to
0xfd410000.
This fixes MSIs on rk3568.

Fixes: a3adc0b907 ("arm64: dts: rockchip: add core dtsi for RK3568 SoC")
Signed-off-by: Peter Geis <pgwipeout@gmail.com>
Link: https://lore.kernel.org/r/20210728180034.717953-2-pgwipeout@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
 2021-09-15 17:50:29 +02:00
Paul Kocialkowski
6b4b2af5d2 arm64: dts: rockchip: Add VPU support for the PX30 
The PX30 has a VPU (both decoder and encoder) with a dedicated IOMMU.
Describe these two entities in device-tree.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Signed-off-by: Ezequiel Garcia <ezequiel@collabora.com>
Link: https://lore.kernel.org/r/20210728230040.17368-1-ezequiel@collabora.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
 2021-09-15 17:50:28 +02:00
Liang Chen
0edcfec3fa arm64: dts: rockchip: add watchdog to rk3568 
Add the watchdog node to rk3568.

Signed-off-by: Liang Chen <cl@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Link: https://lore.kernel.org/r/20210622102907.99242-2-heiko@sntech.de
 2021-09-15 17:50:28 +02:00
Heiko Stuebner
c349ae3817 arm64: dts: rockchip: add isp1 node on rk3399 
ISP1 is supplied by the tx1rx1 dphy, that is controlled from
inside the dsi1 controller, so include the necessary phy-link
for it.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Tested-by: Sebastian Fricke <sebastian.fricke@posteo.net>
Acked-by: Helen Koike <helen.koike@collabora.com>
Link: https://lore.kernel.org/r/20210210111020.2476369-7-heiko@sntech.de
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
 2021-09-15 17:50:27 +02:00
Heiko Stuebner
f1400702ad arm64: dts: rockchip: add cif clk-control pinctrl for rk3399 
This enables variant a of the clkout signal for camera applications
and also the cifclkin pinctrl setting.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Tested-by: Sebastian Fricke <sebastian.fricke@posteo.net>
Acked-by: Helen Koike <helen.koike@collabora.com>
Link: https://lore.kernel.org/r/20210210111020.2476369-6-heiko@sntech.de
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
 2021-09-15 17:50:26 +02:00
Heiko Stuebner
8d47d12e3b arm64: dts: rockchip: add #phy-cells to mipi-dsi1 on rk3399 
The dsi controller includes access to the dphy which might be used
not only for dsi output but also for csi input on dsi1, so add the
necessary #phy-cells to allow it to be used as phy.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Tested-by: Sebastian Fricke <sebastian.fricke@posteo.net>
Acked-by: Helen Koike <helen.koike@collabora.com>
Link: https://lore.kernel.org/r/20210210111020.2476369-5-heiko@sntech.de
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
 2021-09-15 17:50:26 +02:00
Peter Geis
b33a22a1e7 arm64: dts: rockchip: add basic dts for Pine64 Quartz64-A 
Add a basic dts for the Pine64 Quartz64 Model A Single Board Computer.
This board outputs on uart2 for debug.

Signed-off-by: Peter Geis <pgwipeout@gmail.com>
Acked-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20210710151034.32857-5-pgwipeout@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
 2021-09-15 17:50:25 +02:00
Peter Geis
016c0e8a7a arm64: dts: rockchip: add rk3566 dtsi 
Add the rk3566 dtsi which includes the soc specific changes for this
chip.

Signed-off-by: Peter Geis <pgwipeout@gmail.com>
Link: https://lore.kernel.org/r/20210710151034.32857-4-pgwipeout@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
 2021-09-15 17:50:24 +02:00
Peter Geis
5067f459e5 arm64: dts: rockchip: split rk3568 device tree 
In preparation for the rk3566 inclusion, split apart the rk3568 specific
nodes into a separate device tree.
This allows us to create the rk3566 device tree without deleting nodes.

Signed-off-by: Peter Geis <pgwipeout@gmail.com>
Link: https://lore.kernel.org/r/20210710151034.32857-3-pgwipeout@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
 2021-09-15 17:50:24 +02:00
Peter Geis
4e50d2173b arm64: dts: rockchip: move rk3568 dtsi to rk356x dtsi 
In preparation for separating the rk3568 and rk3566 device trees, move
the base rk3568 dtsi to rk356x dtsi.
This will allow us to strip out the rk3568 specific nodes.

Signed-off-by: Peter Geis <pgwipeout@gmail.com>
Link: https://lore.kernel.org/r/20210710151034.32857-2-pgwipeout@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
 2021-09-15 17:50:23 +02:00
Heiko Stuebner
e2425dcc70 arm64: dts: rockchip: add csi-dphy to px30 
Add the CSI dphy node to the core px30 devicetree for later use
with the rkisp.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Link: https://lore.kernel.org/r/20210722073955.1192168-1-heiko@sntech.de
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
 2021-09-15 17:50:22 +02:00
Alex Bee
697dd494cb arm64: dts: rockchip: add SPDIF node for ROCK Pi 4 
Add a SPDIF audio-graph-card to ROCK Pi 4 device tree.

It's not enabled by default since all dma channels are used by
the (already) enabled i2s0/1/2 and the pin is muxed with GPIO4_C5
which might be in use already.
If enabled SPDIF_TX will be available at pin #15.

Signed-off-by: Alex Bee <knaerzche@gmail.com>
Link: https://lore.kernel.org/r/20210618181256.27992-6-knaerzche@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
 2021-09-15 17:50:22 +02:00
Alex Bee
65bd2b8bdb arm64: dts: rockchip: add ES8316 codec for ROCK Pi 4 
ROCK Pi 4 boards have the codec connected to i2s0 and it is accessible
via i2c1 address 0x11.
Add an audio-graph-card for it.

Signed-off-by: Alex Bee <knaerzche@gmail.com>
Link: https://lore.kernel.org/r/20210618181256.27992-5-knaerzche@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
 2021-09-15 17:50:21 +02:00
Alex Bee
4b718ae7d6 arm64: dts: rockchip: Add RK3399 ROCK Pi 4B+ board 
ROCK Pi 4B+ board is the successor of ROCK Pi 4B board.

Differences to the original version are
- has RK3399 OP1 SoC revision
- has eMMC (16 or 32 GB) soldered on board (no changes required,
  since it is enabled in rk3399-rock-pi-4.dtsi)
- dev boards have SPI flash soldered, but as per manufacturer response,
  this won't be the case for mass production boards

Signed-off-by: Alex Bee <knaerzche@gmail.com>
Link: https://lore.kernel.org/r/20210618181256.27992-4-knaerzche@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
 2021-09-15 17:50:20 +02:00
Alex Bee
3a91fb475c arm64: dts: rockchip: Add RK3399 ROCK Pi 4A+ board 
ROCK Pi 4A+ board is the successor of ROCK Pi 4A board.

Differences to the original version are
- has RK3399 OP1 SoC revision
- has eMMC (16 or 32 GB) soldered on board (no changes required,
  since it is enabled in rk3399-rock-pi-4.dtsi)
- dev boards have SPI flash soldered, but as per manufacturer response,
  this won't be the case for mass production boards

Signed-off-by: Alex Bee <knaerzche@gmail.com>
Link: https://lore.kernel.org/r/20210618181256.27992-3-knaerzche@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
 2021-09-15 17:50:20 +02:00
Alex Bee
ecda4466b1 dt-bindings: Add doc for ROCK Pi 4 A+ and B+ 
ROCK Pi 4 got 2 more variants called A+ and B+.
Add the dt-bindings documentation for it.

Signed-off-by: Alex Bee <knaerzche@gmail.com>
Acked-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20210618181256.27992-2-knaerzche@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
 2021-09-15 17:50:19 +02:00
Matthias Brugger
2513fa5c25 arm64: dts: rockchip: Disable CDN DP on Pinebook Pro 
The CDN DP needs a PHY and a extcon to work correctly. But no extcon is
provided by the device-tree, which leads to an error:
cdn-dp fec00000.dp: [drm:cdn_dp_probe [rockchipdrm]] *ERROR* missing extcon or phy
cdn-dp: probe of fec00000.dp failed with error -22

Disable the CDN DP to make graphic work on the Pinebook Pro.

Reported-by: Guillaume Gardet <guillaume.gardet@arm.com>
Signed-off-by: Matthias Brugger <mbrugger@suse.com>
Link: https://lore.kernel.org/r/20210715164101.11486-1-matthias.bgg@kernel.org
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
 2021-09-15 17:50:18 +02:00
Simon Xue
2076121eec arm64: dts: rockchip: add saradc node for rk3568 
Add the core dt-node for the rk3568's saradc.

Signed-off-by: Simon Xue <xxm@rock-chips.com>
Link: https://lore.kernel.org/r/20210705012610.3831-1-xxm@rock-chips.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
 2021-09-15 17:50:18 +02:00
Dennis Gilmore
e97afba328 arm64: dts: rockchip: enable tsadc on helios64 
Enable the tsadc thermal controller on the helios64

Signed-off-by: Dennis Gilmore <dgilmore@redhat.com>
Link: https://lore.kernel.org/r/20210715025635.70452-4-dgilmore@redhat.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
 2021-09-15 17:50:17 +02:00
Dennis Gilmore
fec9fd04da arm64: dts: rockchip: add SPI support to helios64 
add SPI support for the helios64, u-boot can live in spi1, spi2 is user
accessible, spi5 is for the sata controller rom.
https://wiki.kobol.io/helios64/spi/

Signed-off-by: Dennis Gilmore <dgilmore@redhat.com>
Link: https://lore.kernel.org/r/20210715025635.70452-3-dgilmore@redhat.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
 2021-09-15 17:50:16 +02:00
Dennis Gilmore
53269f5288 arm64: dts: rockchip: set stdout-path on helios64 
set the default output path to uart2

Signed-off-by: Dennis Gilmore <dgilmore@redhat.com>
Link: https://lore.kernel.org/r/20210715025635.70452-2-dgilmore@redhat.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
 2021-09-15 17:50:16 +02:00
Levin Du
6d9a7bd6a1 arm64: dts: rockchip: add support for Firefly ROC-RK3399-PC-PLUS 
ROC-RK3399-PC-PLUS is the board inside the portable Firefly Station P1 Geek
PC. As a redesign after the ROC-RK3399-PC, it uses DC-12V as power input
and spares a USB 3 host port. It is also equipped with a USB WiFi chip and
audio codec without the mezzanine board.

- Rockchip RK3399 SoC
- 4GB LPDDR4 RAM
- 16MB SPI-Flash
- eMMC slot
- TF card slot
- USB 3.0 Port x 1, USB 2.0 Port x 1, TypeC Port x 1
- HDMI
- Gigabit Ethernet
- WiFi: RTL8723DU
- Audio: ES8388
- Key: Recovery
- LED: WORK, DIY
- IR

Signed-off-by: Kongxin Deng <dkx@t-chip.com.cn>
Signed-off-by: Levin Du <djw@t-chip.com.cn>
Link: https://lore.kernel.org/r/20210628035402.16812-3-djw@t-chip.com.cn
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
 2021-09-15 17:50:15 +02:00
Levin Du
311864f67c dt-bindings: add doc for Firefly ROC-RK3399-PC-PLUS 
Add devicetree binding documentation for the Firefly ROC-RK3399-PC-PLUS.

Signed-off-by: Levin Du <djw@t-chip.com.cn>
Acked-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20210628035402.16812-2-djw@t-chip.com.cn
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
 2021-09-15 17:50:15 +02:00
Levin Du
e05e45e853 arm64: dts: rockchip: add support for Firefly ROC-RK3328-PC 
ROC-RK3328-PC is the board inside the portable Firefly Station M1
Geek PC. As a redesign after the ROC-RK3328-CC, it uses TypeC as
power input and OTG port, embedded with eMMC 5.1 storage and a
SDIO WiFi/BT chip (RTL8723DS).

- Rockchip RK3328 SoC
- 2/4GB LPDDR3 RAM
- 16/32/64/128GB eMMC 5.1
- TF card slot
- USB 3.0 Port x 1, USB 2.0 Port x 1, TypeC Port x 1 (Power/OTG)
- HDMI
- Gigabit Ethernet
- WiFi: RTL8723DS
- Audio: RK3328
- Key: Power, Reset, Recovery
- LED: POWER, USER
- IR

Signed-off-by: Levin Du <djw@t-chip.com.cn>
Link: https://lore.kernel.org/r/20210709080126.17045-3-djw@t-chip.com.cn
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
 2021-09-15 17:50:14 +02:00
Levin Du
9fe28eedd2 dt-bindings: add doc for Firefly ROC-RK3328-PC 
Add devicetree binding documentation for the Firefly ROC-RK3328-PC.

Signed-off-by: Levin Du <djw@t-chip.com.cn>
Acked-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20210709080126.17045-2-djw@t-chip.com.cn
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
 2021-09-15 17:50:13 +02:00
Liang Chen
e1152a526b arm64: dts: rockchip: add pmu and qos nodes for rk3568 
Add the power-management and QoS nodes to the core rk3568 dtsi.

Signed-off-by: Liang Chen <cl@rock-chips.com>
Link: https://lore.kernel.org/r/20210624131027.3719-1-cl@rock-chips.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
 2021-09-15 17:50:13 +02:00
Liang Chen
fa39c61dcc dt-bindings: arm: rockchip: add rk3568 compatible string to pmu.yaml 
add "rockchip,rk3568-pmu", "syscon", "simple-mfd" for pmu nodes on a
rk3568 platform to pmu.ymal.

Signed-off-by: Liang Chen <cl@rock-chips.com>
Acked-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20210624114719.1685-2-cl@rock-chips.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
 2021-09-15 17:50:12 +02:00
Johan Jonker
b02b47fecc arm64: dts: rockchip: remove ddc-i2c-scl-* properties from rk3318-a95x-z2.dts 
The ddc-i2c-scl-* properties in the hdmi node are
not in use in the mainline kernel, so remove them.

Reported-by: Alex Bee <knaerzche@gmail.com>
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Link: https://lore.kernel.org/r/20210701144110.12333-2-jbx6244@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
 2021-09-15 17:50:11 +02:00
Johan Jonker
a312aeab3f arm64: dts: rockchip: remove clock_in_out from gmac2phy node in rk3318-a95x-z2.dts 
Recently a clock_in_out property was added to the gmac2phy node
in rk3328.dtsi, so now the clock_in_out in rk3318-a95x-z2.dts
can be removed.

Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Link: https://lore.kernel.org/r/20210701144110.12333-1-jbx6244@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
 2021-09-15 17:50:11 +02:00