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arm64: dts: rockchip: add rk356x gpio debounce clocks
The rk356x added a debounce clock to the gpio devices. This clock is necessary for the new v2 gpio driver to bind. Add the clocks to the rk356x device tree. Signed-off-by: Peter Geis <pgwipeout@gmail.com> Link: https://lore.kernel.org/r/20210728180034.717953-4-pgwipeout@gmail.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
This commit is contained in:
committed by
Heiko Stuebner
parent
8a599b56a8
commit
3d9170c3ea
@@ -804,7 +804,7 @@ gpio0: gpio@fdd60000 {
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compatible = "rockchip,gpio-bank";
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reg = <0x0 0xfdd60000 0x0 0x100>;
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interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&pmucru PCLK_GPIO0>;
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clocks = <&pmucru PCLK_GPIO0>, <&pmucru DBCLK_GPIO0>;
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gpio-controller;
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#gpio-cells = <2>;
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interrupt-controller;
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@@ -815,7 +815,7 @@ gpio1: gpio@fe740000 {
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compatible = "rockchip,gpio-bank";
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reg = <0x0 0xfe740000 0x0 0x100>;
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interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&cru PCLK_GPIO1>;
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clocks = <&cru PCLK_GPIO1>, <&cru DBCLK_GPIO1>;
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gpio-controller;
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#gpio-cells = <2>;
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interrupt-controller;
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@@ -826,7 +826,7 @@ gpio2: gpio@fe750000 {
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compatible = "rockchip,gpio-bank";
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reg = <0x0 0xfe750000 0x0 0x100>;
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interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&cru PCLK_GPIO2>;
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clocks = <&cru PCLK_GPIO2>, <&cru DBCLK_GPIO2>;
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gpio-controller;
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#gpio-cells = <2>;
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interrupt-controller;
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@@ -837,7 +837,7 @@ gpio3: gpio@fe760000 {
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compatible = "rockchip,gpio-bank";
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reg = <0x0 0xfe760000 0x0 0x100>;
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interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&cru PCLK_GPIO3>;
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clocks = <&cru PCLK_GPIO3>, <&cru DBCLK_GPIO3>;
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gpio-controller;
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#gpio-cells = <2>;
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interrupt-controller;
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@@ -848,7 +848,7 @@ gpio4: gpio@fe770000 {
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compatible = "rockchip,gpio-bank";
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reg = <0x0 0xfe770000 0x0 0x100>;
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interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&cru PCLK_GPIO4>;
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clocks = <&cru PCLK_GPIO4>, <&cru DBCLK_GPIO4>;
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gpio-controller;
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#gpio-cells = <2>;
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interrupt-controller;
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