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arm64: dts: rockchip: Enable SFC for Odroid Go Advance

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This enables the Rockchip Serial Flash Controller for the Odroid Go
Advance. Note that while the attached SPI NOR flash and the controller
both support quad read mode, only 2 of the required 4 pins are present.
The rx bus width is set to 2 for this reason, and tx bus width is set
to 1 for compatibility reasons.

Signed-off-by: Chris Morgan <macromorgan@hotmail.com>
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
Link: https://lore.kernel.org/r/20210812134639.31586-2-jon.lin@rock-chips.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
This commit is contained in:
Chris Morgan
2021-08-12 21:46:39 +08:00
committed by Heiko Stuebner
parent e2c58ea861
commit e31083f918
1 changed files with 16 additions and 0 deletions
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16
arch/arm64/boot/dts/rockchip/rk3326-odroid-go2.dts
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@@ -517,6 +517,22 @@ &sdmmc {
status = "okay";
};
&sfc {
pinctrl-0 = <&sfc_clk &sfc_cs0 &sfc_bus2>;
pinctrl-names = "default";
#address-cells = <1>;
#size-cells = <0>;
status = "okay";
flash@0 {
compatible = "jedec,spi-nor";
reg = <0>;
spi-max-frequency = <108000000>;
spi-rx-bus-width = <2>;
spi-tx-bus-width = <1>;
};
};
&tsadc {
status = "okay";
};