Commit Graph

1295707 Commits

Author SHA1 Message Date
Arnd Bergmann
5d9e36498b Merge tag 'renesas-dts-for-v6.12-tag2' of https://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel into soc/dt
Renesas DTS updates for v6.12 (take two)

  - Add support for Ethernet TSN and PCIe on the R-Car V4H SoC and the
    White-Hawk (Single) development board,
  - Add display support for the RZ/G2UL SoC and the RZ/G2UL SMARC EVk
    board,
  - Add I2C support for the RZ/G3S SoC and the RZ/G3S SMARC EVK board,
  - Add support for HDMI audio on the RZ/G2L and RZ/G2LC SMARC EVK
    boards,
  - Add initial support for the RZ/V2H(P) (R9A09G057) SoC and the RZ/V2H
    EVK board,
  - Miscellaneous fixes and improvements.

* tag 'renesas-dts-for-v6.12-tag2' of https://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel: (34 commits)
  arm64: dts: renesas: r8a779h0: Add family fallback for CSISP IP
  arm64: dts: renesas: r8a779a0: Add family fallback for CSISP IP
  arm64: dts: renesas: r8a779g0: Add family fallback for CSISP IP
  arm64: dts: renesas: r8a779h0: Add family fallback for VIN IP
  arm64: dts: renesas: r8a779a0: Add family fallback for VIN IP
  arm64: dts: renesas: r8a779g0: Add family fallback for VIN IP
  arm64: dts: renesas: r9a09g057h44-rzv2h-evk: Enable watchdog
  arm64: dts: renesas: r9a09g057h44-rzv2h-evk: Enable OSTM, I2C, and SDHI
  arm64: dts: renesas: r9a09g057: Add WDT0-WDT3 nodes
  arm64: dts: renesas: r9a09g057: Add SDHI0-SDHI2 nodes
  arm64: dts: renesas: r9a09g057: Add RIIC0-RIIC8 nodes
  arm64: dts: renesas: r9a09g057: Add OSTM0-OSTM7 nodes
  arm64: dts: renesas: Add initial DTS for RZ/V2H EVK board
  arm64: dts: renesas: Add initial SoC DTSI for RZ/V2H(P) SoC
  dt-bindings: soc: renesas: Document RZ/V2H EVK board
  dt-bindings: clock: renesas: Document RZ/V2H(P) SoC CPG
  arm64: dts: renesas: r9a07g043u11-smarc: Enable DU
  arm64: dts: renesas: rzg2lc-smarc: Enable HDMI audio
  arm64: dts: renesas: rzg2l-smarc: Enable HDMI audio
  arm64: dts: renesas: r9a07g043u: Add DU node
  ...

Link: https://lore.kernel.org/r/cover.1725374275.git.geert+renesas@glider.be
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2024-09-05 10:13:44 +00:00
Arnd Bergmann
06b6879f0a Merge tag 'v6.12-rockchip-dts32-1' of https://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into soc/dt
spidev on the elgin-r1 got a real compatible, the rk3128 could enable its
VPU for video decoding and the rk3128 sfc node can use the clock constant
now after the merge-window.

* tag 'v6.12-rockchip-dts32-1' of https://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
  ARM: dts: rockchip: Do not describe unexisting DAC device on rv1108-elgin-r1
  ARM: dts: rockchip: Add vpu nodes for RK3128
  ARM: dts: rockchip: use constant for HCLK_SFC on rk3128

Link: https://lore.kernel.org/r/3405397.RL5eaSpR8r@diego
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2024-09-03 10:40:29 +00:00
Arnd Bergmann
57e8098a9a Merge tag 'v6.12-rockchip-dts64-1' of https://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into soc/dt
New boards: Firefly PX30 Core SoM with JD4 baseboard, NanoPi 2S Plus,
Taishan Pi RK3566, ODROID-M1S,NanoPC-T6 LTS, Cool Pi CM5 GenBook

Big number of improvements for NanoPC-T6,QNAP-TS433 and FastRhino R66S
With recent dtc changes making it into linux-next the Wolfvision Visualizer
overlay finally compiles without warnings. And smaller number of
improvements on a number of Radxa boards.

Interesting new additions on a soc-level are the hardware RNG on rk3568,
an additional sdmmc-controller (not supported before) on rk3328 and
v4l video codecs for the rk3588 (decoding of h.264 amongst others).

* tag 'v6.12-rockchip-dts64-1' of https://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip: (62 commits)
  arm64: dts: rockchip: drop unsupported regulator-property from NanoPC-T6
  arm64: dts: rockchip: drop unsupported regulator property from NanoPC-T6
  arm64: dts: rockchip: use correct fcs,suspend-voltage-selector on NanoPC-T6
  arm64: dts: rockchip: add Mask Rom key on NanoPC-T6
  arm64: dts: rockchip: enable USB-C on NanoPC-T6
  arm64: dts: rockchip: enable GPU on NanoPC-T6
  arm64: dts: rockchip: add IR-receiver to NanoPC-T6
  arm64: dts: rockchip: add SPI flash on NanoPC-T6
  arm64: dts: rockchip: add NanoPC-T6 LTS
  arm64: dts: rockchip: move NanoPC-T6 parts to DTS
  arm64: dts: rockchip: prepare NanoPC-T6 for LTS board
  dt-bindings: arm: rockchip: Add NanoPC-T6 LTS
  arm64: dts: rockchip: disable display subsystem only for Radxa E25
  arm64: dts: rockchip: enable PCIe on M.2 E key for Radxa ROCK 5A
  arm64: dts: rockchip: remove unnecessary properties for Radxa ROCK 5A
  arm64: dts: rockchip: add dts for LCKFB Taishan Pi RK3566
  dt-bindings: arm: rockchip: Add LCKFB Taishan Pi RK3566
  dt-bindings: vendor-prefixes: Add Shenzhen JLC Technology Group LCKFB
  arm64: dts: rockchip: Add Hardkernel ODROID-M1S
  dt-bindings: arm: rockchip: Add Hardkernel ODROID-M1S
  ...

Link: https://lore.kernel.org/r/6322098.17fYzF0512@diego
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2024-09-03 10:38:44 +00:00
Arnd Bergmann
a86f3dc85f Merge tag 'at91-dt-6.12' of https://git.kernel.org/pub/scm/linux/kernel/git/at91/linux into soc/dt
Microchip AT91 device tree updates for v6.12

It contains:
- SAMA7G5-EK DTS was updated with EEPROM nodes containing Ethernet
  addresses (needed, at least, when U-Boot is removed from the booting
  chain)
- 5V supplies were added to to MCP16502 PMIC nodes for better hardware
  description
- cleanups around pinctrl nodes which removed many dtbs_check warnings;
  along with it the pinctrl documentation was converted to json schema
- fixes for the RTC and RTT supply clocks on SAMA7G5 and SAM9X60
- other cleanups to fix dtbs_check warnings

* tag 'at91-dt-6.12' of https://git.kernel.org/pub/scm/linux/kernel/git/at91/linux:
  ARM: dts: microchip: sama7g5: Fix RTT clock
  ARM: dts: microchip: sam9x60: Fix rtc/rtt clocks
  dt-bindings: pinctrl: Convert Atmel PIO3 pinctrl to json-schema
  ARM: dts: microchip: sam9x60: Remove additional compatible string from GPIO node
  ARM: dts: microchip: Remove additional compatible string from PIO3 pinctrl nodes
  ARM: dts: microchip: change to simple-mfd from simple-bus for PIO3 pinumux controller
  ARM: dts: microchip: sama5d29_curiosity: Add reg_5v to supply PMIC nodes
  ARM: dts: microchip: at91-sama5d27_wlsom1: Add reg_5v to supply PMIC nodes
  ARM: dts: microchip: at91-sama5d2_icp: Add reg_5v to supply PMIC nodes
  ARM: dts: microchip: at91-sama7g54_curiosity: Add reg_5v to supply PMIC nodes
  ARM: dts: microchip: at91-sama7g5ek: Add reg_5v to supply PMIC nodes
  ARM: dts: microchip: at91: align LED node name with bindings
  ARM: dts: microchip: sam9x60: Move i2c address/size to dtsi
  ARM: dts: microchip: at91-sama7g5ek: add EEPROMs

Link: https://lore.kernel.org/r/20240901133110.2038675-2-claudiu.beznea@tuxon.dev
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2024-09-03 10:37:03 +00:00
Arnd Bergmann
d3f92f5d8e Merge tag 'tegra-for-6.12-arm64-dt' of https://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into soc/dt
arm64: tegra: Device tree changes for v6.12-rc1

This contains a slew of cleanups and consolidation changes for several
Orin boards and also fix some minor issues and enable more features on
the Jetson TX1.

* tag 'tegra-for-6.12-arm64-dt' of https://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
  arm64: tegra: Add thermal nodes to AGX Orin SKU8
  arm64: tegra: Move BPMP nodes to AGX Orin module
  arm64: tegra: Move padctl supply nodes to AGX Orin module
  arm64: tegra: Move AGX Orin nodes to correct location
  arm64: tegra: Combine IGX Orin board files
  arm64: tegra: Combine AGX Orin board files
  arm64: tegra: Add common nodes to AGX Orin module
  arm64: tegra: Wire up WiFi on Jetson TX1 module
  arm64: tegra: Wire up Bluetooth on Jetson TX1 module
  arm64: tegra: Wire up power sensors on Jetson TX1 DevKit
  arm64: tegra: Add p3767 PCIe C4 EP details
  arm64: tegra: Add Tegra234 PCIe C4 EP definition
  arm64: tegra: Add wp-gpio for P2597's external card slot
  arm64: tegra: Fix gpio for P2597 vmmc regulator
  arm64: tegra: Correct location of power-sensors for IGX Orin
  arm64: tegra: enable same UARTs for Orin NX/Nano
  arm64: tegra: Add DMA properties for Tegra234 UARTA

Link: https://lore.kernel.org/r/20240830141004.3195210-5-thierry.reding@gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2024-09-03 10:34:47 +00:00
Arnd Bergmann
ee11148c09 Merge tag 'tegra-for-6.12-arm-dt' of https://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into soc/dt
ARM: tegra: Device tree changes for v6.12-rc1

These patches add a bunch more features for the TF701T board and wire up
the front panel LEDs on TrimSlice.

* tag 'tegra-for-6.12-arm-dt' of https://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
  ARM: tegra: Wire up two front panel LEDs on TrimSlice
  ARM: tegra: tf701t: Configure USB
  ARM: tegra: tf701t: Use dedicated backlight regulator
  ARM: tegra: tf701t: Re-group GPIO keys
  ARM: tegra: tf701t: Bind WIFI SDIO and EMMC
  ARM: tegra: tf701t: Complete sound bindings
  ARM: tegra: tf701t: Adjust sensors nodes
  ARM: tegra: tf701t: Add Bluetooth node
  ARM: tegra: tf701t: Add HDMI bindings
  ARM: tegra: tf701t: Correct and complete PMIC and PMC bindings
  ARM: tegra: tf701t: Bind VDE device
  ARM: tegra: tf701t: Use unimomentary pinmux setup

Link: https://lore.kernel.org/r/20240830141004.3195210-4-thierry.reding@gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2024-09-03 10:32:48 +00:00
Arnd Bergmann
e2886f23d3 Merge tag 'tegra-for-6.12-dt-bindings' of https://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into soc/dt
dt-bindings: Changes for v6.12-rc1

This adds compatible strings for all revisions of the Nyan board.

* tag 'tegra-for-6.12-dt-bindings' of https://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
  dt-bindings: arm: tegra: Document Nyan, all revisions in kernel tree

Link: https://lore.kernel.org/r/20240830141004.3195210-3-thierry.reding@gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2024-09-03 10:32:10 +00:00
Arnd Bergmann
76ae26c4b9 Merge tag 'juno-update-6.12' of https://git.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux into soc/dt
Armv8 Juno/FVP update for v6.12

Just a single update adding stdout-path to the fast models(FVP and
Foundation) which eliminates the need to specify any platform-specific
kernel command line parameters to get working earlycon or console.

* tag 'juno-update-6.12' of https://git.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux:
  arm64: dts: fvp: Set stdout-path to serial0 in the chosen node

Link: https://lore.kernel.org/r/20240830135837.2383557-1-sudeep.holla@arm.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2024-09-03 10:31:34 +00:00
Arnd Bergmann
3b8b1ff762 Merge tag 'samsung-dt64-6.12' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into soc/dt
Samsung DTS ARM64 changes for v6.12

1. Exynos7885: Correct amount of RAM on Samsung Galaxy A8.
2. ExynosAutov9: Add new DPUM clock controller and DPUM IOMMU (SysMMU).
3. ExynosAutov920: Add initial (incomplete) clock controllers: TOP and
   PERIC0 controllers.
4. Google GS101: Add reboot and poweroff support.
5. Add binding headers with clock IDs for several devices, used by the
   DTS.

* tag 'samsung-dt64-6.12' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux:
  arm64: dts: exynosautov920: add initial CMU clock nodes in ExynosAuto v920
  dt-bindings: clock: add ExynosAuto v920 SoC CMU bindings
  arm64: dts: exynosautov9: Add dpum SysMMU
  arm64: dts: exynosautov9: add dpum clock DT nodes
  dt-bindings: clock: exynosautov9: add dpum clock
  dt-bindings: clock: exynos7885: Add indices for USB clocks
  dt-bindings: clock: exynos7885: Add CMU_TOP PLL MUX indices
  dt-bindings: clock: exynos7885: Fix duplicated binding
  dt-bindings: clock: exynos850: Add TMU clock
  arm64: dts: exynos: gs101: add syscon-poweroff and syscon-reboot nodes
  arm64: dts: exynos: exynos7885-jackpotlte: Correct RAM amount to 4GB

Link: https://lore.kernel.org/r/20240827121638.29707-2-krzysztof.kozlowski@linaro.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2024-09-03 10:30:19 +00:00
Arnd Bergmann
01dc1baee8 Merge tag 'renesas-dts-for-v6.12-tag1' of https://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel into soc/dt
Renesas DTS updates for v6.12

  - Add support for sound, push switches, and GP LEDs on the Gray Hawk
    Single development board,
  - Add missing iommus properties on R-Car Gen3/Gen4 and RZ/G2 SoCs,
  - Add PWM support for the R-Car V4M SoC,
  - Improve Ethernet descriptions on the RZ/G2L, RZ/G2LC, and RZ/G2UL
    SMARC SoMs,
  - Add DMAC support for the RZ/G3S SoC,
  - Add CAN-FD support for the R-Car V4M SoC and the Gray Hawk Single
    development board.

* tag 'renesas-dts-for-v6.12-tag1' of https://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel: (25 commits)
  arm64: dts: renesas: gray-hawk-single: Add CAN-FD support
  arm64: dts: renesas: r8a779h0: Add CAN-FD node
  arm64: dts: renesas: r9a08g045: Add DMAC node
  arm64: dts: renesas: rzg2ul: Set Ethernet PVDD to 1.8V
  arm64: dts: renesas: rzg2lc: Set Ethernet PVDD to 1.8V
  arm64: dts: renesas: rzg2l: Set Ethernet PVDD to 1.8V
  arm64: dts: renesas: rzg2ul: Enable Ethernet TXC output
  arm64: dts: renesas: rzg2lc: Enable Ethernet TXC output
  arm64: dts: renesas: rzg2l: Enable Ethernet TXC output
  arm64: dts: renesas: r8a779h0: Add PWM device nodes
  arm64: dts: renesas: gray-hawk-single: Add GP LEDs
  arm64: dts: renesas: gray-hawk-single: Add push switches
  arm64: dts: renesas: r8a779h0: Add missing iommus properties
  arm64: dts: renesas: r8a779g0: Add missing iommus properties
  arm64: dts: renesas: r8a779a0: Add missing iommus properties
  arm64: dts: renesas: r8a77980: Add missing iommus properties
  arm64: dts: renesas: r8a77970: Add missing iommus property
  arm64: dts: renesas: r8a77965: Add missing iommus properties
  arm64: dts: renesas: r8a77961: Add missing iommus properties
  arm64: dts: renesas: r8a77960: Add missing iommus properties
  ...

Link: https://lore.kernel.org/r/cover.1724316485.git.geert+renesas@glider.be
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2024-09-03 10:29:54 +00:00
Arnd Bergmann
ca947a4b03 Merge tag 'renesas-dt-bindings-for-v6.12-tag1' of https://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel into soc/dt
Renesas DT binding updates for v6.12

  - Document support for the Renesas RZ/G2M v3.0 (r8a774a3) SoC.

* tag 'renesas-dt-bindings-for-v6.12-tag1' of https://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel:
  dt-bindings: reset: renesas: Document RZ/G2M v3.0 (r8a774a3) reset module
  dt-bindings: power: renesas: Document RZ/G2M v3.0 (r8a774a3) SYSC binding
  dt-bindings: soc: renesas: Document RZ/G2M v3.0 (r8a774a3) SoC

Link: https://lore.kernel.org/r/cover.1724316483.git.geert+renesas@glider.be
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2024-09-03 10:28:17 +00:00
Arnd Bergmann
d846d5f1ba Merge tag 'thead-dt-for-v6.12' of https://github.com/pdp7/linux into soc/dt
T-HEAD Devicetrees for v6.12

Add SPI controller node to th1520.dtsi and enable spi0 on the BeagleV
Ahead and LicheePi 4A.

The TH1520 AP_SYS clock driver landed in v6.11 so convert multiple
peripherals like mmc and uart from fixed clocks to the clock controller.

All of these patches have been successfully tested in the latest
linux-next releases.

Signed-off-by: Drew Fustini <drew@pdp7.com>

* tag 'thead-dt-for-v6.12' of https://github.com/pdp7/linux:
  riscv: dts: thead: change TH1520 SPI node to use clock controller
  riscv: dts: thead: add clock to TH1520 gpio nodes
  riscv: dts: thead: update TH1520 dma and timer nodes to use clock controller
  riscv: dts: thead: change TH1520 mmc nodes to use clock controller
  riscv: dts: thead: change TH1520 uart nodes to use clock controller
  riscv: dts: thead: Add TH1520 AP_SUBSYS clock controller
  riscv: dts: thead: add basic spi node

Link: https://lore.kernel.org/r/ZsWs8QiVruMXjzPc@x1
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2024-09-03 10:24:35 +00:00
Niklas Söderlund
cc41aa93bb arm64: dts: renesas: r8a779h0: Add family fallback for CSISP IP
The usage of the R-Car V4M CSISP bindings where merged before the
bindings where approved. At that time the family fallback compatible
where not part of the bindings, add them.

Fixes: 2bb78d9fb7 ("arm64: dts: renesas: r8a779h0: Add video capture nodes")
Signed-off-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Link: https://lore.kernel.org/20240826144352.3026980-7-niklas.soderlund+renesas@ragnatech.se
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2024-09-03 10:23:02 +02:00
Niklas Söderlund
af9e91cb97 arm64: dts: renesas: r8a779a0: Add family fallback for CSISP IP
To make it easier to support new R-Car Gen4 SoCs add a family fallback
compatible similar to what was done for VIN on R-Car Gen4.

There is no functional change, but the addition of the family fallback
in the bindings produces warnings for R-Car V3U for DTS checks if they
are not added.

Signed-off-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Reviewed-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/20240826144352.3026980-4-niklas.soderlund+renesas@ragnatech.se
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2024-09-03 10:23:02 +02:00
Niklas Söderlund
2c5c9e37c1 arm64: dts: renesas: r8a779g0: Add family fallback for CSISP IP
To make it easier to support new R-Car Gen4 SoCs add a family fallback
compatible similar to what was done for VIN on R-Car Gen4.

There is no functional change, but the addition of the family fallback
in the bindings produces warnings for R-Car V4H for DTS checks if they
are not added.

Signed-off-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Reviewed-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/20240826144352.3026980-3-niklas.soderlund+renesas@ragnatech.se
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2024-09-03 10:23:02 +02:00
Niklas Söderlund
c92be7b6b3 arm64: dts: renesas: r8a779h0: Add family fallback for VIN IP
The usage of the R-Car V4M VIN bindings where merged before the bindings
where approved.  At that time the family fallback compatible was not
part of the bindings, add it.

Fixes: 2bb78d9fb7 ("arm64: dts: renesas: r8a779h0: Add video capture nodes")
Signed-off-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Link: https://lore.kernel.org/20240704161620.1425409-7-niklas.soderlund+renesas@ragnatech.se
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2024-09-03 10:23:02 +02:00
Niklas Söderlund
e9f351d67d arm64: dts: renesas: r8a779a0: Add family fallback for VIN IP
To make it easier to support new R-Car Gen4 SoCs a family fallback
compatible similar to what is used for R-Car Gen2 has been added to the
VIN bindings.  Add this fallback to the R-Car V3U DTSI.

There is no functional change, but the addition of the family fallback
in the bindings produces warnings for R-Car V3U for DTS checks if they
are not added.

Signed-off-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Link: https://lore.kernel.org/20240704161620.1425409-4-niklas.soderlund+renesas@ragnatech.se
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2024-09-03 10:22:56 +02:00
Niklas Söderlund
8c07e11916 arm64: dts: renesas: r8a779g0: Add family fallback for VIN IP
To make it easier to support new R-Car Gen4 SoCs a family fallback
compatible similar to what is used for R-Car Gen2 has been added to the
VIN bindings.  Add this fallback to the R-Car V4H DTSI.

There is no functional change, but the addition of the family fallback
in the bindings produces warnings for R-Car V4H for DTS checks if they
are not added.

Signed-off-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Link: https://lore.kernel.org/20240704161620.1425409-3-niklas.soderlund+renesas@ragnatech.se
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2024-09-03 10:22:50 +02:00
Lad Prabhakar
686bba2a17 arm64: dts: renesas: r9a09g057h44-rzv2h-evk: Enable watchdog
Enable WDT1 watchdog on RZ/V2H EVK platform.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/20240828124134.188864-10-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2024-09-02 11:23:57 +02:00
Lad Prabhakar
5f0dad9802 arm64: dts: renesas: r9a09g057h44-rzv2h-evk: Enable OSTM, I2C, and SDHI
Enable OSTM0-OSTM7, RIIC{0,1,2,3,6,7,8}, and SDHI1 (available on the SD2
connector) on the RZ/V2H EVK platform.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/20240828124134.188864-9-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2024-09-02 11:23:57 +02:00
Lad Prabhakar
095105496e arm64: dts: renesas: r9a09g057: Add WDT0-WDT3 nodes
Add WDT0-WDT3 nodes to RZ/V2H(P) ("R9A09G057") SoC DTSI.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/20240828124134.188864-8-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2024-09-02 11:23:57 +02:00
Lad Prabhakar
2cc5322acd arm64: dts: renesas: r9a09g057: Add SDHI0-SDHI2 nodes
Add SDHI0-SDHI2 nodes to RZ/V2H(P) ("R9A09G057") SoC DTSI.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/20240828124134.188864-7-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2024-09-02 11:23:57 +02:00
Lad Prabhakar
04c80e7bed arm64: dts: renesas: r9a09g057: Add RIIC0-RIIC8 nodes
Add RIIC0-RIIC8 nodes to RZ/V2H(P) ("R9A09G057") SoC DTSI.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/20240828124134.188864-6-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2024-09-02 11:23:57 +02:00
Lad Prabhakar
e3dc593ef3 arm64: dts: renesas: r9a09g057: Add OSTM0-OSTM7 nodes
Add OSTM0-OSTM7 nodes to RZ/V2H(P) ("R9A09G057") SoC DTSI.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/20240828124134.188864-5-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2024-09-02 11:23:57 +02:00
Lad Prabhakar
2fddca72dc arm64: dts: renesas: Add initial DTS for RZ/V2H EVK board
Add initial DTS for RZ/V2H EVK board (based on R9A09G057H44), adding
the below support:
- Memory
- Clock inputs
- PINCTRL
- SCIF

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/20240828124134.188864-4-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2024-09-02 11:23:57 +02:00
Lad Prabhakar
740cf2a2d6 arm64: dts: renesas: Add initial SoC DTSI for RZ/V2H(P) SoC
Add initial SoC DTSI for Renesas RZ/V2H(P) ("R9A09G057") SoC, below are
the list of blocks added:
- EXT CLKs
- 4X CA55
- SCIF
- PFC
- CPG
- SYS
- GIC
- ARMv8 Timer

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/20240828124134.188864-3-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2024-09-02 11:23:57 +02:00
Geert Uytterhoeven
bbdee962b2 Merge tag 'renesas-r9a09g057-dt-binding-defs-tag' into renesas-dts-for-v6.12
Renesas RZ/V2H DT Binding Definitions

DT bindings and binding definitions for the Renesas RZ/V2H (R9A09G057)
SoC, shared by driver and DT source files.
2024-09-02 11:23:32 +02:00
Lad Prabhakar
15bba65c19 dt-bindings: soc: renesas: Document RZ/V2H EVK board
Add "renesas,rzv2h-evk" which targets the Renesas RZ/V2H ("R9A09G057")
EVK board.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Acked-by: Rob Herring (Arm) <robh@kernel.org>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/20240828124134.188864-2-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2024-09-02 11:18:39 +02:00
Lad Prabhakar
afec1aba08 dt-bindings: clock: renesas: Document RZ/V2H(P) SoC CPG
Document the device tree bindings for the Renesas RZ/V2H(P) SoC
Clock Pulse Generator (CPG).

CPG block handles the below operations:
- Generation and control of clock signals for the IP modules
- Generation and control of resets
- Control over booting
- Low power consumption and power supply domains

Also define constants for the core clocks of the RZ/V2H(P) SoC. Note the
core clocks are a subset of the ones which are listed as part of section
4.4.2 of HW manual Rev.1.01 which cannot be controlled by CLKON register.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/20240729202645.263525-2-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2024-09-02 11:17:51 +02:00
Claudiu Beznea
867bf19232 ARM: dts: microchip: sama7g5: Fix RTT clock
According to datasheet, Chapter 34. Clock Generator, section 34.2,
Embedded characteristics, source clock for RTT is the TD_SLCK, registered
with ID 1 by the slow clock controller driver. Fix RTT clock.

Fixes: 7540629e2f ("ARM: dts: at91: add sama7g5 SoC DT and sama7g5-ek")
Link: https://lore.kernel.org/r/20240826165320.3068359-1-claudiu.beznea@tuxon.dev
Signed-off-by: Claudiu Beznea <claudiu.beznea@tuxon.dev>
2024-08-31 15:17:04 +03:00
Heiko Stuebner
78d500329b arm64: dts: rockchip: drop unsupported regulator-property from NanoPC-T6
vcc3v3-sd-s0-regulator used enable-active-low. According the binding
of the fixed regulator, that is the assumed mode of operation if
enable-active-high is not specified. So this is property is not part
of the binding, therefore remove it.

Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Link: https://lore.kernel.org/r/20240829132100.1723127-4-heiko@sntech.de
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2024-08-29 23:55:32 +02:00
Heiko Stuebner
9c50ba541a arm64: dts: rockchip: drop unsupported regulator property from NanoPC-T6
regulator-init-microvolt is used in the vendor-kernel, but not part
of the specification.

Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Link: https://lore.kernel.org/r/20240829132100.1723127-3-heiko@sntech.de
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2024-08-29 23:55:32 +02:00
Heiko Stuebner
170c77276d arm64: dts: rockchip: use correct fcs,suspend-voltage-selector on NanoPC-T6
A remant from moving from the vendor kernel, the regulator is using
a fairchild fcs prefix instead of rockchip,* in the mainline kernel
according to its binding.

Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Link: https://lore.kernel.org/r/20240829132100.1723127-2-heiko@sntech.de
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2024-08-29 23:55:32 +02:00
Fabio Estevam
0296f20c72 ARM: dts: rockchip: Do not describe unexisting DAC device on rv1108-elgin-r1
There is no DAC connected to the SPI bus of the Elgin RV1108 R1 board.

There is a JG10309-01 LCD controlled via SPI though.

Properly describe it by adding the "elgin,jg10309-01" compatible
string.

Reported-by: Conor Dooley <conor.dooley@microchip.com>
Closes: https://lore.kernel.org/linux-arm-kernel/20240717-parrot-malt-83cc04bf6b36@spud/
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Acked-by: Heiko Stuebner <heiko@sntech.de>
Link: https://lore.kernel.org/r/20240829113158.3324928-3-festevam@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2024-08-29 19:37:00 +02:00
Dara Stotland
93ff968622 arm64: tegra: Add thermal nodes to AGX Orin SKU8
One of the key differences between p3701-0000 and p3701-0008 is the
temperature range. Add this info for p3701-0008.

Signed-off-by: Dara Stotland <dstotland@nvidia.com>
Reviewed-by: Brad Griffis <bgriffis@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2024-08-29 17:40:35 +02:00
Dara Stotland
1f190117a1 arm64: tegra: Move BPMP nodes to AGX Orin module
All SKUs of the p3701 module contain a temp sensor connected to the
BPMP I2C. Move the associated nodes from tegra234-p3701-0008.dtsi
to tegra234-p3701.dtsi. Add missing compatible.

Signed-off-by: Dara Stotland <dstotland@nvidia.com>
Reviewed-by: Brad Griffis <bgriffis@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2024-08-29 17:40:35 +02:00
Dara Stotland
7662fe9639 arm64: tegra: Move padctl supply nodes to AGX Orin module
Some padctl supply nodes currently reside in board file, when they
should reside on module level. The nodes are part of module,
not board. Move these nodes to the correct AGX Orin
module file.

Signed-off-by: Dara Stotland <dstotland@nvidia.com>
Reviewed-by: Brad Griffis <bgriffis@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2024-08-29 17:40:35 +02:00
Dara Stotland
d075995c11 arm64: tegra: Move AGX Orin nodes to correct location
Some of the nodes inside the AGX Orin module file are in the
wrong location. In particular, the SD card interface and
two of the PCIe regulators in the module file should instead
reside in the board file. These components are not part of the
module. They are part of the carrier board. Move these
nodes to the correct location.

Fixes: cd42b26a52 ("arm64: tegra: Add regulators required for PCIe")
Fixes: d71b893a11 ("arm64: tegra: Add Tegra234 SDMMC1 device tree node")
Signed-off-by: Dara Stotland <dstotland@nvidia.com>
Reviewed-by: Brad Griffis <bgriffis@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2024-08-29 17:40:35 +02:00
Dara Stotland
a034db9e4d arm64: tegra: Combine IGX Orin board files
Current IGX Orin structure has both a top-level module+board
file as well as a board file. Most of the data in the board-file
is closely related to the module itself. The benefit of this
extra file is outweighed by the additional complexity. Merge
the board file into the module+board file for simplicity.

Signed-off-by: Dara Stotland <dstotland@nvidia.com>
Reviewed-by: Brad Griffis <bgriffis@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2024-08-29 17:40:35 +02:00
Dara Stotland
7a3f6cb1de arm64: tegra: Combine AGX Orin board files
The current AGX Orin structure has both a top-level module+board
file as well as a board file. Most of the data in the board-file
is closely related to the module itself. The benefit of this
extra file is outweighed by the additional complexity. Merge
the board file into the module+board file for simplicity.

Signed-off-by: Dara Stotland <dstotland@nvidia.com>
Reviewed-by: Brad Griffis <bgriffis@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2024-08-29 17:40:34 +02:00
Dara Stotland
ab9cd79d41 arm64: tegra: Add common nodes to AGX Orin module
The AGX Orin module boards contain common nodes that can
be moved to the included module dtsi. This eliminates
redundancy within the files and reduces lines of code.
Data from tegra234-p3701-0000 and tegra234-p3701-0008 that
is common is now in tegra234-p3701.dtsi.

Signed-off-by: Dara Stotland <dstotland@nvidia.com>
Reviewed-by: Brad Griffis <bgriffis@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2024-08-29 17:40:13 +02:00
Tomasz Maciej Nowak
8f4c834d89 ARM: tegra: Wire up two front panel LEDs on TrimSlice
Pins responsible for controlling these LEDs need to have tristate
control removed if we want them as GPIOs. This change aligns with
pinmux configuration of "dte" pin group in downstream kernel[1].
These LEDs had no function assigned on vendor kernel and there is no
label on the case, the only markings are on PCB which are part of node
names (ds1 marking is on power LED controlled by PMIC), so generic term
is assigned as the function.

1. https://github.com/compulab/trimslice-android-kernel/blob/upstream/arch/arm/mach-tegra/board-trimslice-pinmux.c#L45

Signed-off-by: Tomasz Maciej Nowak <tmn505@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2024-08-29 17:36:39 +02:00
Tomasz Maciej Nowak
a50d5dcd28 arm64: tegra: Wire up WiFi on Jetson TX1 module
P2180 modules have WiFi in form of BCM4354 chip, and kernel driver
supports this one, so enable it for all users. The necessary calibration
file can be obtained from Jetson Linux Archive. nvram.txt file is
located in "Driver Package (BSP)" in
nv_tegra/l4t_deb_packages/nvidia-l4t-firmware_<version>_arm64.deb
archive. The rest of necessary blobs can be obtained from official
Linux Firmware repository or (newer ones) from Infineon
ifx-linux-firmware repository (look in older releases).

Signed-off-by: Tomasz Maciej Nowak <tmn505@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2024-08-29 17:35:11 +02:00
Tomasz Maciej Nowak
6eba6471bb arm64: tegra: Wire up Bluetooth on Jetson TX1 module
P2180 modules have Bluetooth in form of BCM4354 chip, and kernel driver
supports this one, so enable it for all users. The necessary firmware
can be obtained from Jetson Linux Archive. bcm4354.hcd file is located
in "Driver Package (BSP)" in
nv_tegra/l4t_deb_packages/nvidia-l4t-firmware_<version>_arm64.deb
archive.

Signed-off-by: Tomasz Maciej Nowak <tmn505@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2024-08-29 17:34:57 +02:00
Tomasz Maciej Nowak
3ed4e09860 arm64: tegra: Wire up power sensors on Jetson TX1 DevKit
One INA3221 sensor is located on P2180 module and the other two are on
P2597 base board.

Signed-off-by: Tomasz Maciej Nowak <tmn505@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2024-08-29 17:34:48 +02:00
Vedant Deshpande
6e1a196425 arm64: tegra: Add p3767 PCIe C4 EP details
Add implementation details for Orin NX/Nano PCIe EP on C4.

Signed-off-by: Vedant Deshpande <vedantd@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2024-08-29 17:32:16 +02:00
Vedant Deshpande
0580286d0d arm64: tegra: Add Tegra234 PCIe C4 EP definition
Add PCIe C4 EP controller definition in device tree for Tegra234
devices.

Signed-off-by: Vedant Deshpande <vedantd@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2024-08-29 17:32:01 +02:00
Diogo Ivo
ebe899563a arm64: tegra: Add wp-gpio for P2597's external card slot
Add the definition for the wp-gpio of the P2597's external card slot,
enabling this functionality.

Tested on a P2597 board.

Signed-off-by: Diogo Ivo <diogo.ivo@tecnico.ulisboa.pt>
Tested-by: Tomasz Maciej Nowak <tmn505@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2024-08-29 17:29:13 +02:00
Diogo Ivo
46a26db827 arm64: tegra: Fix gpio for P2597 vmmc regulator
The current declaration is off-by-one and actually corresponds to the
wp-gpio of the external slot.

Tested on a P2597 board.

Signed-off-by: Diogo Ivo <diogo.ivo@tecnico.ulisboa.pt>
Tested-by: Tomasz Maciej Nowak <tmn505@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2024-08-29 17:29:13 +02:00
David Heidelberg
c20ebc7fbd dt-bindings: arm: tegra: Document Nyan, all revisions in kernel tree
Avoid firing useless warnings when running make dtbs_check

Signed-off-by: David Heidelberg <david@ixit.cz>
Acked-by: Rob Herring (Arm) <robh@kernel.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2024-08-29 17:24:49 +02:00