arm64: dts: renesas: Add initial DTS for RZ/V2H EVK board

Add initial DTS for RZ/V2H EVK board (based on R9A09G057H44), adding
the below support:
- Memory
- Clock inputs
- PINCTRL
- SCIF

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/20240828124134.188864-4-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
This commit is contained in:
Lad Prabhakar
2024-08-28 13:41:28 +01:00
committed by Geert Uytterhoeven
parent 740cf2a2d6
commit 2fddca72dc
2 changed files with 63 additions and 0 deletions

View File

@@ -140,5 +140,7 @@ dtb-$(CONFIG_ARCH_R9A08G045) += r9a08g045s33-smarc.dtb
dtb-$(CONFIG_ARCH_R9A09G011) += r9a09g011-v2mevk2.dtb
dtb-$(CONFIG_ARCH_R9A09G057) += r9a09g057h44-rzv2h-evk.dtb
dtb-$(CONFIG_ARCH_RCAR_GEN3) += draak-ebisu-panel-aa104xd12.dtbo
dtb-$(CONFIG_ARCH_RCAR_GEN3) += salvator-panel-aa104xd12.dtbo

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@@ -0,0 +1,61 @@
// SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
/*
* Device Tree Source for the RZ/V2H EVK board
*
* Copyright (C) 2024 Renesas Electronics Corp.
*/
/dts-v1/;
#include "r9a09g057.dtsi"
/ {
model = "Renesas RZ/V2H EVK Board based on r9a09g057h44";
compatible = "renesas,rzv2h-evk", "renesas,r9a09g057h44", "renesas,r9a09g057";
aliases {
serial0 = &scif;
};
chosen {
bootargs = "ignore_loglevel";
stdout-path = "serial0:115200n8";
};
memory@48000000 {
device_type = "memory";
/* first 128MB is reserved for secure area. */
reg = <0x0 0x48000000 0x1 0xF8000000>;
};
memory@240000000 {
device_type = "memory";
reg = <0x2 0x40000000 0x2 0x00000000>;
};
};
&audio_extal_clk {
clock-frequency = <22579200>;
};
&pinctrl {
scif_pins: scif {
pins = "SCIF_TXD", "SCIF_RXD";
renesas,output-impedance = <1>;
};
};
&qextal_clk {
clock-frequency = <24000000>;
};
&rtxin_clk {
clock-frequency = <32768>;
};
&scif {
pinctrl-0 = <&scif_pins>;
pinctrl-names = "default";
status = "okay";
};