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arm64: dts: renesas: Add initial DTS for RZ/V2H EVK board
Add initial DTS for RZ/V2H EVK board (based on R9A09G057H44), adding the below support: - Memory - Clock inputs - PINCTRL - SCIF Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/20240828124134.188864-4-prabhakar.mahadev-lad.rj@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
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committed by
Geert Uytterhoeven
parent
740cf2a2d6
commit
2fddca72dc
@@ -140,5 +140,7 @@ dtb-$(CONFIG_ARCH_R9A08G045) += r9a08g045s33-smarc.dtb
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dtb-$(CONFIG_ARCH_R9A09G011) += r9a09g011-v2mevk2.dtb
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dtb-$(CONFIG_ARCH_R9A09G057) += r9a09g057h44-rzv2h-evk.dtb
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dtb-$(CONFIG_ARCH_RCAR_GEN3) += draak-ebisu-panel-aa104xd12.dtbo
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dtb-$(CONFIG_ARCH_RCAR_GEN3) += salvator-panel-aa104xd12.dtbo
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61
arch/arm64/boot/dts/renesas/r9a09g057h44-rzv2h-evk.dts
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61
arch/arm64/boot/dts/renesas/r9a09g057h44-rzv2h-evk.dts
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@@ -0,0 +1,61 @@
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// SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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/*
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* Device Tree Source for the RZ/V2H EVK board
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*
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* Copyright (C) 2024 Renesas Electronics Corp.
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*/
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/dts-v1/;
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#include "r9a09g057.dtsi"
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/ {
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model = "Renesas RZ/V2H EVK Board based on r9a09g057h44";
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compatible = "renesas,rzv2h-evk", "renesas,r9a09g057h44", "renesas,r9a09g057";
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aliases {
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serial0 = &scif;
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};
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chosen {
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bootargs = "ignore_loglevel";
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stdout-path = "serial0:115200n8";
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};
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memory@48000000 {
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device_type = "memory";
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/* first 128MB is reserved for secure area. */
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reg = <0x0 0x48000000 0x1 0xF8000000>;
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};
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memory@240000000 {
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device_type = "memory";
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reg = <0x2 0x40000000 0x2 0x00000000>;
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};
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};
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&audio_extal_clk {
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clock-frequency = <22579200>;
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};
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&pinctrl {
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scif_pins: scif {
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pins = "SCIF_TXD", "SCIF_RXD";
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renesas,output-impedance = <1>;
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};
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};
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&qextal_clk {
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clock-frequency = <24000000>;
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};
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&rtxin_clk {
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clock-frequency = <32768>;
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};
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&scif {
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pinctrl-0 = <&scif_pins>;
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pinctrl-names = "default";
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status = "okay";
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};
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