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arm64: dts: renesas: r8a779g0: Add family fallback for VIN IP

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To make it easier to support new R-Car Gen4 SoCs a family fallback
compatible similar to what is used for R-Car Gen2 has been added to the
VIN bindings.  Add this fallback to the R-Car V4H DTSI.

There is no functional change, but the addition of the family fallback
in the bindings produces warnings for R-Car V4H for DTS checks if they
are not added.

Signed-off-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Link: https://lore.kernel.org/20240704161620.1425409-3-niklas.soderlund+renesas@ragnatech.se
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
This commit is contained in:
Niklas Söderlund
2024-07-04 18:16:16 +02:00
committed by Geert Uytterhoeven
parent 686bba2a17
commit 8c07e11916
1 changed files with 32 additions and 16 deletions
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48
arch/arm64/boot/dts/renesas/r8a779g0.dtsi
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@@ -1335,7 +1335,8 @@ msiof5: spi@e6c28000 {
};
vin00: video@e6ef0000 {
compatible = "renesas,vin-r8a779g0";
compatible = "renesas,vin-r8a779g0",
"renesas,rcar-gen4-vin";
reg = <0 0xe6ef0000 0 0x1000>;
interrupts = <GIC_SPI 529 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 730>;
@@ -1363,7 +1364,8 @@ vin00isp0: endpoint@0 {
};
vin01: video@e6ef1000 {
compatible = "renesas,vin-r8a779g0";
compatible = "renesas,vin-r8a779g0",
"renesas,rcar-gen4-vin";
reg = <0 0xe6ef1000 0 0x1000>;
interrupts = <GIC_SPI 530 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 731>;
@@ -1391,7 +1393,8 @@ vin01isp0: endpoint@0 {
};
vin02: video@e6ef2000 {
compatible = "renesas,vin-r8a779g0";
compatible = "renesas,vin-r8a779g0",
"renesas,rcar-gen4-vin";
reg = <0 0xe6ef2000 0 0x1000>;
interrupts = <GIC_SPI 531 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 800>;
@@ -1419,7 +1422,8 @@ vin02isp0: endpoint@0 {
};
vin03: video@e6ef3000 {
compatible = "renesas,vin-r8a779g0";
compatible = "renesas,vin-r8a779g0",
"renesas,rcar-gen4-vin";
reg = <0 0xe6ef3000 0 0x1000>;
interrupts = <GIC_SPI 532 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 801>;
@@ -1447,7 +1451,8 @@ vin03isp0: endpoint@0 {
};
vin04: video@e6ef4000 {
compatible = "renesas,vin-r8a779g0";
compatible = "renesas,vin-r8a779g0",
"renesas,rcar-gen4-vin";
reg = <0 0xe6ef4000 0 0x1000>;
interrupts = <GIC_SPI 533 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 802>;
@@ -1475,7 +1480,8 @@ vin04isp0: endpoint@0 {
};
vin05: video@e6ef5000 {
compatible = "renesas,vin-r8a779g0";
compatible = "renesas,vin-r8a779g0",
"renesas,rcar-gen4-vin";
reg = <0 0xe6ef5000 0 0x1000>;
interrupts = <GIC_SPI 534 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 803>;
@@ -1503,7 +1509,8 @@ vin05isp0: endpoint@0 {
};
vin06: video@e6ef6000 {
compatible = "renesas,vin-r8a779g0";
compatible = "renesas,vin-r8a779g0",
"renesas,rcar-gen4-vin";
reg = <0 0xe6ef6000 0 0x1000>;
interrupts = <GIC_SPI 535 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 804>;
@@ -1531,7 +1538,8 @@ vin06isp0: endpoint@0 {
};
vin07: video@e6ef7000 {
compatible = "renesas,vin-r8a779g0";
compatible = "renesas,vin-r8a779g0",
"renesas,rcar-gen4-vin";
reg = <0 0xe6ef7000 0 0x1000>;
interrupts = <GIC_SPI 536 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 805>;
@@ -1559,7 +1567,8 @@ vin07isp0: endpoint@0 {
};
vin08: video@e6ef8000 {
compatible = "renesas,vin-r8a779g0";
compatible = "renesas,vin-r8a779g0",
"renesas,rcar-gen4-vin";
reg = <0 0xe6ef8000 0 0x1000>;
interrupts = <GIC_SPI 537 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 806>;
@@ -1587,7 +1596,8 @@ vin08isp1: endpoint@1 {
};
vin09: video@e6ef9000 {
compatible = "renesas,vin-r8a779g0";
compatible = "renesas,vin-r8a779g0",
"renesas,rcar-gen4-vin";
reg = <0 0xe6ef9000 0 0x1000>;
interrupts = <GIC_SPI 538 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 807>;
@@ -1615,7 +1625,8 @@ vin09isp1: endpoint@1 {
};
vin10: video@e6efa000 {
compatible = "renesas,vin-r8a779g0";
compatible = "renesas,vin-r8a779g0",
"renesas,rcar-gen4-vin";
reg = <0 0xe6efa000 0 0x1000>;
interrupts = <GIC_SPI 539 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 808>;
@@ -1643,7 +1654,8 @@ vin10isp1: endpoint@1 {
};
vin11: video@e6efb000 {
compatible = "renesas,vin-r8a779g0";
compatible = "renesas,vin-r8a779g0",
"renesas,rcar-gen4-vin";
reg = <0 0xe6efb000 0 0x1000>;
interrupts = <GIC_SPI 540 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 809>;
@@ -1671,7 +1683,8 @@ vin11isp1: endpoint@1 {
};
vin12: video@e6efc000 {
compatible = "renesas,vin-r8a779g0";
compatible = "renesas,vin-r8a779g0",
"renesas,rcar-gen4-vin";
reg = <0 0xe6efc000 0 0x1000>;
interrupts = <GIC_SPI 541 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 810>;
@@ -1699,7 +1712,8 @@ vin12isp1: endpoint@1 {
};
vin13: video@e6efd000 {
compatible = "renesas,vin-r8a779g0";
compatible = "renesas,vin-r8a779g0",
"renesas,rcar-gen4-vin";
reg = <0 0xe6efd000 0 0x1000>;
interrupts = <GIC_SPI 542 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 811>;
@@ -1727,7 +1741,8 @@ vin13isp1: endpoint@1 {
};
vin14: video@e6efe000 {
compatible = "renesas,vin-r8a779g0";
compatible = "renesas,vin-r8a779g0",
"renesas,rcar-gen4-vin";
reg = <0 0xe6efe000 0 0x1000>;
interrupts = <GIC_SPI 543 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 812>;
@@ -1755,7 +1770,8 @@ vin14isp1: endpoint@1 {
};
vin15: video@e6eff000 {
compatible = "renesas,vin-r8a779g0";
compatible = "renesas,vin-r8a779g0",
"renesas,rcar-gen4-vin";
reg = <0 0xe6eff000 0 0x1000>;
interrupts = <GIC_SPI 544 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 813>;