Renesas ARM DT updates for v5.10 (take two)
- PCIe endpoint support for the RZ/G2H SoC,
- SATA support for the HopeRun HiHope RZ/G2H board,
- Increase support (CAN, LED, SPI NOR, VIN, VSP) for the RZ/G1H SoC on
the iWave Qseven board (G21D), and its camera add-on board,
- Initial support for the R-Car V3U SoC on the Falcon CPU and BreakOut
boards,
- HDMI display and sound support for the R-Car M3-W+ SoC on the
Salvator-XS board,
- Digital Radio Interface (DRIF) support for the R-Car E3 SoC,
- Minor fixes and cleanups.
* tag 'renesas-arm-dt-for-v5.10-tag2' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel: (24 commits)
arm64: dts: renesas: r8a774c0: Fix MSIOF1 DMA channels
arm64: dts: renesas: r8a77990: Fix MSIOF1 DMA channels
arm64: dts: renesas: r8a77990: Add DRIF support
ARM: dts: r8a7742-iwg21d-q7-dbcm-ca: Add can0 support to camera DB
ARM: dts: r8a7742: Add VSP support
arm64: dts: renesas: Drop superfluous pin configuration containers
arm64: dts: renesas: r8a77961: salvator-xs: Add HDMI Sound support
arm64: dts: renesas: r8a77961: salvator-xs: Add HDMI Display support
arm64: dts: renesas: r8a77961: Add HDMI device nodes
arm64: dts: renesas: r8a77961: Add DU device nodes
arm64: dts: renesas: r8a77961: Add VSP device nodes
arm64: dts: renesas: r8a77961: Add FCP device nodes
arm64: dts: renesas: Fix pin controller node names
ARM: dts: renesas: Fix pin controller node names
arm64: dts: renesas: Add Renesas Falcon boards support
arm64: dts: renesas: Add Renesas R8A779A0 SoC support
ARM: dts: r8a7742-iwg21d-q7: Enable SD2 LED indication
ARM: dts: r8a7742-iwg21d-q7: Add can1 support to carrier board
ARM: dts: r8a7742-iwg21d-q7: Add SPI NOR support
ARM: dts: r8a7742: Add VIN DT nodes
...
Link: https://lore.kernel.org/r/20200918124800.15555-2-geert+renesas@glider.be
Signed-off-by: Olof Johansson <olof@lixom.net>
The Synopsys DesignWare APB GPIO controller port must have gpio-cells
property, as pointed by dtschema:
arch/arm64/boot/dts/apm/apm-mustang.dt.yaml: gpio@1c024000: gpio-controller@0: '#gpio-cells' is a required property
Link: https://lore.kernel.org/r/20200917165040.22908-2-krzk@kernel.org
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Signed-off-by: Olof Johansson <olof@lixom.net>
The Synopsys DesignWare APB GPIO controller driver does not parse
reg-io-width and dtschema does not allow it so drop it to fix dtschema
warnings like:
arch/arm64/boot/dts/apm/apm-mustang.dt.yaml: gpio@1c024000:
'reg-io-width' does not match any of the regexes: '^gpio-(port|controller)@[0-9a-f]+$', 'pinctrl-[0-9]+'
Link: https://lore.kernel.org/r/20200917165040.22908-1-krzk@kernel.org
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Signed-off-by: Olof Johansson <olof@lixom.net>
The Synopsys DesignWare APB GPIO controller driver does not parse
reg-io-width and dtschema does not allow it so drop it to fix dtschema
warnings like:
arch/arm/boot/dts/picoxcell-pc7302-pc3x2.dt.yaml: gpio@20000:
'reg-io-width' does not match any of the regexes: '^gpio-(port|controller)@[0-9a-f]+$', 'pinctrl-[0-9]+'
Link: https://lore.kernel.org/r/20200917164909.22490-1-krzk@kernel.org
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Acked-by: Jamie Iles <jamie@jamieiles.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
SoCFPGA DTS updates for v5.10
- Increase shared-dma-pool size to 32MB
- Add ptp_ref clock properties to the ethernet nodes on Stratix10 and Agilex
* tag 'socfpga_dts_update_for_v5.10' of git://git.kernel.org/pub/scm/linux/kernel/git/dinguyen/linux:
arm64: dts: stratix10/agilex: add the ptp_ref clock
arm64: dts: agilex: increase shared memory size to 32Mb
Link: https://lore.kernel.org/r/20200916204422.30897-1-dinguyen@kernel.org
Signed-off-by: Olof Johansson <olof@lixom.net>
Ux500 DTS updates for the v5.10 kernel cycle:
- Add the s6e63m0 display to the Golden device
- Add the KTD253 backlight to the Skomer device
- Update the LP5521 LED DTS entries for binding changes
* tag 'ux500-dts-for-v5.10' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-stericsson:
ARM: dts: ste-href: Add reg property to the LP5521 channel nodes
ARM: dts: ux500-skomer: Add KTD253 backlight
ARM: dts: ux500-golden: Add S6E63M0 DSI display
Link: https://lore.kernel.org/r/CACRpkda=-cgFjN7K2vBU5x4uSYrohrZSbjqMnSFb3Qe2Az1W5g@mail.gmail.com
Signed-off-by: Olof Johansson <olof@lixom.net>
Sparx5 DT updates for Linux 5.10
- Add public repo to MAINTAINERS
- Add SPI controller and devices
- Add eMMC controller and devices
- Add temperature sensor
* tag 'sparx5-dt-5.10' of https://github.com/microchip-ung/linux-upstream:
arm64: dts: sparx5: Add spi-nand devices
arm64: dts: sparx5: Add spi-nor support
arm64: dts: sparx5: Add SPI controller and associated mmio-mux
MAINTAINERS: Add git tree for Sparx5
arm64: dts: sparx5: Add hwmon temperature sensor
arm64: dts: sparx5: Add Sparx5 eMMC support
Link: https://lore.kernel.org/r/878sda2dj0.fsf@microchip.com
Signed-off-by: Olof Johansson <olof@lixom.net>
ARM: DT: Hisilicon ARM32 SoCs DT updates for 5.10
- Update the SP804 nodes to have the correct clocks and
clock names for the hi3620 SoC
- Update the SP805 nodes to have the correct clocks and
clock names for the hix5hd2 SoC
* tag 'hisi-arm32-dt-for-5.10' of git://github.com/hisilicon/linux-hisi:
ARM: dts: hisilicon: Fix SP805 clocks
ARM: dts: hisilicon: Fix SP804 users
Link: https://lore.kernel.org/r/5F617209.90003@hisilicon.com
Signed-off-by: Olof Johansson <olof@lixom.net>
ARM64: DT: Hisilicon ARM64 SoCs DT updates for 5.10
- Change the status properties from "ok" to "okay" for
all the hisilicon SoCs
- Update the SP805 nodes to have the correct clocks and
clock names for the hi3660 and hi6220 SoCs
* tag 'hisi-arm64-dt-for-5.10' of git://github.com/hisilicon/linux-hisi:
arm64: dts: hisilicon: Fix SP805 clocks
arm64: dts: hisilicon: replace status value "ok" by "okay"
Link: https://lore.kernel.org/r/5F617134.3050705@hisilicon.com
Signed-off-by: Olof Johansson <olof@lixom.net>
Add the DRIF controller nodes for the r8a77990 (a.k.a. R-Car E3).
Please note that R-Car E3 has register BITCTR located at offset
0x80 (this register is not available on the r8a77960 and r8a77951,
whose support has already been upstreamed), and even though it is
not dealt with just yet within the driver, we have to keep that
into account with our device tree nodes.
Also, please note that while testing it has emerged that the
HW User Manual has the wrong DMA details for DRIF2 and DRIF3
on E3, as they are only allowed SYS-DMAC0 rather than SYS-DMAC1
and SYS-DMAC2. An errata addressing this issue will be available
soon.
Signed-off-by: Fabrizio Castro <fabrizio.castro.jz@renesas.com>
Reviewed-by: Chris Paterson <chris.paterson2@renesas.com>
Link: https://lore.kernel.org/r/20200911121259.5669-1-fabrizio.castro.jz@renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
The SP805 DT binding requires two clocks to be specified, but
Hisilicon platform DTs currently only specify one clock.
In practice, Linux would pick a clock named "apb_pclk" for the bus
clock, and the Linux and U-Boot SP805 driver would use the first clock
to derive the actual watchdog counter frequency.
Since currently both are the very same clock, we can just double the
clock reference, and add the correct clock-names, to match the binding.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
The SP804 binding only specifies one or three clocks, but does not allow
just two clocks.
The HiSi 3620 .dtsi specified two clocks for the two timers, plus gave
one "apb_pclk" clock-name to appease the primecell bus driver.
Extend the clocks by duplicating the first clock to the end of the clock
list, and add two dummy clock-names to make the primecell driver happy.
I don't know what the real APB clock for the IP is, but with the current
DT the first timer clock was used for that, so this change keeps the
current status.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
The SP805 DT binding requires two clocks to be specified, but
Hisilicon platform DTs currently only specify one clock.
In practice, Linux would pick a clock named "apb_pclk" for the bus
clock, and the Linux and U-Boot SP805 driver would use the first clock
to derive the actual watchdog counter frequency.
Since currently both are the very same clock, we can just double the
clock reference, and add the correct clock-names, to match the binding.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
While the DT parser recognizes "ok" as a valid value for the
"status" property, it is actually mentioned nowhere. Use the
proper value "okay" instead, as done in the majority of files
already.
Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
This pull request contains Broadcom ARM64-based SoCs changes for 5.10,
please pull the following:
- Adrian changes the status properties from "ok" to "okay"
- Andre fixes the SP805 watchdog nodes to have the correct clock names
and binding for the Northstar 2 platform
* tag 'arm-soc/for-5.10/devicetree-arm64' of https://github.com/Broadcom/stblinux:
arm64: dts: broadcom: Fix SP805 clock-names
arm64: dts: broadcom: replace status value "ok" by "okay"
Link: https://lore.kernel.org/r/20200912032153.1216354-2-f.fainelli@gmail.com
Signed-off-by: Olof Johansson <olof@lixom.net>
This pull request contains Broadcom ARM-based SoCs changes for 5.10,
please pull the following:
- Christian adds support for the Cisco Meraki MR32 which is based on the
BCM53016 SoC, this requires specifying the PWM, second UART and third
PCIe controller in Device Tree before finally adding support for the
board.
- Adrian updates the status properties from "ok" to "okay".
- Andre fixes the SP805 watchdog nodes to have the correct clock names
and binding for both the Cygnus and Northstar Plus (NSP). He does the
same thing with the SP804 timer node which was missing an
"arm,primecell" compatible string.
- Maxime enables the BCM2711 (Raspberry Pi 4) display pipeline since all
DRM changes are ready.
* tag 'arm-soc/for-5.10/devicetree' of https://github.com/Broadcom/stblinux:
ARM: dts: broadcom: Fix SP804 node
ARM: dts: NSP: Fix SP805 clock-names
ARM: dts: Cygnus: Fix SP805 clocks
ARM: dts: NSP: replace status value "ok" by "okay"
ARM: BCM5301X: Add DT for Meraki MR32
ARM: dts: bcm2711: Enable the display pipeline
ARM: dts: BCM5301X: Specify pcie2 in the DT
ARM: dts: BCM5301X: Specify uart2 in the DT
ARM: dts: BCM5301X: Specify PWM in the DT
dt-bindings: ARM: add bindings for the Meraki MR32
Link: https://lore.kernel.org/r/20200912032153.1216354-1-f.fainelli@gmail.com
Signed-off-by: Olof Johansson <olof@lixom.net>
ASPEED device tree updates for 5.10
- New machines
* Wistron Mowgli, an AST2500 BMC for a Power9 OpenPower server
* Facebook Wedge400, an AST2500 BMC system which we can assume is 4
times better than the existing Wedge100 top of rack network switch
- Add a new device, the IBM Operation Panel
- Fixes for Facebook's collection of BMCs
- eMMC and vuart fixes
* tag 'aspeed-5.10-devicetree' of git://git.kernel.org/pub/scm/linux/kernel/git/joel/aspeed:
ARM: dts: aspeed: Add Mowgli BMC platform
ARM: dts: rainier: Disable internal pull-downs on eMMC pins
ARM: aspeed: g5: Do not set sirq polarity
ARM: dts: aspeed: rainier: Add IBM Operation Panel I2C device
ARM: dts: aspeed: tacoma: Add IBM Operation Panel I2C device
ARM: dts: aspeed: rainier: Enable XDMA engine
ARM: dts: aspeed: wedge40: Update UART4 pin settings
ARM: dts: aspeed: wedge40: Update FMC flash0 label
ARM: dts: aspeed: Add Facebook Wedge400 BMC
ARM: dts: aspeed: minipack: Update 64MB FMC flash layout
ARM: dts: aspeed: yamp: Set 32MB FMC flash layout
ARM: dts: aspeed: cmm: Set 32MB FMC flash layout
ARM: dts: aspeed: Remove flash layout from Facebook AST2500 Common dtsi
Link: https://lore.kernel.org/r/CACPK8XcDNBYAHzW6NYB4LFm3YbN63AprgW75ZqS+6uXn2b3kug@mail.gmail.com
Signed-off-by: Olof Johansson <olof@lixom.net>
ARMv8 Juno/Vexpress/Fast Models updates for v5.10
A few device tree source fixes to make them fully SP804 timer and
SP805 watchdog binding compliant.
* tag 'juno-updates-5.10' of git://git.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux:
arm64: dts: arm: Fix SP805 clock-names
ARM: dts: arm: Fix SP805 clocks
ARM: dts: arm: Fix SP804 users
Link: https://lore.kernel.org/r/20200908135028.GA10106@bogus
Signed-off-by: Olof Johansson <olof@lixom.net>
Samsung DTS ARM64 changes for v5.10
Cleanup of Exynos DTS to fix as many dtschema warnings as possible.
This includes adding missing compatibles and using non-deprecated
properties. Changes should not have a visible impact.
* tag 'samsung-dt64-5.10' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux:
arm64: dts: exynos: Add compatibles to sysreg nodes
arm64: dts: exynos: Replace deprecated "gpios" i2c-gpio property in Exynos5433
Link: https://lore.kernel.org/r/20200907150425.11077-2-krzk@kernel.org
Signed-off-by: Olof Johansson <olof@lixom.net>
Samsung DTS ARM changes for v5.10
1. Add sound support to Galaxy S3/Midas family (Exynos4412).
2. Add sound support to Galaxy S/Aries family (S5Pv210).
3. Configure L2C-310 cache controller via DTS on Exynos4.
4. Big cleanup of Exynos DTS to fix as many dtschema warnings as
possible. This includes adding missing properties (thus e.g.
enabling S3C RTC clock), correcting existing nodes, renaming of
nodes and using non-deprecated properties or compatibles. Except
mentioned bring up of S3C RTC, this should not have visible
effect.
* tag 'samsung-dt-5.10' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux: (49 commits)
ARM: dts: exynos: Silence SATA PHY warning in Exynos5250
ARM: dts: exynos: Remove I2C9 samsung, i2c-slave-addr from Exynos5250 boards
ARM: dts: samsung: odroid-xu3: Move assigned-clock* properties to i2s0 node
ARM: dts: exynos: Use S2MPS11 clock in S3C RTC in SMDK5420
ARM: dts: exynos: Silence DP HPD pinctrl dtschema warning in Exynos5250 Spring
ARM: dts: exynos: Use S5M8767 clock in S3C RTC in Exynos5250 Spring
ARM: dts: exynos: Add max77686 clocks for S3C RTC in SMDK5250
ARM: dts: exynos: Override thermal by label in Exynos5250
ARM: dts: exynos: Correct whitespace and indentation issues in Exynos5
ARM: dts: exynos: Silence i2c-gpio dtschema warning in Exynos5250 Arndale
ARM: dts: exynos: Correct S3C RTC bindings in SMDK5410
ARM: dts: exynos: Remove unneeded address/size cells in Exynos5260 GIC
ARM: dts: exynos: Correct compatible for Exynos5260 GIC
ARM: dts: exynos: Correct compatible for Exynos5 GIC
ARM: dts: s5pv210: Enable audio on Aries boards
ARM: dts: exynos: Correct whitespace and indentation issues
ARM: dts: exynos: Correct S3C RTC bindings in Tiny4412
ARM: dts: exynos: Correct S3C RTC bindings in SMDK4412
ARM: dts: exynos: Add CPU cooling in Tiny4412
ARM: dts: exynos: Add CPU cooling in SMDK4412
...
Link: https://lore.kernel.org/r/20200907150425.11077-1-krzk@kernel.org
Signed-off-by: Olof Johansson <olof@lixom.net>
Devicetree changes for omaps for v5.10
- Use a known good SGX clockrate for 4430, this is not needed as a fix
as the closed source SGX driver is out of tree
- Prepare DSI panels for upcoming changes to use generic driver code
- Add common support for MOXA UC-8100 series
- Add ocp label for l3 interconnect for board specific dts files to
reference
- Configure CPU thermal properties for omap3
* tag 'omap-for-v5.10/dt-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
ARM: dts: omap3: Add cpu trips and cooling map for omap34/36 families
ARM: dts: am33xx: add ocp label
ARM: dts: am335x: add common dtsi for MOXA UC-8100 series
ARM: dts: omap4-droid4: add panel orientation
ARM: dts: omap4-droid4: add panel compatible
ARM: dts: omap: add channel to DSI panels
ARM: dts: omap4: Fix sgx clock rate for 4430
ARM: dts: omap5: Fix DSI base address and clocks
ARM: dts: logicpd-som-lv-baseboard: Fix missing video
ARM: dts: logicpd-som-lv-baseboard: Fix broken audio
ARM: dts: logicpd-torpedo-baseboard: Fix broken audio
ARM: OMAP2+: Fix an IS_ERR() vs NULL check in _get_pwrdm()
Link: https://lore.kernel.org/r/pull-1599132307-761202@atomide.com-3
Signed-off-by: Olof Johansson <olof@lixom.net>
Fix dtschema validator warnings like:
gic@fb001000: $nodename:0:
'gic@fb001000' does not match '^interrupt-controller(@[0-9a-f,]+)*$'
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Fix dtschema validator warnings like:
l2-cache-controller@c00000: $nodename:0:
'l2-cache-controller@c00000' does not match '^(cache-controller|cpu)(@[0-9a-f,]+)*$'
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Reviewed-by: Jun Nie <jun.nie@linaro.org>
Fix dtschema validator warnings like:
l2-cache-controller@20100000: $nodename:0:
'l2-cache-controller@20100000' does not match '^(cache-controller|cpu)(@[0-9a-f,]+)*$'
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Acked-by: Mans Rullgard <mans@mansr.com>
Fix dtschema validator warnings like:
l2-cache: $nodename:0: 'l2-cache' does not match '^(cache-controller|cpu)(@[0-9a-f,]+)*$'
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
Fix dtschema validator warnings like:
l2-cache@2040000: $nodename:0:
'l2-cache@2040000' does not match '^(cache-controller|cpu)(@[0-9a-f,]+)*$'
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Fix dtschema validator warnings like:
l2-cache-controller@80040000: $nodename:0:
'l2-cache-controller@80040000' does not match '^(cache-controller|cpu)(@[0-9a-f,]+)*$'
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Acked-by: Barry Song <baohua@kernel.org>
Node unit address should be the same as first address appearing in "reg"
property. Fixes DTC warning:
arch/arm64/boot/dts/al/alpine-v2.dtsi:116.38-126.5:
Warning (simple_bus_reg): /soc/interrupt-controller@f0100000: simple-bus unit address format error, expected "f0200000"
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Fix dtschema validator warnings like:
gic@f0100000: $nodename:0:
'gic@f0100000' does not match '^interrupt-controller(@[0-9a-f,]+)*$'
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
