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Merge tag 'juno-updates-5.10' of git://git.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux into arm/dt

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ARMv8 Juno/Vexpress/Fast Models updates for v5.10

A few device tree source fixes to make them fully SP804 timer and
SP805 watchdog binding compliant.

* tag 'juno-updates-5.10' of git://git.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux:
  arm64: dts: arm: Fix SP805 clock-names
  ARM: dts: arm: Fix SP805 clocks
  ARM: dts: arm: Fix SP804 users

Link: https://lore.kernel.org/r/20200908135028.GA10106@bogus
Signed-off-by: Olof Johansson <olof@lixom.net>
This commit is contained in:
Olof Johansson
2020-09-13 11:27:04 -07:00
parent 0630fe41e9 b83ded8a31
commit 34cfebc0d8
11 changed files with 29 additions and 27 deletions
Download Patch File Download Diff File Expand all files Collapse all files

2
arch/arm/boot/dts/arm-realview-eb.dtsi
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@@ -390,7 +390,7 @@ wdog: watchdog@10010000 {
compatible = "arm,sp805", "arm,primecell";
reg = <0x10010000 0x1000>;
clocks = <&wdogclk>, <&pclk>;
clock-names = "wdogclk", "apb_pclk";
clock-names = "wdog_clk", "apb_pclk";
status = "disabled";
};

20
arch/arm/boot/dts/arm-realview-pb11mp.dts
View File

@@ -546,7 +546,7 @@ watchdog@1000f000 {
interrupt-parent = <&intc_pb11mp>;
interrupts = <0 0 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&wdogclk>, <&pclk>;
clock-names = "wdogclk", "apb_pclk";
clock-names = "wdog_clk", "apb_pclk";
status = "disabled";
};
@@ -556,7 +556,7 @@ watchdog@10010000 {
interrupt-parent = <&intc_pb11mp>;
interrupts = <0 0 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&wdogclk>, <&pclk>;
clock-names = "wdogclk", "apb_pclk";
clock-names = "wdog_clk", "apb_pclk";
};
timer01: timer@10011000 {
@@ -568,8 +568,8 @@ timer01: timer@10011000 {
clocks = <&sp810_syscon 0>,
<&sp810_syscon 1>,
<&pclk>;
clock-names = "timerclk0",
"timerclk1",
clock-names = "timer0clk",
"timer1clk",
"apb_pclk";
};
@@ -582,8 +582,8 @@ timer23: timer@10012000 {
clocks = <&sp810_syscon 2>,
<&sp810_syscon 3>,
<&pclk>;
clock-names = "timerclk2",
"timerclk3",
clock-names = "timer0clk",
"timer1clk",
"apb_pclk";
};
@@ -645,16 +645,16 @@ rtc: rtc@10017000 {
timer45: timer@10018000 {
compatible = "arm,sp804", "arm,primecell";
reg = <0x10018000 0x1000>;
clocks = <&timclk>, <&pclk>;
clock-names = "timer", "apb_pclk";
clocks = <&timclk>, <&timclk>, <&pclk>;
clock-names = "timer0clk", "timer1clk", "apb_pclk";
status = "disabled";
};
timer67: timer@10019000 {
compatible = "arm,sp804", "arm,primecell";
reg = <0x10019000 0x1000>;
clocks = <&timclk>, <&pclk>;
clock-names = "timer", "apb_pclk";
clocks = <&timclk>, <&timclk>, <&pclk>;
clock-names = "timer0clk", "timer1clk", "apb_pclk";
status = "disabled";
};

4
arch/arm/boot/dts/arm-realview-pbx.dtsi
View File

@@ -381,7 +381,7 @@ wdog0: watchdog@1000f000 {
compatible = "arm,sp805", "arm,primecell";
reg = <0x1000f000 0x1000>;
clocks = <&wdogclk>, <&pclk>;
clock-names = "wdogclk", "apb_pclk";
clock-names = "wdog_clk", "apb_pclk";
status = "disabled";
};
@@ -389,7 +389,7 @@ wdog1: watchdog@10010000 {
compatible = "arm,sp805", "arm,primecell";
reg = <0x10010000 0x1000>;
clocks = <&wdogclk>, <&pclk>;
clock-names = "wdogclk", "apb_pclk";
clock-names = "wdog_clk", "apb_pclk";
status = "disabled";
};

10
arch/arm/boot/dts/mps2.dtsi
View File

@@ -161,9 +161,11 @@ timer1: mps2-timer1@1000 {
};
timer2: dual-timer@2000 {
compatible = "arm,sp804";
compatible = "arm,sp804", "arm,primecell";
reg = <0x2000 0x1000>;
clocks = <&sysclk>;
clocks = <&sysclk>, <&sysclk>, <&sysclk>;
clock-names = "timer0clk", "timer1clk",
"apb_pclk";
interrupts = <10>;
status = "disabled";
};
@@ -197,8 +199,8 @@ wdt: watchdog@8000 {
arm,primecell-periphid = <0x00141805>;
reg = <0x8000 0x1000>;
interrupts = <0>;
clocks = <&sysclk>;
clock-names = "apb_pclk";
clocks = <&sysclk>, <&sysclk>;
clock-names = "wdog_clk", "apb_pclk";
status = "disabled";
};
};

2
arch/arm/boot/dts/vexpress-v2m-rs1.dtsi
View File

@@ -280,7 +280,7 @@ wdt@f0000 {
reg = <0x0f0000 0x1000>;
interrupts = <0>;
clocks = <&v2m_refclk32khz>, <&smbclk>;
clock-names = "wdogclk", "apb_pclk";
clock-names = "wdog_clk", "apb_pclk";
};
v2m_timer01: timer@110000 {

2
arch/arm/boot/dts/vexpress-v2m.dtsi
View File

@@ -198,7 +198,7 @@ wdt@f000 {
reg = <0x0f000 0x1000>;
interrupts = <0>;
clocks = <&v2m_refclk32khz>, <&smbclk>;
clock-names = "wdogclk", "apb_pclk";
clock-names = "wdog_clk", "apb_pclk";
};
v2m_timer01: timer@11000 {

4
arch/arm/boot/dts/vexpress-v2p-ca15-tc1.dts
View File

@@ -87,8 +87,8 @@ wdt@2b060000 {
status = "disabled";
reg = <0 0x2b060000 0 0x1000>;
interrupts = <0 98 4>;
clocks = <&sys_pll>;
clock-names = "apb_pclk";
clocks = <&sys_pll>, <&sys_pll>;
clock-names = "wdog_clk", "apb_pclk";
};
gic: interrupt-controller@2c001000 {

2
arch/arm/boot/dts/vexpress-v2p-ca15_a7.dts
View File

@@ -128,7 +128,7 @@ wdt@2a490000 {
reg = <0 0x2a490000 0 0x1000>;
interrupts = <0 98 4>;
clocks = <&oscclk6a>, <&oscclk6a>;
clock-names = "wdogclk", "apb_pclk";
clock-names = "wdog_clk", "apb_pclk";
};
hdlcd@2b000000 {

6
arch/arm/boot/dts/vexpress-v2p-ca9.dts
View File

@@ -122,8 +122,8 @@ timer@100e4000 {
reg = <0x100e4000 0x1000>;
interrupts = <0 48 4>,
<0 49 4>;
clocks = <&oscclk2>, <&oscclk2>;
clock-names = "timclk", "apb_pclk";
clocks = <&oscclk2>, <&oscclk2>, <&oscclk2>;
clock-names = "timer0clk", "timer1clk", "apb_pclk";
status = "disabled";
};
@@ -132,7 +132,7 @@ watchdog@100e5000 {
reg = <0x100e5000 0x1000>;
interrupts = <0 51 4>;
clocks = <&oscclk2>, <&oscclk2>;
clock-names = "wdogclk", "apb_pclk";
clock-names = "wdog_clk", "apb_pclk";
};
scu@1e000000 {

2
arch/arm64/boot/dts/arm/juno-motherboard.dtsi
View File

@@ -251,7 +251,7 @@ wdt@f0000 {
reg = <0x0f0000 0x10000>;
interrupts = <7>;
clocks = <&mb_clk24mhz>, <&soc_smc50mhz>;
clock-names = "wdogclk", "apb_pclk";
clock-names = "wdog_clk", "apb_pclk";
};
v2m_timer01: timer@110000 {

2
arch/arm64/boot/dts/arm/rtsm_ve-motherboard.dtsi
View File

@@ -195,7 +195,7 @@ wdt@f0000 {
reg = <0x0f0000 0x1000>;
interrupts = <0>;
clocks = <&v2m_refclk32khz>, <&v2m_clk24mhz>;
clock-names = "wdogclk", "apb_pclk";
clock-names = "wdog_clk", "apb_pclk";
};
v2m_timer01: timer@110000 {