arm64: dts: hisilicon: Fix SP805 clocks

The SP805 DT binding requires two clocks to be specified, but
Hisilicon platform DTs currently only specify one clock.

In practice, Linux would pick a clock named "apb_pclk" for the bus
clock, and the Linux and U-Boot SP805 driver would use the first clock
to derive the actual watchdog counter frequency.

Since currently both are the very same clock, we can just double the
clock reference, and add the correct clock-names, to match the binding.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
This commit is contained in:
Andre Przywara
2020-09-07 13:18:29 +01:00
committed by Wei Xu
parent 64ea21e017
commit a665b2c1d2
2 changed files with 9 additions and 6 deletions

View File

@@ -1089,16 +1089,18 @@ watchdog0: watchdog@e8a06000 {
compatible = "arm,sp805-wdt", "arm,primecell";
reg = <0x0 0xe8a06000 0x0 0x1000>;
interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&crg_ctrl HI3660_OSC32K>;
clock-names = "apb_pclk";
clocks = <&crg_ctrl HI3660_OSC32K>,
<&crg_ctrl HI3660_OSC32K>;
clock-names = "wdog_clk", "apb_pclk";
};
watchdog1: watchdog@e8a07000 {
compatible = "arm,sp805-wdt", "arm,primecell";
reg = <0x0 0xe8a07000 0x0 0x1000>;
interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&crg_ctrl HI3660_OSC32K>;
clock-names = "apb_pclk";
clocks = <&crg_ctrl HI3660_OSC32K>,
<&crg_ctrl HI3660_OSC32K>;
clock-names = "wdog_clk", "apb_pclk";
};
tsensor: tsensor@fff30000 {

View File

@@ -843,8 +843,9 @@ watchdog0: watchdog@f8005000 {
compatible = "arm,sp805-wdt", "arm,primecell";
reg = <0x0 0xf8005000 0x0 0x1000>;
interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&ao_ctrl HI6220_WDT0_PCLK>;
clock-names = "apb_pclk";
clocks = <&ao_ctrl HI6220_WDT0_PCLK>,
<&ao_ctrl HI6220_WDT0_PCLK>;
clock-names = "wdog_clk", "apb_pclk";
};
tsensor: tsensor@0,f7030700 {