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Author SHA1 Message Date
Nitheesh Sekar
18a5bf00a0 arm64: dts: qcom: ipq5018: Add PCIe related nodes 
Add phy and controller nodes for a 2-lane Gen2 and
a 1-lane Gen2 PCIe bus. IPQ5018 has 8 MSI SPI interrupts and
one global interrupt.

NOTE: the PCIe controller supports gen3, yet the phy is limited to gen2.

Signed-off-by: Nitheesh Sekar <quic_nsekar@quicinc.com>
Signed-off-by: Sricharan R <quic_srichara@quicinc.com>
Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Signed-off-by: George Moussalem <george.moussalem@outlook.com>
Link: https://lore.kernel.org/r/20250514-ipq5018-pcie-v10-1-5b42a8eff7ea@outlook.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
 2025-05-14 20:49:04 +01:00
Alok Tiwari
295217420a arm64: dts: qcom: sm8350: Fix typo in pil_camera_mem node 
There is a typo in sm8350.dts where the node label
mmeory@85200000 should be memory@85200000.
This patch corrects the typo for clarity and consistency.

Fixes: b7e8f433a6 ("arm64: dts: qcom: Add basic devicetree support for SM8350 SoC")
Cc: stable@vger.kernel.org
Signed-off-by: Alok Tiwari <alok.a.tiwari@oracle.com>
Link: https://lore.kernel.org/r/20250514114656.2307828-1-alok.a.tiwari@oracle.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
 2025-05-14 20:22:12 +01:00
Konrad Dybcio
781621de15 arm64: dts: qcom: x1e80100-romulus: Enable DP over Type-C 
Both ports seem to work, just like on other X1E laptops.

Tested with a Type-C-to-HDMI2.0 dock (translating into up to 2 DP lanes
worth of bandwidth).

Signed-off-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20250514-topic-romu_dp-v1-1-6242d6acb5e5@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
 2025-05-14 20:20:34 +01:00
Abhinaba Rakshit
4153eb3897 arm64: dts: qcom: qcs615: add QCrypto nodes 
Add the QCE and Crypto BAM DMA nodes.

Signed-off-by: Abhinaba Rakshit <quic_arakshit@quicinc.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20250318-enable-qce-for-qcs615-v2-2-c5e05fe22572@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
 2025-05-13 17:13:28 +01:00
Luca Weiss
8fc88fbd47 arm64: dts: qcom: qcm6490-fairphone-fp5: Add DisplayPort sound support 
Add the required nodes for sound playback via a connected external
display (DisplayPort over USB-C).

In user space just the following route needs to be set (e.g. using
ALSA UCM):

  amixer -c0 cset name='DISPLAY_PORT_RX Audio Mixer MultiMedia1' 1

Afterwards one can play audio on the MultiMedia1 sound device, e.g.:

  aplay -D plughw:0,0 test.wav

Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>
Link: https://lore.kernel.org/r/20250507-fp5-dp-sound-v4-5-4098e918a29e@fairphone.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
 2025-05-13 16:03:26 +01:00
Viken Dadhaniya
b033426974 arm64: dts: qcom: sa8775p: Add default pin configurations for QUP SEs 
Default pinctrl configurations for all QUP (Qualcomm Universal Peripheral)
Serial Engines (SEs) are missing in the SoC device tree. These
configurations are required by client teams when enabling any SEs as I2C,
SPI, or Serial protocols.

Add default pin configurations for Serial Engines (SEs) for all supported
protocols, including I2C, SPI, and UART, to the sa8775p device tree.  This
change facilitates slave device driver clients to enable usecase with
minimal modifications.

Remove duplicate pin configurations from target-specific file as same pin
configuration is included in the SoC device tree.

Acked-by: Mukesh Kumar Savaliya <quic_msavaliy@quicinc.com>
Signed-off-by: Viken Dadhaniya <quic_vdadhani@quicinc.com>
Link: https://lore.kernel.org/r/20250509090443.4107378-1-quic_vdadhani@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
 2025-05-13 16:02:27 +01:00
Dikshita Agarwal
41661853ae arm64: dts: qcom: sm8550: add iris DT node 
Add DT entries for the sm8550 iris decoder.

Since the firmware is required to be signed, only enable
on Qualcomm development boards where the firmware is
publicly distributed.

Signed-off-by: Dikshita Agarwal <quic_dikshita@quicinc.com>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
Link: https://lore.kernel.org/r/20250509-topic-sm8x50-upstream-iris-8550-dt-v4-1-22ced9179da3@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
 2025-05-13 16:01:56 +01:00
Melody Olvera
cd81339e68 arm64: dts: qcom: sm8750: Add LLCC node 
Add LLCC node for SM8750 SoC.

Signed-off-by: Melody Olvera <melody.olvera@oss.qualcomm.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20250512-sm8750_llcc_master-v5-4-d78dca6282a5@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
 2025-05-13 16:01:05 +01:00
Joel Selvaraj
a18226be95 arm64: dts: qcom: sdm845-xiaomi-beryllium-ebbg: introduce touchscreen support 
Enable the Focaltech FT8719 touchscreen controller used in the Poco F1
(EBBG) panel variant.

Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Joel Selvaraj <foss@joelselvaraj.com>
Link: https://lore.kernel.org/r/20250506-pocof1-touchscreen-support-v4-4-bfb53da52945@joelselvaraj.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
 2025-05-11 17:34:23 -05:00
Joel Selvaraj
2be670d00b arm64: dts: qcom: sdm845-xiaomi-beryllium-tianma: introduce touchscreen support 
Enable the Novatek NT36672A touchscreen controller used in the Poco F1
(Tianma) panel variant.

Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Joel Selvaraj <foss@joelselvaraj.com>
Link: https://lore.kernel.org/r/20250506-pocof1-touchscreen-support-v4-3-bfb53da52945@joelselvaraj.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
 2025-05-11 17:34:23 -05:00
Joel Selvaraj
424246ed3e arm64: dts: qcom: sdm845-xiaomi-beryllium-common: add touchscreen related nodes 
Enable qupv3_id_1 and gpi_dma1 as they are required for configuring
touchscreen. Also add pinctrl configurations needed for touchscreen.
These are common for both the tianma and ebbg touchscreen variant.
In the subsequent patches, we will enable support for the Novatek NT36672a
touchscreen and FocalTech FT8719 touchscreen that are used in the Poco F1
Tianma and EBBG panel variant respectively. This is done in preparation
for that.

Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Joel Selvaraj <foss@joelselvaraj.com>
Link: https://lore.kernel.org/r/20250506-pocof1-touchscreen-support-v4-2-bfb53da52945@joelselvaraj.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
 2025-05-11 17:34:23 -05:00
Pratyush Brahma
061402552e arm64: dts: qcom: qcs8300: add the pcie smmu node 
Add the PCIe SMMU node to enable address translations
for pcie.

Reviewed-by: Dmitry Baryshkov <lumag@kernel.org>
Signed-off-by: Pratyush Brahma <quic_pbrahma@quicinc.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20250508-qcs8300-pcie-smmu-v3-1-c6b4453b0b22@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
 2025-05-11 17:31:27 -05:00
Abel Vesa
28bce181da arm64: dts: qcom: x1e80100-*: Drop useless DP3 compatible override 
Back when display support was added initially to CRD, and we used to have
two separate compatibles for eDP and DP, it was supposed to override the
DP compatible with the eDP one in the board specific devicetree. Since
then, the DP driver has been reworked to figure out the eDP/DP at runtime
while only DP compatible remained in the end.

Even though the override does nothing basically, drop it to avoid
further confusion. Drop it from all X Elite based platforms.

Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Reviewed-by: Johan Hovold <johan+linaro@kernel.org>
Signed-off-by: Abel Vesa <abel.vesa@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20250509-x1e80100-dts-drop-useless-dp-compatible-override-v2-1-126db05cb70a@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
 2025-05-11 17:16:01 -05:00
Vladimir Lypak
6aeda4f204 arm64: dts: qcom: msm8953: Add interconnects 
Add the nodes for the bimc, pcnoc, snoc and snoc_mm. And wire up the
interconnects where applicable.

Signed-off-by: Vladimir Lypak <vladimir.lypak@gmail.com>
[luca: Prepare patch for upstream submission]
Signed-off-by: Luca Weiss <luca@lucaweiss.eu>
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20250420-msm8953-interconnect-v2-2-828715dcb674@lucaweiss.eu
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
 2025-05-10 12:01:43 -05:00
Felix Kaechele
b7bc69b907 arm64: dts: qcom: msm8953: Add uart_5 
Add the node and pinctrl for uart_5 found on the MSM8953 SoC.

Signed-off-by: Felix Kaechele <felix@kaechele.ca>
[luca: Prepare patch for upstream submission]
Signed-off-by: Luca Weiss <luca@lucaweiss.eu>
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20250406-msm8953-uart_5-v1-1-7e4841674137@lucaweiss.eu
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
 2025-05-10 11:59:58 -05:00
Luca Weiss
5e170ce69d arm64: dts: qcom: sm8350: Use q6asm defines for reg 
Use the MSM_FRONTEND_DAI_MULTIMEDIA* defines to make the code more
readable. No functional change intended.

Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20250425-q6asmdai-defines-v1-11-28308e2ce7d4@fairphone.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
 2025-05-10 11:56:49 -05:00
Luca Weiss
69a8b068dc arm64: dts: qcom: sm7325-nothing-spacewar: Use q6asm defines for reg 
Use the MSM_FRONTEND_DAI_MULTIMEDIA* defines to make the code more
readable. No functional change intended.

Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20250425-q6asmdai-defines-v1-10-28308e2ce7d4@fairphone.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
 2025-05-10 11:56:49 -05:00
Luca Weiss
f18b14d2be arm64: dts: qcom: sdm850*: Use q6asm defines for reg 
Use the MSM_FRONTEND_DAI_MULTIMEDIA* defines to make the code more
readable. No functional change intended.

Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20250425-q6asmdai-defines-v1-9-28308e2ce7d4@fairphone.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
 2025-05-10 11:56:49 -05:00
Luca Weiss
84665986b7 arm64: dts: qcom: sdm845*: Use q6asm defines for reg 
Use the MSM_FRONTEND_DAI_MULTIMEDIA* defines to make the code more
readable. No functional change intended.

Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20250425-q6asmdai-defines-v1-8-28308e2ce7d4@fairphone.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
 2025-05-10 11:56:48 -05:00
Luca Weiss
f1275b0a1d arm64: dts: qcom: sc7280: Use q6asm defines for reg 
Use the MSM_FRONTEND_DAI_MULTIMEDIA* defines to make the code more
readable. No functional change intended.

Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20250425-q6asmdai-defines-v1-7-28308e2ce7d4@fairphone.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
 2025-05-10 11:56:48 -05:00
Luca Weiss
08b8a9fdce arm64: dts: qcom: sc7180-acer-aspire1: Use q6asm defines for reg 
Use the MSM_FRONTEND_DAI_MULTIMEDIA* defines to make the code more
readable. No functional change intended.

Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20250425-q6asmdai-defines-v1-6-28308e2ce7d4@fairphone.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
 2025-05-10 11:56:48 -05:00
Luca Weiss
6ac93e5b21 arm64: dts: qcom: qrb5165-rb5: Use q6asm defines for reg 
Use the MSM_FRONTEND_DAI_MULTIMEDIA* defines to make the code more
readable. No functional change intended.

Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20250425-q6asmdai-defines-v1-5-28308e2ce7d4@fairphone.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
 2025-05-10 11:56:48 -05:00
Luca Weiss
01160256f4 arm64: dts: qcom: msm8996*: Use q6asm defines for reg 
Use the MSM_FRONTEND_DAI_MULTIMEDIA* defines to make the code more
readable. No functional change intended.

Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20250425-q6asmdai-defines-v1-4-28308e2ce7d4@fairphone.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
 2025-05-10 11:56:48 -05:00
Luca Weiss
d89ed52f3f arm64: dts: qcom: msm8953: Use q6asm defines for reg 
Use the MSM_FRONTEND_DAI_MULTIMEDIA* defines to make the code more
readable. No functional change intended.

Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20250425-q6asmdai-defines-v1-3-28308e2ce7d4@fairphone.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
 2025-05-10 11:56:48 -05:00
Luca Weiss
0c5b597651 arm64: dts: qcom: msm8916-modem-qdsp6: Use q6asm defines for reg 
Use the MSM_FRONTEND_DAI_MULTIMEDIA* defines to make the code more
readable. No functional change intended.

Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20250425-q6asmdai-defines-v1-2-28308e2ce7d4@fairphone.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
 2025-05-10 11:56:48 -05:00
Luca Weiss
e99e02edac arm64: dts: qcom: apq8096-db820c: Use q6asm defines for reg 
Use the MSM_FRONTEND_DAI_MULTIMEDIA* defines to make the code more
readable. No functional change intended.

Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20250425-q6asmdai-defines-v1-1-28308e2ce7d4@fairphone.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
 2025-05-10 11:56:48 -05:00
Luca Weiss
6b51f5e181 arm64: dts: qcom: qcm6490-fairphone-fp5: Hook up DisplayPort over USB-C 
Extend the USB graph to connect the OCP96011 switch, the PTN36502
redriver, the USB controllers and the MDSS, so that DisplayPort over
USB-C is working.

Connect some parts of the graph directly in the SoC dtsi since those
parts are wired up like this in the SoC directly.

Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20250425-fp5-pmic-glink-dp-v3-4-cc9c2aeb42fb@fairphone.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
 2025-05-10 11:56:12 -05:00
Luca Weiss
1efa79c753 arm64: dts: qcom: qcm6490-fairphone-fp5: Add OCP96011 audio switch 
Add a node for the OCP96011 on the board which is used to handle USB-C
analog audio switch and handles the SBU mux for DisplayPort-over-USB-C.

Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>
Link: https://lore.kernel.org/r/20250425-fp5-pmic-glink-dp-v3-3-cc9c2aeb42fb@fairphone.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
 2025-05-10 11:56:12 -05:00
Luca Weiss
90485e48b8 arm64: dts: qcom: qcm6490-fairphone-fp5: Add PTN36502 redriver 
Add a node for the "Type-C USB 3.1 Gen 1 and DisplayPort v1.2 combo
redriver" found on this device.

Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>
Link: https://lore.kernel.org/r/20250425-fp5-pmic-glink-dp-v3-2-cc9c2aeb42fb@fairphone.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
 2025-05-10 11:56:12 -05:00
Luca Weiss
a0a287b477 arm64: dts: qcom: sm6350: Align reg properties with latest style 
While in the past the 'reg' properties were often written using decimal
'0' for #address-cells = <2> & #size-cells = <2>, nowadays the style is
to use hexadecimal '0x0' instead.

Align this dtsi file to the new style to make it consistent, and don't
use mixed 0x0 and 0 anymore.

Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20250324-sm6350-videocc-v2-1-cc22386433f4@fairphone.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
 2025-05-10 11:50:10 -05:00
Luca Weiss
8881698cbd arm64: dts: qcom: sc7280: Stop setting dmic01 pinctrl for va-macro 
There's devices that don't have a DMIC connected to va-macro, so stop
setting the pinctrl in sc7280.dtsi, but move it to the devices that
actually are using it.

No change in functionality is expected, just some boards with disabled
va-macro are losing the pinctrl (herobrine-r1, villager-r0, zombie*).

Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20250404-sc7280-va-dmic01-v1-1-2862ddd20c48@fairphone.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
 2025-05-10 11:45:55 -05:00
Danila Tikhonov
bd4718d97d dt-bindings: arm: qcom: Add SM7150 Google Pixel 4a 
Google Pixel 4a (google,sunfish) is a smartphone based on the SM7150 SoC

Signed-off-by: Danila Tikhonov <danila@jiaxyga.com>
Link: https://lore.kernel.org/r/20250422213137.80366-15-danila@jiaxyga.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
 2025-05-07 09:44:21 -07:00
Stephan Gerhold
f7f6553612 arm64: dts: qcom: msm8939: Drop generic UART pinctrl templates 
Remove the generic UART pinctrl templates from msm8939.dtsi and copy the
definition for the custom UART use cases into the board DT files. This
makes it clear that the set of pins/pull etc are specific to the board and
UART use case.

No functional change.

Signed-off-by: Stephan Gerhold <stephan.gerhold@linaro.org>
Link: https://lore.kernel.org/r/20250422-msm8916-console-pinctrl-v2-6-f345b7a53c91@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
 2025-05-06 22:38:21 -07:00
Stephan Gerhold
979b65d8f4 arm64: dts: qcom: msm8916: Drop generic UART pinctrl templates 
Remove the generic UART pinctrl templates from msm8916.dtsi and copy the
definition for the custom UART use cases into the board DT files. This
makes it clear that the set of pins/pull etc are specific to the board and
UART use case.

No functional change.

Signed-off-by: Stephan Gerhold <stephan.gerhold@linaro.org>
Link: https://lore.kernel.org/r/20250422-msm8916-console-pinctrl-v2-5-f345b7a53c91@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
 2025-05-06 22:38:21 -07:00
Stephan Gerhold
fe848d64cc arm64: dts: qcom: msm8916-motorola: Use UART1 console pinctrl 
The Motorola MSM8916-based smartphones all use UART1 with 2 pins (TX, RX)
as debug UART console, so make use of the new &blsp_uart1_console_default
template. This applies the needed bias-pull-up to avoid garbage input,
bootph-all for U-Boot and avoids having to override the UART pins.

Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Signed-off-by: Stephan Gerhold <stephan.gerhold@linaro.org>
Link: https://lore.kernel.org/r/20250422-msm8916-console-pinctrl-v2-4-f345b7a53c91@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
 2025-05-06 22:38:21 -07:00
Stephan Gerhold
2b8d22ef16 arm64: dts: qcom: msm8919/39: Use UART2 console pinctrl where appropriate 
Convert the majority of MSM8916/39-based boards, which use UART2 with 2
pins (TX, RX) for the debug UART console. This adds the needed bias-pull-up
and bootph-all properties to avoid garbage input when UART is disconnected.

apq8016-schneider-hmibsc.dts does not use UART2 as a debug console, so it's
left as-is in this commit.

Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Signed-off-by: Stephan Gerhold <stephan.gerhold@linaro.org>
Link: https://lore.kernel.org/r/20250422-msm8916-console-pinctrl-v2-3-f345b7a53c91@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
 2025-05-06 22:38:21 -07:00
Stephan Gerhold
5c0c8b7a31 arm64: dts: qcom: msm8916/39: Introduce new UART console pinctrl 
At the moment, msm8916/39.dtsi have two inconsistent UART pinctrl templates
that are used by all the boards:

 - &blsp_uart1_default configures all 4 pins (TX, RX, CTS, RTS), some
   boards then limit this to just RX and TX
 - &blsp_uart2_default only configures 2 pins (TX, RX), even though UART2
   also supports CTS/RTS

It's difficult to define a generic pinctrl template for all UART use cases,
since they are quite different in practice. The main use case for most of
the 40+ MSM8916/39-based boards upstream is the UART debug console. The
current generic template is lacking some properties to work properly:

 - bias-pull-up for RX: Generally, UART is push-pull and does not need pull
   up/down. Both sides drive TX, so RX should never be floating. This is
   why the current pinctrl in msm8916/39.dtsi uses bias-disable. However,
   this assumes that UART is always connected. For the debug console this
   will be rarely the case on mobile devices, only during debugging
   sessions. The rest of the time, the RX pin is floating.

   This has never caused massive problems, but it's obvious now that this
   needs fixing:

    (1) In U-Boot, we have been fighting with problems with autoboot for
        years. Most of the time, there is a single \0 byte ("break event")
        read during boot, which interrupts the autoboot process. I tried to
        work around that by inserting some random delay [1], but it turned
        out this is also not working reliably on all boards.

        What happens is: Since RX is floating, it switches randomly between
        high or low. A long low state is interpreted as "break event" (\0).

    (2) In postmarketOS, we used to have the "magic SysRq key" enabled by
        default for the serial console. We had to disable this at some
        point, because there was a small number of users who were reporting
        sysrq spam in the kernel log, possibly even crashes/panics
        triggered by sysrq.

        What likely happened is: SysRq is triggered by sending a "break
        event", like in (1). With enough luck, you could even trigger any
        of the SysRq actions if the RX pin switches between high and low
        (e.g. because of noise introduced by the LTE radio close by).

   We can fix this using bias-pull-up, but this may be unneeded,
   unexpected, or even unwanted for other UART use cases.

 - bootph-all: U-Boot needs to know which pinctrl to apply during early
   boot stages, so we should specify "bootph-all" for the console UART
   pinctrl. Without bootph-all, the bias-pull-up won't be applied early
   enough in U-Boot to avoid the problem with autoboot in point (1) above.
   It doesn't make sense to specify this for the other UART instances.
   bootph-all is a generic property documented in dt-schema bootph.yaml.

Define these two additional properties only for the debug UART console, by
defining a new pinctrl template specifically for that. In the following
commits, boards will be converted to use these where appropriate.

[1]: ad7e967738

Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Signed-off-by: Stephan Gerhold <stephan.gerhold@linaro.org>
Link: https://lore.kernel.org/r/20250422-msm8916-console-pinctrl-v2-2-f345b7a53c91@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
 2025-05-06 22:38:20 -07:00
Stephan Gerhold
8d88f6c9c5 arm64: dts: qcom: msm8916/39: Move UART pinctrl to board files 
In preparation of adding a new console UART specific pinctrl template, move
the pinctrl reference to the board DT part. This forces people porting new
boards to consider what exactly they need for their board.

No functional change for the boards upstream.

Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Signed-off-by: Stephan Gerhold <stephan.gerhold@linaro.org>
Link: https://lore.kernel.org/r/20250422-msm8916-console-pinctrl-v2-1-f345b7a53c91@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
 2025-05-06 22:38:20 -07:00
Abel Vesa
181faec4cc arm64: dts: qcom: x1e80100: Fix PCIe 3rd controller DBI size 
According to documentation, the DBI range size is 0xf20. So fix it.

Cc: stable@vger.kernel.org # 6.14
Fixes: f8af195bee ("arm64: dts: qcom: x1e80100: Add support for PCIe3 on x1e80100")
Signed-off-by: Abel Vesa <abel.vesa@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20250422-x1e80100-dts-fix-pcie3-dbi-size-v1-1-c197701fd7e4@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
 2025-05-06 22:37:18 -07:00
Nikita Travkin
e01acd8f3c arm64: dts: qcom: x1e/x1p: Add EL2 overlay for WoA devices 
WoA devices using x1e/x1p use android firmware to boot, which notably
includes Gunyah hypervisor. This means that, so far, Linux-based OS
could only boot in EL1 on those devices.

However Windows can replace Gunyah upon boot with it's own hypervisor,
and with the use of tools such as "slbounce", it's possible to do the
same for Linux-based OS, in which case some modifications to the DT are
necessary to facilitate the absence of Gunyah services.

Add a EL2-specific DT overlay and apply it to x1e/x1p WoA devices to
create -el2.dtb for each of them alongside "normal" dtb.

Signed-off-by: Nikita Travkin <nikita@trvn.ru>
Link: https://lore.kernel.org/r/20250503-sc-el2-overlays-v2-5-24e9b4572e15@trvn.ru
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
 2025-05-06 22:26:36 -07:00
Nikita Travkin
428f95f41f arm64: dts: qcom: x1e80100: Add PCIe IOMMU 
x1e80100 has an SMMUv3 connected to PCIe which is normally controlled by
Gunyah and is thus transparent to the OS. However if we boot Linux in
EL2, without Gunyah, we need to manage this IOMMU ourselves. To make
that easier, and since the hardware actually exists, just not "usually"
managed by Linux, describe it in the dts as "reserved".

Signed-off-by: Nikita Travkin <nikita@trvn.ru>
Link: https://lore.kernel.org/r/20250503-sc-el2-overlays-v2-4-24e9b4572e15@trvn.ru
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
 2025-05-06 22:26:36 -07:00
Nikita Travkin
263780f318 arm64: dts: qcom: sc8280xp: Add EL2 overlay for WoA devices 
WoA devices using sc8280xp use android firmware to boot, which notably
includes QHEE hypervisor. This means that, so far, Linux-based OS could
only boot in EL1 on those devices.

However Windows can replace QHEE upon boot with it's own hypervisor, and
with the use of tools such as "slbounce", it's possible to do the same
for Linux-based OS, in which case some modifications to the DT are
necessary to facilitate the absence of QHEE services.

Add a EL2-specific DT overlay and apply it to sc8280xp WoA devices to
create -el2.dtb for each of them alongside "normal" dtb.

Signed-off-by: Nikita Travkin <nikita@trvn.ru>
Link: https://lore.kernel.org/r/20250503-sc-el2-overlays-v2-3-24e9b4572e15@trvn.ru
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
 2025-05-06 22:26:35 -07:00
Nikita Travkin
8a40113500 arm64: dts: qcom: sc8280xp: Add PCIe IOMMU 
sc8280xp has an SMMUv3 connected to PCIe which is normally controlled by
QHEE and is thus transparent to the OS. However if we boot Linux in EL2,
without QHEE, we need to manage this IOMMU ourselves. To make that
easier, and since the hardware actually exists, just not "usually"
managed by Linux, describe it in the dts as "reserved".

Signed-off-by: Nikita Travkin <nikita@trvn.ru>
Link: https://lore.kernel.org/r/20250503-sc-el2-overlays-v2-2-24e9b4572e15@trvn.ru
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
 2025-05-06 22:26:35 -07:00
Nikita Travkin
0d95f64be4 arm64: dts: qcom: sc7180: Add EL2 overlay for WoA devices 
WoA devices using sc7180 use android firmware to boot, which notably
includes QHEE hypervisor. This means that, so far, Linux-based OS could
only boot in EL1 on those devices.

However Windows can replace QHEE upon boot with it's own hypervisor, and
with the use of tools such as "slbounce", it's possible to do the same
for Linux-based OS, in which case some modifications to the DT are
necessary to facilitate the absence of QHEE services.

Add a EL2-specific DT overlay and apply it to sc7180 WoA devices to
create -el2.dtb for each of them alongside "normal" dtb.

Signed-off-by: Nikita Travkin <nikita@trvn.ru>
Link: https://lore.kernel.org/r/20250503-sc-el2-overlays-v2-1-24e9b4572e15@trvn.ru
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
 2025-05-06 22:26:35 -07:00
Abel Vesa
635d0c8edf arm64: dts: qcom: x1e001de-devkit: Fix pin config for USB0 retimer vregs 
Describe the missing power source, bias and direction for each of the USB0
retimer gpio-controlled voltage regulators related pin configuration.

Fixes: 019e1ee32f ("arm64: dts: qcom: x1e001de-devkit: Enable external DP support")
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Signed-off-by: Abel Vesa <abel.vesa@linaro.org>
Reviewed-by: Johan Hovold <johan+linaro@kernel.org>
Link: https://lore.kernel.org/r/20250422-x1e001de-devkit-dts-fix-retimer-gpios-v2-2-0129c4f2b6d7@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
 2025-05-06 13:49:03 -07:00
Abel Vesa
f76fdcd255 arm64: dts: qcom: x1e001de-devkit: Describe USB retimers resets pin configs 
Currently, on the X Elite Devkit, the pin configuration of the reset
gpios for all three PS8830 USB retimers are left configured by the
bootloader.

Fix that by describing their pin configuration.

Fixes: 019e1ee32f ("arm64: dts: qcom: x1e001de-devkit: Enable external DP support")
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Signed-off-by: Abel Vesa <abel.vesa@linaro.org>
Reviewed-by: Johan Hovold <johan+linaro@kernel.org>
Link: https://lore.kernel.org/r/20250422-x1e001de-devkit-dts-fix-retimer-gpios-v2-1-0129c4f2b6d7@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
 2025-05-06 13:49:02 -07:00
Stephan Gerhold
efdbeae860 arm64: dts: qcom: x1e80100-qcp: Fix vreg_l2j_1p2 voltage 
In the ACPI DSDT table, PPP_RESOURCE_ID_LDO2_J is configured with 1256000
uV instead of the 1200000 uV we have currently in the device tree. Use the
same for consistency and correctness.

Cc: stable@vger.kernel.org
Fixes: af16b00578 ("arm64: dts: qcom: Add base X1E80100 dtsi and the QCP dts")
Signed-off-by: Stephan Gerhold <stephan.gerhold@linaro.org>
Reviewed-by: Johan Hovold <johan+linaro@kernel.org>
Reviewed-by: Abel Vesa <abel.vesa@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20250423-x1e-vreg-l2j-voltage-v1-6-24b6a2043025@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
 2025-05-06 13:33:41 -07:00
Stephan Gerhold
4f27ede34c arm64: dts: qcom: x1e80100-lenovo-yoga-slim7x: Fix vreg_l2j_1p2 voltage 
In the ACPI DSDT table, PPP_RESOURCE_ID_LDO2_J is configured with 1256000
uV instead of the 1200000 uV we have currently in the device tree. Use the
same for consistency and correctness.

Cc: stable@vger.kernel.org
Fixes: 45247fe17d ("arm64: dts: qcom: x1e80100: add Lenovo Thinkpad Yoga slim 7x devicetree")
Signed-off-by: Stephan Gerhold <stephan.gerhold@linaro.org>
Reviewed-by: Johan Hovold <johan+linaro@kernel.org>
Reviewed-by: Abel Vesa <abel.vesa@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20250423-x1e-vreg-l2j-voltage-v1-5-24b6a2043025@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
 2025-05-06 13:33:41 -07:00
Stephan Gerhold
4a09dad9d4 arm64: dts: qcom: x1e80100-hp-omnibook-x14: Fix vreg_l2j_1p2 voltage 
In the ACPI DSDT table, PPP_RESOURCE_ID_LDO2_J is configured with 1256000
uV instead of the 1200000 uV we have currently in the device tree. Use the
same for consistency and correctness.

Cc: stable@vger.kernel.org
Fixes: 6f18b8d414 ("arm64: dts: qcom: x1e80100-hp-x14: dt for HP Omnibook X Laptop 14")
Signed-off-by: Stephan Gerhold <stephan.gerhold@linaro.org>
Reviewed-by: Johan Hovold <johan+linaro@kernel.org>
Reviewed-by: Abel Vesa <abel.vesa@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20250423-x1e-vreg-l2j-voltage-v1-4-24b6a2043025@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
 2025-05-06 13:33:41 -07:00
Stephan Gerhold
0fb9ecf871 arm64: dts: qcom: x1e80100-asus-vivobook-s15: Fix vreg_l2j_1p2 voltage 
In the ACPI DSDT table, PPP_RESOURCE_ID_LDO2_J is configured with 1256000
uV instead of the 1200000 uV we have currently in the device tree. Use the
same for consistency and correctness.

Cc: stable@vger.kernel.org
Fixes: d0e2f8f62d ("arm64: dts: qcom: Add device tree for ASUS Vivobook S 15")
Signed-off-by: Stephan Gerhold <stephan.gerhold@linaro.org>
Reviewed-by: Johan Hovold <johan+linaro@kernel.org>
Reviewed-by: Abel Vesa <abel.vesa@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20250423-x1e-vreg-l2j-voltage-v1-3-24b6a2043025@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
 2025-05-06 13:33:41 -07:00