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Author SHA1 Message Date
Srinivasan Shanmugam
eae3699175 drm/amd/display: Adjust kdoc for 'optc35_set_odm_combine' 
Fixes the following W=1 kernel build warning:

drivers/gpu/drm/amd/amdgpu/../display/dc/dcn35/dcn35_optc.c:46: warning: This comment starts with '/**', but isn't a kernel-doc comment. Refer Documentation/doc-guide/kernel-doc.rst
* Enable CRTC

Cc: Qingqing Zhuo <Qingqing.Zhuo@amd.com>
Cc: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Cc: Harry Wentland <harry.wentland@amd.com>
Cc: Aurabindo Pillai <aurabindo.pillai@amd.com>
Cc: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Srinivasan Shanmugam <srinivasan.shanmugam@amd.com>
Reviewed-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2023-08-30 15:51:16 -04:00
Ma Jun
8f9a9a09af drm/amd: Simplify the bo size check funciton 
Simplify the code logic of size check function amdgpu_bo_validate_size

Signed-off-by: Ma Jun <Jun.Ma2@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2023-08-30 15:51:16 -04:00
Rajneesh Bhardwaj
d30279a9e3 drm/amdgpu: Hide xcp partition sysfs under SRIOV 
XCP partitions should not be visible for the VF for GFXIP 9.4.3.

Reviewed-by: Lijo Lazar <lijo.lazar@amd.com>
Signed-off-by: Rajneesh Bhardwaj <rajneesh.bhardwaj@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2023-08-30 15:51:16 -04:00
Harish Kasiviswanathan
37fb879107 drm/amdkfd: ratelimited SQ interrupt messages 
No functional change. Use ratelimited version of pr_ to avoid
overflowing of dmesg buffer

Signed-off-by: Harish Kasiviswanathan <Harish.Kasiviswanathan@amd.com>
Reviewed-by: Philip Yang <philip.yang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2023-08-30 15:51:16 -04:00
Tao Zhou
ac3343c761 drm/amdgpu: use read-modify-write mode for gfx v9_4_3 SQ setting 
Instead of using direct update, avoid touching unrelated fields.

Signed-off-by: Tao Zhou <tao.zhou1@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2023-08-30 15:51:16 -04:00
ZhenGuo Yin
9f05cfc78c drm/amdgpu: access RLC_SPM_MC_CNTL through MMIO in SRIOV runtime 
Register RLC_SPM_MC_CNTL is not blocked by L1 policy, VF can
directly access it through MMIO during SRIOV runtime.

v2: use SOC15 interface to access registers

Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: ZhenGuo Yin <zhenguo.yin@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2023-08-30 15:51:16 -04:00
Lee Jones
668dfc4533 drm/amd/amdgpu/sdma_v6_0: Demote a bunch of half-completed function headers 
Fixes the following W=1 kernel build warning(s):

 drivers/gpu/drm/amd/amdgpu/sdma_v6_0.c:248: warning: Function parameter or member 'job' not described in 'sdma_v6_0_ring_emit_ib'
 drivers/gpu/drm/amd/amdgpu/sdma_v6_0.c:248: warning: Function parameter or member 'flags' not described in 'sdma_v6_0_ring_emit_ib'
 drivers/gpu/drm/amd/amdgpu/sdma_v6_0.c:945: warning: Function parameter or member 'timeout' not described in 'sdma_v6_0_ring_test_ib'
 drivers/gpu/drm/amd/amdgpu/sdma_v6_0.c:1124: warning: Function parameter or member 'ring' not described in 'sdma_v6_0_ring_pad_ib'
 drivers/gpu/drm/amd/amdgpu/sdma_v6_0.c:1175: warning: Function parameter or member 'vmid' not described in 'sdma_v6_0_ring_emit_vm_flush'
 drivers/gpu/drm/amd/amdgpu/sdma_v6_0.c:1175: warning: Function parameter or member 'pd_addr' not described in 'sdma_v6_0_ring_emit_vm_flush'

Cc: linaro-mm-sig@lists.linaro.org
Signed-off-by: Lee Jones <lee@kernel.org>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2023-08-30 15:51:16 -04:00
Alex Sierra
da3a815ccd drm/amdkfd: use mask to get v9 interrupt sq data bits correctly 
Interrupt sq data bits were not taken properly from contextid0 and contextid1.
Use macro KFD_CONTEXT_ID_GET_SQ_INT_DATA instead.

Signed-off-by: Alex Sierra <alex.sierra@amd.com>
Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2023-08-30 15:51:16 -04:00
Qingqing Zhuo
06b1661e45 drm/amd/display: Add DCN35 DM Support 
[Why & How]
Add DM handling for DCN35.

Signed-off-by: Qingqing Zhuo <Qingqing.Zhuo@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2023-08-30 15:51:16 -04:00
Qingqing Zhuo
45e7649fd1 drm/amd/display: Add DCN35 CORE 
[Why & How]
Add DCN35 support in dc_resource.c.

Signed-off-by: Qingqing Zhuo <Qingqing.Zhuo@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2023-08-30 15:51:16 -04:00
André Almeida
d68ccdb263 drm/amdgpu: Allocate coredump memory in a nonblocking way 
During a GPU reset, a normal memory reclaim could block to reclaim
memory. Giving that coredump is a best effort mechanism, it shouldn't
disturb the reset path. Change its memory allocation flag to a
nonblocking one.

Signed-off-by: André Almeida <andrealmeid@igalia.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2023-08-30 15:51:16 -04:00
Qingqing Zhuo
1cb87e0489 drm/amd/display: Add DCN35 blocks to Makefile 
[Why & How]
Enable DCN35 in makefile.

Signed-off-by: Qingqing Zhuo <Qingqing.Zhuo@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2023-08-30 15:51:15 -04:00
Qingqing Zhuo
69cc1864c9 drm/amd/display: Add DCN35 DML 
[Why & How]
Add DML handling for DCN35.

Signed-off-by: Qingqing Zhuo <Qingqing.Zhuo@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2023-08-30 15:51:15 -04:00
Qingqing Zhuo
0fa45b6aea drm/amd/display: Add DCN35 Resource 
[Why & How]
Add resource handling for DCN35.

v2: drop unused guard
v3: drop dml2 dependencies for now (Alex)

Signed-off-by: Qingqing Zhuo <Qingqing.Zhuo@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2023-08-30 15:51:15 -04:00
Qingqing Zhuo
ec129fa356 drm/amd/display: Add DCN35 init 
[Why & How]
Add init files for DCN35.

Signed-off-by: Qingqing Zhuo <Qingqing.Zhuo@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2023-08-30 15:51:15 -04:00
Qingqing Zhuo
65138eb72e drm/amd/display: Add DCN35 DMUB 
[Why & How]
Add DMUB handling for DCN35.

Signed-off-by: Qingqing Zhuo <Qingqing.Zhuo@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2023-08-30 15:51:15 -04:00
Qingqing Zhuo
9d6fa6760e drm/amd/display: Add DCN35 IRQ 
[Why & How]
- Add IRQ handling for DCN35
- Update IRQ files for other DCNs in accordance
  to change in irq_service.h

Signed-off-by: Qingqing Zhuo <Qingqing.Zhuo@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2023-08-30 15:51:15 -04:00
Qingqing Zhuo
8774029f76 drm/amd/display: Add DCN35 CLK_MGR 
[Why & How]
Add CLK_MGR handling for DCN35.

v2: Drop stale SMU interfaces (Alex)

Signed-off-by: Qingqing Zhuo <Qingqing.Zhuo@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2023-08-30 15:51:15 -04:00
Qingqing Zhuo
6f8b7565cc drm/amd/display: Add DCN35 HWSEQ 
[Why & How]
Add HWSEQ handling for DCN35.

Signed-off-by: Qingqing Zhuo <Qingqing.Zhuo@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2023-08-30 15:51:15 -04:00
Qingqing Zhuo
327959a489 drm/amd/display: Add DCN35 DSC 
[Why & How]
Add DSC handling for DCN35.

Signed-off-by: Qingqing Zhuo <Qingqing.Zhuo@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2023-08-30 15:51:15 -04:00
Qingqing Zhuo
c10ad60fda drm/amd/display: Add DCN35 MMHUBBUB 
[Why & How]
Add MMHUBBUB handling for DCN35.

Signed-off-by: Qingqing Zhuo <Qingqing.Zhuo@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2023-08-30 15:51:15 -04:00
Qingqing Zhuo
4435fc4240 drm/amd/display: Add DCN35 HUBBUB 
[Why & How]
Add HUBBUB handling for DCN35.

Signed-off-by: Qingqing Zhuo <Qingqing.Zhuo@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2023-08-30 15:51:15 -04:00
Qingqing Zhuo
74c06a327d drm/amd/display: Add DCN35 HUBP 
[Why & How]
Add HUBP handling for DCN35.

Signed-off-by: Qingqing Zhuo <Qingqing.Zhuo@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2023-08-30 15:51:15 -04:00
Qingqing Zhuo
284246a1c3 drm/amd/display: Add DCN35 DWB 
[Why & How]
Add DWB handling for DCN35.

Signed-off-by: Qingqing Zhuo <Qingqing.Zhuo@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2023-08-30 15:51:14 -04:00
Qingqing Zhuo
bd831267c6 drm/amd/display: Add DCN35 DPP 
[Why & How]
Add DPP handling for DCN35.

Signed-off-by: Qingqing Zhuo <Qingqing.Zhuo@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2023-08-30 15:51:14 -04:00
Qingqing Zhuo
ffb8c23718 drm/amd/display: Add DCN35 OPP 
[Why & How]
Add OPP handling for DCN35.

Signed-off-by: Qingqing Zhuo <Qingqing.Zhuo@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2023-08-30 15:51:14 -04:00
Qingqing Zhuo
b9c96af677 drm/amd/display: Add DCN35 OPTC 
[Why & How]
Add OPTC handling for DCN35.

Signed-off-by: Qingqing Zhuo <Qingqing.Zhuo@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2023-08-30 15:51:14 -04:00
Qingqing Zhuo
920f879c83 drm/amd/display: Add DCN35 PG_CNTL 
[Why & How]
Add PG_CNTL handling for DCN35.

Signed-off-by: Qingqing Zhuo <Qingqing.Zhuo@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2023-08-30 15:51:14 -04:00
Qingqing Zhuo
e0b394a87a drm/amd/display: Add DCN35 DIO 
[Why & How]
Add DIO handling for DCN35.

Signed-off-by: Qingqing Zhuo <Qingqing.Zhuo@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2023-08-30 15:51:14 -04:00
Qingqing Zhuo
819af8dc9a drm/amd/display: Add DCN35 DCCG 
[Why & How]
Add DCCG handling for DCN35.

Signed-off-by: Qingqing Zhuo <Qingqing.Zhuo@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2023-08-30 15:51:14 -04:00
Qingqing Zhuo
5f0326ea95 drm/amd/display: Add DCN35 GPIO 
[Why & How]
Add DCN35 support in GPIO.

Signed-off-by: Qingqing Zhuo <Qingqing.Zhuo@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2023-08-30 15:51:14 -04:00
Qingqing Zhuo
26a692f241 drm/amd/display: Add DCN35 BIOS command table support 
[Why & How]
Add case for DCN35 in command_table_helper2.c.

Signed-off-by: Qingqing Zhuo <Qingqing.Zhuo@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2023-08-30 15:51:14 -04:00
Qingqing Zhuo
fb8c3ef805 drm/amd/display: Update dc.h for DCN35 support 
[Why & How]
Update dc.h for DCN35 usage.

Signed-off-by: Qingqing Zhuo <Qingqing.Zhuo@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2023-08-30 15:51:14 -04:00
Qingqing Zhuo
33e36f8e50 drm/amd/display: Update DCN32 for DCN35 support 
[Why & How]
Update DCN32 files for DCN35 usage.

Signed-off-by: Qingqing Zhuo <Qingqing.Zhuo@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2023-08-30 15:51:14 -04:00
Qingqing Zhuo
24143e5089 drm/amd/display: Update DCN314 for DCN35 support 
[Why & How]
Update DCN314 files for DCN35 usage.

Signed-off-by: Qingqing Zhuo <Qingqing.Zhuo@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2023-08-30 15:51:14 -04:00
Qingqing Zhuo
efc1d1c989 drm/amd/display: Update DCN31 for DCN35 support 
[Why & How]
Update DCN31 files for DCN35 usage.

Signed-off-by: Qingqing Zhuo <Qingqing.Zhuo@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2023-08-30 15:51:14 -04:00
Qingqing Zhuo
0ccd770ab0 drm/amd/display: Update DCN30 for DCN35 support 
[Why & How]
Update DCN30 files for DCN35 usage.

Signed-off-by: Qingqing Zhuo <Qingqing.Zhuo@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2023-08-30 15:51:13 -04:00
Qingqing Zhuo
9fc64eade8 drm/amd/display: Update DCN20 for DCN35 support 
[Why & How]
Update DCN20 files for DCN35 usage.

Signed-off-by: Qingqing Zhuo <Qingqing.Zhuo@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2023-08-30 15:51:13 -04:00
Qingqing Zhuo
473eb67cf1 drm/amd/display: Update DCN10 for DCN35 support 
[Why & How]
Update DCN10 files for DCN35 usage.

Signed-off-by: Qingqing Zhuo <Qingqing.Zhuo@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2023-08-30 15:51:13 -04:00
Qingqing Zhuo
9d1870a7a4 drm/amd/display: Update DCE for DCN35 support 
[Why & How]
Update DCE files for DCN35 usage.

Signed-off-by: Qingqing Zhuo <Qingqing.Zhuo@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2023-08-30 15:51:13 -04:00
Qingqing Zhuo
ccecb07967 drm/amd/display: Add DCN35 family information 
[Why & How]
Add DCN35 family information in DC.

Signed-off-by: Qingqing Zhuo <Qingqing.Zhuo@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2023-08-30 15:51:13 -04:00
Qingqing Zhuo
ea629e5cf2 drm/amd/display: Add dcn35 register header files 
[Why & How]
Add register headers for DCN35.

Signed-off-by: Qingqing Zhuo <Qingqing.Zhuo@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2023-08-30 15:51:13 -04:00
Hawking Zhang
a8cde40201 drm/amdgpu: Support query ecc cap for aqua_vanjaram 
Driver queries umc_info v4_0 to identify ecc cap
for aqua_vanjaram

Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Candice Li <candice.li@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2023-08-30 15:51:13 -04:00
Hawking Zhang
62a79c93d8 drm/amdgpu: Add umc_info v4_0 structure 
To be used by aqua_vanjaram

Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Candice Li <candice.li@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2023-08-30 15:51:13 -04:00
Srinivasan Shanmugam
5254803849 drm/radeon: Remove the references of radeon_gem_ pread & pwrite ioctls 
Removing the functions of pread & pwrite & IOCTL defines, as their
existence allows an authorized client to spam the system logs.

Fixes: db996e64b2 ("drm/radeon: Fix ENOSYS with better fitting error codes in radeon_gem.c")
Suggested-by: Christian König <christian.koenig@amd.com>
Cc: Christian König <christian.koenig@amd.com>
Cc: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Srinivasan Shanmugam <srinivasan.shanmugam@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2023-08-30 15:51:13 -04:00
Srinivasan Shanmugam
088c507b5e drm/amd/display: Fix up kdoc format for 'dc_set_edp_power' 
Fixes the following W=1 kernel build warning:

drivers/gpu/drm/amd/amdgpu/../display/dc/core/dc.c:5261: warning: Cannot understand  *******************************************

Cc: Ian Chen <ian.chen@amd.com>
Cc: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Cc: Harry Wentland <harry.wentland@amd.com>
Cc: Aurabindo Pillai <aurabindo.pillai@amd.com>
Cc: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Srinivasan Shanmugam <srinivasan.shanmugam@amd.com>
Reviewed-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2023-08-30 15:40:08 -04:00
Wenjing Liu
ea7e2edca8 drm/amd/display: always switch off ODM before committing more streams 
ODM power optimization is only supported with single stream. When ODM
power optimization is enabled, we might not have enough free pipes for
enabling other stream. So when we are committing more than 1 stream we
should first switch off ODM power optimization to make room for new
stream and then allocating pipe resource for the new stream.

Cc: stable@vger.kernel.org
Fixes: 59de751e38 ("drm/amd/display: add ODM case when looking for first split pipe")
Reviewed-by: Dillon Varone <dillon.varone@amd.com>
Acked-by: Hamza Mahfooz <hamza.mahfooz@amd.com>
Signed-off-by: Wenjing Liu <wenjing.liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2023-08-30 15:38:25 -04:00
Martin Leung
0ee5d7374c drm/amd/display: 3.2.249 
This version brings along the following:
- DCN315 fixes
- DCN31 fixes
- DPIA fixes
- Dump the pipe topology when it updates
- Misc code cleanups
- New debugfs interface to query the current ODM combine configuration
- ODM fixes
- Potential deadlock while waiting for MPC idle fix
- Support for windowed MPO ODM

Acked-by: Hamza Mahfooz <hamza.mahfooz@amd.com>
Signed-off-by: Martin Leung <martin.leung@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2023-08-30 15:38:19 -04:00
Wenjing Liu
d55a36062e drm/amd/display: fix pipe topology logging error 
[why]
There is a logging error in the recently added pipe topology log.
If the plane with index 0 uses MPC combine, the log shows that
as two separate planes.

[how]
Initialize plane idx as -1 and increment plane idx before logging
any primary dpp pipes of a plane.

Reviewed-by: Dillon Varone <dillon.varone@amd.com>
Acked-by: Hamza Mahfooz <hamza.mahfooz@amd.com>
Signed-off-by: Wenjing Liu <wenjing.liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2023-08-30 15:38:11 -04:00
Aurabindo Pillai
07926ba8a4 drm/amd/display: Add debugfs interface for ODM combine info 
[Why]
For use with IGT tests in userspace, the number of ODM segments in use
is required to be exposed to userspace to verify that ODM Combine is
working as expected when special timings are committed.

[How]
Add a connector specific debugfs entry that prints the number of ODM
segments in use.

Reviewed-by: Wenjing Liu <wenjing.liu@amd.com>
Acked-by: Hamza Mahfooz <hamza.mahfooz@amd.com>
Signed-off-by: Aurabindo Pillai <aurabindo.pillai@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2023-08-30 15:37:59 -04:00