Commit Graph

1169643 Commits

Author SHA1 Message Date
Arnd Bergmann
d40a2f5062 Merge tag 'riscv-dt-for-v6.4' of https://git.kernel.org/pub/scm/linux/kernel/git/conor/linux into soc/dt
RISC-V Devicetrees for v6.4

Microchip:
A "fix" for the system controller's regs on PolarFire SoC, adding a
missing reg property.
The patch had been sitting there for months and I only re-found it
recently, so you can guess how much of a "fix" it actually is. It'll
become needed when the system controller's QSPI gets added in the future,
but at present there's no urgency as the driver can handle both the
current and "fixed" versions.

StarFive:
Basic support for the JH7110 & the associated first-party dev board, the
VisionFive v2 (in two forms). There's a bunch of dt-bindings required
for this too, all of which have had input from the DT folk. There's
enough in this tag to boot to a console w/ an initramfs but little more.
The SoC supports some of the "new" bit manipulation instructions, which
is a good test for the recently added Zbb support in the kernel.

Signed-off-by: Conor Dooley <conor.dooley@microchip.com>

* tag 'riscv-dt-for-v6.4' of https://git.kernel.org/pub/scm/linux/kernel/git/conor/linux:
  riscv: dts: starfive: Add StarFive JH7110 VisionFive 2 board device tree
  riscv: dts: starfive: Add StarFive JH7110 pin function definitions
  riscv: dts: starfive: Add initial StarFive JH7110 device tree
  dt-bindings: riscv: Add SiFive S7 compatible
  dt-bindings: interrupt-controller: Add StarFive JH7110 plic
  dt-bindings: timer: Add StarFive JH7110 clint
  dt-bindings: clock: Add StarFive JH7110 always-on clock and reset generator
  dt-bindings: clock: Add StarFive JH7110 system clock and reset generator
  riscv: dts: microchip: fix the mpfs' mailbox regs
  riscv: dts: microchip: add mpfs specific macb reset support

Link: https://lore.kernel.org/r/20230406-shank-impromptu-3d483bbc249f@spud
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2023-04-14 15:24:00 +02:00
Arnd Bergmann
acda89d621 Merge tag 'tegra-for-6.4-arm64-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into soc/dt
arm64: tegra: Device tree changes for v6.4-rc1

This adds support for the Jetson Orin NX and includes updates for Jetson
AGX Orin (audio codec, USB Type-C support).

* tag 'tegra-for-6.4-arm64-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
  arm64: tegra: Add vccmq on Jetson TX2
  arm64: tegra: Populate USB Type-C Controller for Jetson AGX Orin
  arm64: tegra: Audio codec support on Jetson AGX Orin
  arm64: tegra: Support Jetson Orin NX reference platform
  arm64: tegra: Support Jetson Orin NX
  dt-bindings: tegra: Document Jetson Orin NX reference platform
  dt-bindings: tegra: Document Jetson Orin NX
  arm64: tegra: Add DSU PMUs for Tegra234
  arm64: tegra: Drop serial clock-names and reset-names

Link: https://lore.kernel.org/r/20230406124804.970394-6-thierry.reding@gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2023-04-14 15:22:45 +02:00
Arnd Bergmann
31e985a2c4 Merge tag 'tegra-for-6.4-arm-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into soc/dt
ARM: tegra: Device tree changes for v6.4-rc1

There are several fixes and cleanups here for some of the older Tegra
consumer devices.

* tag 'tegra-for-6.4-arm-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
  ARM: tegra30: Use cpu* labels
  ARM: tegra30: peripherals: Add 266.5MHz nodes
  ARM: tegra: asus-tf101: Fix accelerometer mount matrix
  ARM: tegra: transformers: Bind RT5631 sound nodes
  ARM: tegra: transformers: Update WM8903 sound nodes

Link: https://lore.kernel.org/r/20230406124804.970394-5-thierry.reding@gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2023-04-14 15:21:06 +02:00
Arnd Bergmann
065b3ec77f Merge tag 'tegra-for-6.4-dt-bindings' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into soc/dt
dt-bindings: Changes for v6.4-rc1

This is a single patch that drops unneeded quotes from various Tegra-
related device tree bindings.

* tag 'tegra-for-6.4-dt-bindings' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
  dt-bindings: arm: nvidia: Drop unneeded quotes

Link: https://lore.kernel.org/r/20230406124804.970394-4-thierry.reding@gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2023-04-14 15:20:35 +02:00
Arnd Bergmann
295954fefe Merge tag 'asahi-soc-dt-6.4' of https://github.com/AsahiLinux/linux into soc/dt
Apple SoC DT updates for 6.4.

This time we have the M2 (t8112) device trees and compatible updates,
as well as a minor fix for PCIe ports on the prior models.

* tag 'asahi-soc-dt-6.4' of https://github.com/AsahiLinux/linux:
  arm64: dts: apple: t600x: Disable unused PCIe ports
  arm64: dts: apple: t8103: Disable unused PCIe ports
  arm64: dts: apple: t8112: Initial t8112 (M2) device trees
  dt-bindings: arm: apple: Add t8112 j413/j473/j493 compatibles
  dt-bindings: clock: apple,nco: Add t8112-nco compatible
  dt-bindings: i2c: apple,i2c: Add apple,t8112-i2c compatible
  dt-bindings: pinctrl: apple,pinctrl: Add apple,t8112-pinctrl compatible
  dt-bindings: pci: apple,pcie: Add t8112 support
  dt-bindings: nvme: apple: Add apple,t8112-nvme-ans2 compatible string
  dt-bindings: mailbox: apple,mailbox: Add t8112 compatibles
  dt-bindings: iommu: apple,sart: Add apple,t8112-sart compatible string
  dt-bindings: interrupt-controller: apple,aic2: Add apple,t8112-aic compatible
  dt-bindings: arm: cpus: Add apple,avalanche & blizzard compatibles
  dt-bindings: watchdog: apple,wdt: Add t8112-wdt compatible
  dt-bindings: arm: apple: apple,pmgr: Add t8112-pmgr compatible
  dt-bindings: power: apple,pmgr-pwrstate: Add t8112 compatible

Link: https://lore.kernel.org/r/7263df01-aebc-2db5-f074-4805e0ae9fbc@marcan.st
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2023-04-14 15:19:26 +02:00
Arnd Bergmann
cfb6bb3831 Merge tag 'samsung-dt-6.4' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into soc/dt
Samsung DTS ARM changes for v6.4

1. Several cleanups and improvements as a result of dtbs_checks: align
   node names with bindings, drop incorrect properties, fix clock-names,
   add missing "ports" node.
2. Move DP and MIPI phys to PMU node (DTS with binding change).
3. Drop old MSHC aliases (while adding proper mmc-ddr-1_8v which was
   selected by the driver based on the MSHC alias) and add generic MMC
   aliases in each board.  The aliases match known numbering in
   the schematics.

* tag 'samsung-dt-6.4' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux:
  dt-bindings: soc: samsung: exynos-pmu: allow phys as child on Exynos3 and Exynos4
  ARM: dts: exynos: add mmc aliases
  ARM: dts: exynos: replace mshc0 alias with mmc-ddr-1_8v property
  ARM: dts: exynos: fix MCT compatible in Universal C210
  ARM: dts: exynos: move DP and MIPI phys to PMU node in Exynos5250
  ARM: dts: exynos: move DP and MIPI phys to PMU node in Exynos5420
  ARM: dts: exynos: move MIPI phy to PMU node in Exynos4
  ARM: dts: exynos: move MIPI phy to PMU node in Exynos3250
  ARM: dts: exynos: drop unused samsung,camclk-out property in Midas
  ARM: dts: s5pv210: correct MIPI CSIS clock name
  ARM: dts: exynos: correct whitespace in Midas
  ARM: dts: exynos: fix WM8960 clock name in Itop Elite
  ARM: dts: exynos: add ports to TC358764 bridge on Arndale
  ARM: dts: exynos: drop fake align STMPE properties in P4 Note
  ARM: dts: exynos: align STMPE ADC node name with bindings in P4 Note

Link: https://lore.kernel.org/r/20230405080438.156805-2-krzysztof.kozlowski@linaro.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2023-04-14 15:16:23 +02:00
Arnd Bergmann
6dcb6ff6ec Merge tag 'samsung-dt64-6.4' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into soc/dt
Samsung DTS ARM64 changes for v6.4

1. Exynos850: add headers with AUD, G3D and HSI clock controller clock
   IDs. Add G3D (GPU) clock controller node.
2. Exynos5433: fixes for dtbs_check: move MIPI phy to PMU node.
3. Drop old MSHC aliases (while adding proper mmc-ddr-1_8v which was
   selected by the driver based on the MSHC alias) and add generic MMC
   aliases in each board.  The aliases match known numbering in
   the schematics.

* tag 'samsung-dt64-6.4' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux:
  arm64: dts: exynos: add mmc aliases
  arm64: dts: exynos: drop mshc aliases
  arm64: dts: exynos: Add CMU_G3D node for Exynos850 SoC
  arm64: dts: exynos: move MIPI phy to PMU node in Exynos5433
  dt-bindings: clock: exynos850: Add AUD and HSI main gate clocks
  dt-bindings: clock: exynos850: Add Exynos850 CMU_G3D

Link: https://lore.kernel.org/r/20230405080438.156805-1-krzysztof.kozlowski@linaro.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2023-04-14 15:13:24 +02:00
Conor Dooley
4cd4beb98f Merge branch 'riscv-jh7110_initial_dts' into riscv-dt-for-next
Merge Hal's series adding support for the new StarFive JH7110 SoC.
There's a few bindings here for core components that were not picked up
by the various maintainers for the subsystems (previously Palmer would
pick these up via the RISC-V tree) & the first two commits in the branch
are shared with the clk tree, since the dts depends on defines in the
dt-binding headers.

This is based on -rc2, as the board does not actually boot on -rc1
due to the bug Linus introduced.

Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
2023-04-05 22:23:17 +01:00
Emil Renner Berthing
54baba3339 riscv: dts: starfive: Add StarFive JH7110 VisionFive 2 board device tree
Add a minimal device tree for StarFive JH7110 VisionFive 2 board
which has version A and version B. Support booting and basic
clock/reset/pinctrl/uart drivers.

Tested-by: Tommaso Merciai <tomm.merciai@gmail.com>
Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Signed-off-by: Emil Renner Berthing <kernel@esmil.dk>
Co-developed-by: Jianlong Huang <jianlong.huang@starfivetech.com>
Signed-off-by: Jianlong Huang <jianlong.huang@starfivetech.com>
Co-developed-by: Hal Feng <hal.feng@starfivetech.com>
Signed-off-by: Hal Feng <hal.feng@starfivetech.com>
Reviewed-by: Emil Renner Berthing <emil.renner.berthing@canonical.com>
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
2023-04-05 15:50:36 +01:00
Jianlong Huang
e22f09e598 riscv: dts: starfive: Add StarFive JH7110 pin function definitions
Add pin function definitions for StarFive JH7110 SoC.

Tested-by: Tommaso Merciai <tomm.merciai@gmail.com>
Co-developed-by: Emil Renner Berthing <kernel@esmil.dk>
Signed-off-by: Emil Renner Berthing <kernel@esmil.dk>
Signed-off-by: Jianlong Huang <jianlong.huang@starfivetech.com>
Signed-off-by: Hal Feng <hal.feng@starfivetech.com>
Reviewed-by: Emil Renner Berthing <emil.renner.berthing@canonical.com>
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
2023-04-05 15:50:22 +01:00
Emil Renner Berthing
60bf0a3984 riscv: dts: starfive: Add initial StarFive JH7110 device tree
Add initial device tree for the JH7110 RISC-V SoC by StarFive
Technology Ltd.

Tested-by: Tommaso Merciai <tomm.merciai@gmail.com>
Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
Signed-off-by: Emil Renner Berthing <kernel@esmil.dk>
Co-developed-by: Jianlong Huang <jianlong.huang@starfivetech.com>
Signed-off-by: Jianlong Huang <jianlong.huang@starfivetech.com>
Co-developed-by: Hal Feng <hal.feng@starfivetech.com>
Signed-off-by: Hal Feng <hal.feng@starfivetech.com>
[conor: squashed in the removal of the S7's non-existent mmu]
Reviewed-by: Emil Renner Berthing <emil.renner.berthing@canonical.com>
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
2023-04-05 15:50:14 +01:00
Hal Feng
8868caa2a0 dt-bindings: riscv: Add SiFive S7 compatible
Add a new compatible string in cpu.yaml for SiFive S7 CPU
core which is used on SiFive U74-MC core complex etc.

Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Emil Renner Berthing <emil.renner.berthing@canonical.com>
Signed-off-by: Hal Feng <hal.feng@starfivetech.com>
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
2023-04-05 15:50:11 +01:00
Emil Renner Berthing
8406d19ca0 dt-bindings: interrupt-controller: Add StarFive JH7110 plic
Add compatible string for StarFive JH7110 plic.

Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Emil Renner Berthing <emil.renner.berthing@canonical.com>
Signed-off-by: Emil Renner Berthing <kernel@esmil.dk>
Signed-off-by: Hal Feng <hal.feng@starfivetech.com>
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
2023-04-05 15:50:07 +01:00
Emil Renner Berthing
1ff5482ab9 dt-bindings: timer: Add StarFive JH7110 clint
Add compatible string for the StarFive JH7110 clint.

Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Emil Renner Berthing <emil.renner.berthing@canonical.com>
Signed-off-by: Emil Renner Berthing <kernel@esmil.dk>
Signed-off-by: Hal Feng <hal.feng@starfivetech.com>
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
2023-04-05 15:50:02 +01:00
Emil Renner Berthing
3de0c91032 dt-bindings: clock: Add StarFive JH7110 always-on clock and reset generator
Add bindings for the always-on clock and reset generator (AONCRG) on the
JH7110 RISC-V SoC by StarFive Ltd.

Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Reviewed-by: Emil Renner Berthing <emil.renner.berthing@canonical.com>
Signed-off-by: Emil Renner Berthing <kernel@esmil.dk>
Signed-off-by: Hal Feng <hal.feng@starfivetech.com>
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
2023-04-05 15:43:24 +01:00
Emil Renner Berthing
7fce1e39f0 dt-bindings: clock: Add StarFive JH7110 system clock and reset generator
Add bindings for the system clock and reset generator (SYSCRG) on the
JH7110 RISC-V SoC by StarFive Ltd.

Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Reviewed-by: Emil Renner Berthing <emil.renner.berthing@canonical.com>
Signed-off-by: Emil Renner Berthing <kernel@esmil.dk>
Signed-off-by: Hal Feng <hal.feng@starfivetech.com>
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
2023-04-05 15:43:15 +01:00
Ben Dooks
5c0ddb4e71 arm64: tegra: Add vccmq on Jetson TX2
The TX2 SoM's SDIO WiFI card is connected via mmc@3440000 however it does
not look like the upstream kernel is even bothering to power this (and
the regulator framework shuts down this power rail post kernel init).

The issue seems to be a missing link for vccq from the MAX77620 PMIC's LDO5
which is labeled vddio_sdmmc3 (and not used anywhere else) to the mmc@3440000
node to ensure there is at leasr bus power.

Note this does not fix the WiFi issue on upstream kernels, there is still
something else missing that gets the BCM WiFi device to detect properly.

Signed-off-by: Ben Dooks <ben.dooks@codethink.co.uk>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2023-04-05 14:44:46 +02:00
Jon Hunter
16744314ee arm64: tegra: Populate USB Type-C Controller for Jetson AGX Orin
Add the USB Type-C controller that is present on the Jetson AGX Orin
board. The ports for the Type-C controller are not populated yet, but
will be added later once the USB host and device support for Jetson AGX
Orin is enabled.

This is based upon a patch from Wayne Chang <waynec@nvidia.com>.

Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2023-04-05 13:37:27 +02:00
Krzysztof Kozlowski
e154a338e1 dt-bindings: soc: samsung: exynos-pmu: allow phys as child on Exynos3 and Exynos4
Just like on Exynos5250, Exynos5420 and Exynos5433 the MIPI phy is
actually part of the Power Management Unit system controller thus allow
it as PMU's child.

Acked-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20230207192851.549242-1-krzysztof.kozlowski@linaro.org
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2023-04-05 09:52:11 +02:00
Sameer Pujar
b903a6c5aa arm64: tegra: Audio codec support on Jetson AGX Orin
Jetson AGX Orin has onboard RT5640 audio codec. This patch adds the
codec device node and the bindings to I2S1 interface.

Signed-off-by: Sameer Pujar <spujar@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2023-04-04 18:11:50 +02:00
Arnd Bergmann
837be1cc22 Merge tag 'amlogic-arm64-dt-for-v6.4' of https://git.kernel.org/pub/scm/linux/kernel/git/amlogic/linux into soc/dt
Amlogic ARM64 DT changes for v6.4:
- set of DT bindings check fixes
- adjust order of some compatibles to match dt-schema migration
- add support for BananaPi M2S variants
- gxbb-kii-pro: add audio & bluetooth support
- meson-a1: add gpio_intc node
- gxl: use gxl mdio multiplexer
- Add initial support for BPI-CM4 module with BPI-CM4IO baseboard

* tag 'amlogic-arm64-dt-for-v6.4' of https://git.kernel.org/pub/scm/linux/kernel/git/amlogic/linux:
  arm64: dts: amlogic: Add initial support for BPI-CM4 module with BPI-CM4IO baseboard
  dt-bindings: arm: amlogic: Document the boards with the BPI-CM4 connected
  arm64: dts: amlogic: gxl: use gxl mdio multiplexer
  arm64: dts: meson-a1: add gpio_intc node
  arm64: dts: meson: gxbb-kii-pro: add initial audio support
  arm64: dts: meson: gxbb-kii-pro: complete the bluetooth node
  arm64: dts: meson: gxbb-kii-pro: sort and tidy the dts
  arm64: dts: meson: adjust order of some compatibles
  arm64: dts: meson: add support for BananaPi M2S variants
  dt-bindings: arm: amlogic: add support for BananaPi M2S variants
  arm64: dts: amlogic: meson-gxm-s912-libretech-pc: remove unused pinctrl-names from phy node
  arm64: dts: amlogic: meson-sm1: use correct enable-gpios
  arm64: dts: amlogic: meson-s4: fix apb4 bus node name
  arm64: dts: amlogic: meson-g12b-odroid-go-ultra: rename keypad-gpio pinctrl node
  arm64: dts: amlogic: meson-g12b-radxa-zero2: fix pwm clock names
  arm64: dts: amlogic: meson-axg-jethome-jethub-j1xx: remove invalid #gpio-cells in onewire node
  arm64: dts: amlogic: meson-gxm-s912-libretech-pc: add simple connector node in fusb302 node
  arm64: dts: amlogic: meson-sm1-bananapi: correct usb-hub hog node name

Link: https://lore.kernel.org/r/1b955bb7-1a35-8d67-beb6-dd289533ff6f@linaro.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2023-04-04 16:29:42 +02:00
Arnd Bergmann
9514e51932 Merge tag 'amlogic-arm-dt-for-v6.4' of https://git.kernel.org/pub/scm/linux/kernel/git/amlogic/linux into soc/dt
Amlogic ARM DT changes for v6.4:
- adjust order of some compatibles
- meson8: add the xtal_32k_out pin
- meson8: add the SDXC_A pins
- mxiii-plus: Enable Bluetooth and WiFi support

* tag 'amlogic-arm-dt-for-v6.4' of https://git.kernel.org/pub/scm/linux/kernel/git/amlogic/linux:
  ARM: dts: meson8m2: mxiii-plus: Enable Bluetooth and WiFi support
  ARM: dts: meson8: add the SDXC_A pins
  ARM: dts: meson8: add the xtal_32k_out pin
  arm: dts: meson: adjust order of some compatibles

Link: https://lore.kernel.org/r/eb1f32f8-822d-9cfc-fca6-9e044bf4a5ab@linaro.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2023-04-04 16:27:39 +02:00
Neil Armstrong
03216cdbd7 dt-bindings: arm: oxnas: remove obsolete bindings
Due to lack of maintainance and stall of development for a few years now,
and since no new features will ever be added upstream, remove the
OX810 and OX820 SoC and boards bindings.

Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Acked-by: Daniel Golle <daniel@makrotopia.org>
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2023-04-04 16:26:50 +02:00
Neil Armstrong
a9414bef86 ARM: dts: oxnas: remove obsolete device tree files
Due to lack of maintainance and stall of development for a few years now,
and since no new features will ever be added upstream, remove support
for OX810 and OX820 devices.

Acked-by: Linus Walleij <linus.walleij@linaro.org>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Acked-by: Daniel Golle <daniel@makrotopia.org>
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2023-04-04 16:26:39 +02:00
Arnd Bergmann
63d2b92754 Merge tag 'at91-dt-6.4' of git://git.kernel.org/pub/scm/linux/kernel/git/at91/linux into soc/dt
AT91 device tree updates for 6.4:

It contains:
- Update to maximum frequency for QSPI on several boards thanks
  to the additon of the new spi-cs-setup-ns property.

* tag 'at91-dt-6.4' of git://git.kernel.org/pub/scm/linux/kernel/git/at91/linux:
  ARM: dts: at91: sam9x60ek: Set sst26vf064b SPI NOR flash at its maximum frequency
  ARM: dts: at91: sama5d2_icp: Set sst26vf064b SPI NOR flash at its maximum frequency
  ARM: dts: at91-sama5d27_som1: Set sst26vf064b SPI NOR flash at its maximum frequency
  ARM: dts: at91-sama5d27_wlsom1: Set sst26vf064b SPI NOR flash at its maximum frequency

Link: https://lore.kernel.org/r/20230331142751.41522-1-nicolas.ferre@microchip.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2023-04-04 16:24:47 +02:00
Arnd Bergmann
8f9abca2f4 Merge tag 'omap-for-v6.4/dt-overlays-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into soc/dt
Devicetree overlays for omaps for v6.4

Devicetree overlays for omaps to enable the optional LCD and touchscreen
modules on am57xx-evm and am57xx-idk boards.

* tag 'omap-for-v6.4/dt-overlays-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
  ARM: dts: am57xx-idk: Add IDK displays and touchscreens
  ARM: dts: ti: Add AM57xx GP EVM Rev A3 board support
  ARM: dts: ti: Add AM57xx GP EVM board support

Link: https://lore.kernel.org/r/pull-1680180448-508978@atomide.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2023-04-04 16:20:32 +02:00
Arnd Bergmann
c2f714150b Merge tag 'omap-for-v6.4/dt-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into soc/dt
Devicetree changes for omaps for v6.4

Devicetree changes for omaps for gta04, Phytec am335x devices, and to
drop a obsolete compatible property:

- A non-urgent fix for gta04 to enable more dma channels for some audio
  configurations

- Update the dts compatible and vendor prefixes for gta04

- A series of updates for Phytec am335x based boards to configure more
  devices like rtc and audio, and a few clean-up patches

- A change to drop the usage of "ti,omap36xx" compatible, the driver
  code already checks for "ti,omap3630" that is also alread set in the
  dts files. This makes the yaml binding conversion a bit simpler.

* tag 'omap-for-v6.4/dt-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
  ARM: dts: omap: Drop ti,omap36xx compatible
  ARM: dts: am335x-phycore-som: Remove superseded/invalid GPMC NAND type.
  ARM: dts: am335x-pcm-953: Remove superseded/invalid LED trigger.
  ARM: dts: am335x-phycore-som: Remove underscore in node names.
  ARM: dts: am335x-regor: Remove underscore in node names.
  ARM: dts: am335x-pcm-935: Remove underscore in node names.
  ARM: dts: am335x-wega: Change node name of sound card, remove underscores.
  ARM: dts: am335x-wega: Fix audio codec by using simple-audio-card driver.
  ARM: dts: am335x-phycore-som: Add alias for TPS65910 RTC
  ARM: dts: omap3-gta04: fix compatible record for GTA04 board
  ARM: dts: gta04: fix excess dma channel usage

Link: https://lore.kernel.org/r/pull-1680180389-756753@atomide.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2023-04-04 16:19:30 +02:00
Arnd Bergmann
d707810efa Merge tag 'renesas-dts-for-v6.4-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel into soc/dt
Renesas DTS updates for v6.4

  - Add USB3 support for the RZ/V2M SoC and the RZ/V2M Evaluation Kit 2.0,
  - Add uSD card and eMMC support for the  RZ/V2M Evaluation Kit 2.0,
  - Add CAN-FD, thermal, GMSL2 video capture, and sound support for the
    R-Car V4H SoC and the White-Hawk development board,
  - Add PMU support for the RZ/G2UL, RZ/G2L{,C}, and RZ/V2L SoCs,
  - Drop support for the obsolete R-Car H3 ES1.* (R8A77950) SoC,
  - Add I2C EEPROM support for the Atmark Techno Armadillo-800-EVA, and
    the Renesas Condor and ULCB development boards,
  - Miscellaneous fixes and improvements.

* tag 'renesas-dts-for-v6.4-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel: (30 commits)
  arm64: dts: renesas: r8a779a0: Update CAN-FD to R-Car Gen4 compatible value
  arm64: dts: renesas: ulcb: Add I2C EEPROM for PMIC
  arm64: dts: renesas: condor: Add I2C EEPROM for PMIC
  ARM: dts: armadillo800eva: Add I2C EEPROM for MAC address
  arm64: dts: renesas: Remove R-Car H3 ES1.* devicetrees
  arm64: dts: renesas: white-hawk: Add R-Car Sound support
  arm64: dts: renesas: r8a779g0: R-Car Sound support
  arm64: dts: renesas: r9a07g043: Update IRQ numbers for SSI channels
  arm64: dts: renesas: r9a07g054: Update IRQ numbers for SSI channels
  arm64: dts: renesas: r9a07g044: Update IRQ numbers for SSI channels
  arm64: dts: renesas: r8a774c0: Remove bogus voltages from OPP table
  arm64: dts: renesas: r8a77990: Remove bogus voltages from OPP table
  arm64: dts: renesas: r9a07g054: Add Cortex-A55 PMU node
  arm64: dts: renesas: white-hawk-csi-dsi: Add and connect MAX96712
  arm64: dts: renesas: r8a779g0: Add and connect all CSI-2, ISP and VIN nodes
  arm64: dts: renesas: r8a779f0: Use proper labels for thermal zones
  arm64: dts: renesas: r8a779g0: Add thermal nodes
  arm64: dts: renesas: rzv2mevk2: Add uart0 pins
  arm64: dts: renesas: Drop specifying the GIC_CPU_MASK_SIMPLE() for GICv3 systems
  arm64: dts: renesas: r9a07g044: Add Cortex-A55 PMU node
  ...

Link: https://lore.kernel.org/r/cover.1679907064.git.geert+renesas@glider.be
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2023-04-04 16:17:15 +02:00
Arnd Bergmann
5b9d72921f Merge tag 'renesas-dt-bindings-for-v6.4-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel into soc/dt
Renesas DT binding updates for v6.4

  - Document support for the Renesas RZ/N1 EB board with an RZ/N1D-DB
    daughter board,
  - Drop support for the obsolete R-Car H3 ES1.* (R8A77950) SoC.

* tag 'renesas-dt-bindings-for-v6.4-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel:
  dt-bindings: soc: renesas: Remove R-Car H3 ES1.*
  dt-bindings: soc: renesas: renesas.yaml: Add renesas,rzn1d400-eb compatible

Link: https://lore.kernel.org/r/cover.1679907062.git.geert+renesas@glider.be
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2023-04-04 16:16:19 +02:00
Rob Herring
c94673e803 dt-bindings: arm: nvidia: Drop unneeded quotes
Cleanup bindings dropping unneeded quotes. Once all these are fixed,
checking for this can be enabled in yamllint.

Signed-off-by: Rob Herring <robh@kernel.org>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2023-04-04 15:32:11 +02:00
Maxim Schwalm
13a53ebc22 ARM: tegra30: Use cpu* labels
Replace cpu paths with labels since those already exist in tree.

Signed-off-by: Maxim Schwalm <maxim.schwalm@gmail.com>
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2023-04-04 14:32:48 +02:00
Svyatoslav Ryhel
b3f65f4530 ARM: tegra30: peripherals: Add 266.5MHz nodes
LG Optimus Vu (p895) and Optimus 4X HD (p880) have 266.5MHz RAM
clock and require this entry to work with it correctly.

Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2023-04-04 14:32:21 +02:00
Svyatoslav Ryhel
62a4276877 ARM: tegra: asus-tf101: Fix accelerometer mount matrix
Accelerometer mount matrix used in tf101 downstream is inverted.
This new matrix was generated on actual device using calibration
script, like on other transformers.

Tested-by: Robert Eckelmann <longnoserob@gmail.com>
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2023-04-04 14:32:07 +02:00
Thierry Reding
e63472eda5 arm64: tegra: Support Jetson Orin NX reference platform
Add support for the combination of the NVIDIA Jetson Orin NX (P3767, SKU
0) module and the P3768 carrier board.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2023-04-04 13:19:41 +02:00
Thierry Reding
13b0aca303 arm64: tegra: Support Jetson Orin NX
This adds a device tree for the Jetson Orin NX module, which is Jetson
AGX Orin's little sibling with 6 or 8 ARM Cortex-A78AE cores, an Ampere
GPU (1024 GPU and 32 tensor cores) and a number of accelerators for
machine learning, image processing and more.

The Jetson Orin NX comes with either 8 or 16 GiB of 128-bit LPDDR5 and
supports NVME for mass storage.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2023-04-04 13:19:40 +02:00
Thierry Reding
d89baa5292 dt-bindings: tegra: Document Jetson Orin NX reference platform
Document the combination of the P3768 carrier board with the P3767
(Jetson Orin NX) module.

Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2023-04-04 13:19:40 +02:00
Thierry Reding
062dfd995e dt-bindings: tegra: Document Jetson Orin NX
The Jetson Orin NX is the latest iteration in the NX family of Jetson
products. Document the compatible strings used for these devices.

Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2023-04-04 13:19:40 +02:00
Henrik Grimler
3ddba33dc2 ARM: dts: exynos: add mmc aliases
Add aliases for eMMC, SD card and WiFi where applicable, so that
assigned mmc indeces are always the same.

Co-developed-by: Anton Bambura <jenneron@protonmail.com>
Signed-off-by: Anton Bambura <jenneron@protonmail.com>
[ Tested on exynos5800-peach-pi ]
Tested-by: Valentine Iourine <iourine@iourine.msk.su>
Signed-off-by: Henrik Grimler <henrik@grimler.se>
Tested-by: Marek Szyprowski <m.szyprowski@samsung.com>
Link: https://lore.kernel.org/r/20230402144724.17839-3-henrik@grimler.se
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2023-04-03 18:16:55 +02:00
Henrik Grimler
37f9514e61 ARM: dts: exynos: replace mshc0 alias with mmc-ddr-1_8v property
Previously, the mshc0 alias has been necessary so that
MMC_CAP_1_8V_DDR | MMC_CAP_8_BIT_DATA are set for mshc_0/mmc_0.
However, these capabilities should be described in the device tree so
that we do not have to rely on the alias.

The property mmc-ddr-1_8v replaces MMC_CAP_1_8V_DDR, while bus_width =
<8>, which is already set for all the mshc0/mmc0 nodes, replaces
MMC_CAP_8_BIT_DATA.

Also drop other mshc aliases as they are not needed.

Signed-off-by: Henrik Grimler <henrik@grimler.se>
Tested-by: Marek Szyprowski <m.szyprowski@samsung.com>
Link: https://lore.kernel.org/r/20230402144724.17839-2-henrik@grimler.se
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2023-04-03 18:16:49 +02:00
Jon Hunter
8e0ae0fb4b arm64: tegra: Add DSU PMUs for Tegra234
Populate the DynamIQ Shared Unit (DSU) Performance Monitor Unit (PMU)
devices for Tegra234 which has one DSU PMU per CPU cluster.

Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2023-04-03 17:01:20 +02:00
Krzysztof Kozlowski
71de0a054d arm64: tegra: Drop serial clock-names and reset-names
The serial node does not use clock-names and reset-names:

  tegra234-sim-vdk.dtb: serial@3100000: Unevaluated properties are not allowed ('clock-names', 'reset-names' were unexpected)

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2023-04-03 17:01:20 +02:00
Tudor Ambarus
2c0a1faa4d ARM: dts: at91: sam9x60ek: Set sst26vf064b SPI NOR flash at its maximum frequency
sam9x60ek populates an sst26vf064b SPI NOR flash. Its maximum operating
frequency for 2.7-3.6V is 104 MHz. As the flash is operated at 3.3V,
increase its maximum supported frequency to 104MHz. The increasing of the
spi-max-frequency value requires the setting of the
"CE# Not Active Hold Time", thus set the spi-cs-setup-ns to a value of 7.

The sst26vf064b datasheet specifies just a minimum value for the
"CE# Not Active Hold Time" and it advertises it to 5 ns. There's no
maximum time specified. I determined experimentally that 5 ns for the
spi-cs-setup-ns is not enough when the flash is operated close to its
maximum frequency and tests showed that 7 ns is just fine, so set the
spi-cs-setup-ns dt property to 7.

With the increase of frequency the reads are now faster with ~33%.

Signed-off-by: Tudor Ambarus <tudor.ambarus@linaro.org>
Link: https://lore.kernel.org/r/20230328101517.1595738-5-tudor.ambarus@linaro.org
Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
2023-03-30 21:20:59 +02:00
Tudor Ambarus
46a8a137d8 ARM: dts: at91: sama5d2_icp: Set sst26vf064b SPI NOR flash at its maximum frequency
sama5d2_icp populates an sst26vf064b SPI NOR flash. Its maximum operating
frequency for 2.7-3.6V is 104 MHz. As the flash is operated at 3.3V,
increase its maximum supported frequency to 104MHz. The increasing of the
spi-max-frequency value requires the setting of the
"CE# Not Active Hold Time", thus set the spi-cs-setup-ns to a value of 7.

The sst26vf064b datasheet specifies just a minimum value for the
"CE# Not Active Hold Time" and it advertises it to 5 ns. There's no
maximum time specified. I determined experimentally that 5 ns for the
spi-cs-setup-ns is not enough when the flash is operated close to its
maximum frequency and tests showed that 7 ns is just fine, so set the
spi-cs-setup-ns dt property to 7.

With the increase of frequency the reads are now faster with ~37%.

Signed-off-by: Tudor Ambarus <tudor.ambarus@linaro.org>
Tested-by: Nicolas Ferre <nicolas.ferre@microchip.com> # on sama5d2 ICP
Link: https://lore.kernel.org/r/20230328101517.1595738-4-tudor.ambarus@linaro.org
Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
2023-03-30 21:20:59 +02:00
Tudor Ambarus
09ce865122 ARM: dts: at91-sama5d27_som1: Set sst26vf064b SPI NOR flash at its maximum frequency
sama5d27-som1 populates an sst26vf064b SPI NOR flash. Its maximum
operating frequency for 2.7-3.6V is 104 MHz. As the flash is operated
at 3.3V, increase its maximum supported frequency to 104MHz. The
increasing of the spi-max-frequency value requires the setting of the
"CE# Not Active Hold Time", thus set the spi-cs-setup-ns to a value of 7.

The sst26vf064b datasheet specifies just a minimum value for the
"CE# Not Active Hold Time" and it advertises it to 5 ns. There's no
maximum time specified. I determined experimentally that 5 ns for the
spi-cs-setup-ns is not enough when the flash is operated close to its
maximum frequency and tests showed that 7 ns is just fine, so set the
spi-cs-setup-ns dt property to 7.

With the increase of frequency the reads are now faster with ~37%.

Signed-off-by: Tudor Ambarus <tudor.ambarus@linaro.org>
Link: https://lore.kernel.org/r/20230328101517.1595738-3-tudor.ambarus@linaro.org
Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
2023-03-30 21:20:59 +02:00
Tudor Ambarus
417e58ea41 ARM: dts: at91-sama5d27_wlsom1: Set sst26vf064b SPI NOR flash at its maximum frequency
sama5d27-wlsom1 populates an sst26vf064b SPI NOR flash. Its maximum
operating frequency for 2.7-3.6V is 104 MHz. As the flash is operated
at 3.3V, increase its maximum supported frequency to 104MHz. The
increasing of the spi-max-frequency value requires the setting of the
"CE# Not Active Hold Time", thus set the spi-cs-setup-ns to a value of 7.

The sst26vf064b datasheet specifies just a minimum value for the
"CE# Not Active Hold Time" and it advertises it to 5 ns. There's no
maximum time specified. I determined experimentally that 5 ns for the
spi-cs-setup-ns is not enough when the flash is operated close to its
maximum frequency and tests showed that 7 ns is just fine, so set the
spi-cs-setup-ns dt property to 7.

With the increase of frequency the reads are now faster with ~37%.

Signed-off-by: Tudor Ambarus <tudor.ambarus@linaro.org>
Link: https://lore.kernel.org/r/20230328101517.1595738-2-tudor.ambarus@linaro.org
Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
2023-03-30 21:20:59 +02:00
Svyatoslav Ryhel
e9e17bcd55 ARM: tegra: transformers: Bind RT5631 sound nodes
TF201, TF300TG and TF700T support RT5631 codec.

Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2023-03-28 13:18:42 +02:00
Svyatoslav Ryhel
2b48106419 ARM: tegra: transformers: Update WM8903 sound nodes
Fix headset detection and use device GPIO microphone detection on WM8903
Transformers.

Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2023-03-28 13:17:43 +02:00
Janne Grunau
8d59efc33f arm64: dts: apple: t600x: Disable unused PCIe ports
The PCIe ports are unused (without devices) so disable them instead of
removing them.

Signed-off-by: Janne Grunau <j@jannau.net>
Reviewed-by: Sven Peter <sven@svenpeter.dev>
Signed-off-by: Hector Martin <marcan@marcan.st>
2023-03-28 20:07:02 +09:00
Janne Grunau
a0189fdfb7 arm64: dts: apple: t8103: Disable unused PCIe ports
The PCIe ports are unused (without devices) so disable them instead of
removing them.

Fixes: 7c77ab91b3 ("arm64: dts: apple: Add missing M1 (t8103) devices")
Signed-off-by: Janne Grunau <j@jannau.net>
Reviewed-by: Sven Peter <sven@svenpeter.dev>
Signed-off-by: Hector Martin <marcan@marcan.st>
2023-03-28 20:06:53 +09:00
Hector Martin
2d5ce3fbef arm64: dts: apple: t8112: Initial t8112 (M2) device trees
This adds device trees for the following devices:
 - Macbook Air (M2, 2022)
 - Macbook Pro 13" (M2, 2022)
 - Mac mini (M2, 2023)

This brings the hardware support of the machines to the same level as M1
and M1 Pro / Max / Ultra. Supported hardware include NVMe, PCIe, serial,
pinctrl/gpio, I2C, iommu, watchdog, admac, nco, cpufreq, boot
framebuffer for laptop panels and the interrupt controller.

The ethernet LAN device on the M2 Mac mini is the only working PCIe
device. The Wlan/BT devices are powered off and controlled by the not
yet supported SMC. The ASMedia xHCI on the M2 Mac mini requires firmware
to be loaded at startup.

The main missing hardware support to make these devices useful are the
integrated USB 2/3/4 controller, keyboard and trackpad on the laptops
and SMC to power the PCIe Wlan/BT device on.
The M2 Mac mini has currently no working display output. Due to changes
in the display pipeline it is currently not possible to initialize the
HDMI output in the bootloader.

Co-developed-by: Janne Grunau <j@jannau.net>
Signed-off-by: Janne Grunau <j@jannau.net>
Reviewed-by: Sven Peter <sven@svenpeter.dev>
Signed-off-by: Hector Martin <marcan@marcan.st>
2023-03-28 19:39:30 +09:00