Marijn Suijten
cd188d68db
dt-bindings: display/msm: Add SM6125 MDSS
...
Document the SM6125 MDSS.
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org >
Signed-off-by: Marijn Suijten <marijn.suijten@somainline.org >
Patchwork: https://patchwork.freedesktop.org/patch/548976/
Link: https://lore.kernel.org/r/20230723-sm6125-dpu-v4-9-a3f287dd6c07@somainline.org
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org >
2023-07-27 16:33:44 +03:00
Marijn Suijten
8225df64fc
dt-bindings: display/msm: sc7180-dpu: Describe SM6125
...
SM6125 is identical to SM6375 including the throttle clock that is also
provided to the MDP node downstream. Note that any SoC other than
SM6375 (currently SC7180 and SM6350) has an unconstrained maximum number
of clocks and could either pass or leave out this "throttle" clock.
Signed-off-by: Marijn Suijten <marijn.suijten@somainline.org >
Patchwork: https://patchwork.freedesktop.org/patch/548972/
Link: https://lore.kernel.org/r/20230723-sm6125-dpu-v4-8-a3f287dd6c07@somainline.org
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org >
2023-07-27 16:33:44 +03:00
Marijn Suijten
bb49fa7051
dt-bindings: display/msm: dsi-controller-main: Document SM6125
...
Document general compatibility of the DSI controller on SM6125.
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org >
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org >
Signed-off-by: Marijn Suijten <marijn.suijten@somainline.org >
Patchwork: https://patchwork.freedesktop.org/patch/548968/
Link: https://lore.kernel.org/r/20230723-sm6125-dpu-v4-7-a3f287dd6c07@somainline.org
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org >
2023-07-27 16:33:44 +03:00
Marijn Suijten
3a06fa8e51
dt-bindings: clock: qcom, dispcc-sm6125: Allow power-domains property
...
On SM6125 the dispcc block is gated behind VDDCX: allow this domain to
be configured.
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org >
Signed-off-by: Marijn Suijten <marijn.suijten@somainline.org >
Patchwork: https://patchwork.freedesktop.org/patch/548970/
Link: https://lore.kernel.org/r/20230723-sm6125-dpu-v4-6-a3f287dd6c07@somainline.org
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org >
2023-07-27 16:33:44 +03:00
Marijn Suijten
3b3e71f07d
dt-bindings: clock: qcom, dispcc-sm6125: Require GCC PLL0 DIV clock
...
The "gcc_disp_gpll0_div_clk_src" clock is consumed by the driver, will
be passed from DT, and should be required by the bindings.
Fixes: 8397c9c0c2 ("dt-bindings: clock: add QCOM SM6125 display clock bindings")
Reviewed-by: Rob Herring <robh@kernel.org >
Signed-off-by: Marijn Suijten <marijn.suijten@somainline.org >
Patchwork: https://patchwork.freedesktop.org/patch/548966/
Link: https://lore.kernel.org/r/20230723-sm6125-dpu-v4-5-a3f287dd6c07@somainline.org
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org >
2023-07-27 16:33:44 +03:00
Marijn Suijten
dcfc49a5b1
dt-bindings: display/msm: Remove DSI1 ports from SM6350/SM6375 example
...
Both SM6350 and SM6375 support only a single DSI link, and don't have a
corresponding dsi1 node in DTS. Their examples should not suggest an
output interface port on the display-controller node to this inexistant
DSI host, with a dsi1_in label reference that doesn't exist in the
example either.
Fixes: 3b7502b0c2 ("dt-bindings: display/msm: Add SM6350 MDSS")
Fixes: 2a5c1021bc ("dt-bindings: display/msm: Add SM6375 MDSS")
Signed-off-by: Marijn Suijten <marijn.suijten@somainline.org >
Acked-by: Rob Herring <robh@kernel.org >
Patchwork: https://patchwork.freedesktop.org/patch/548961/
Link: https://lore.kernel.org/r/20230723-sm6125-dpu-v4-4-a3f287dd6c07@somainline.org
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org >
2023-07-27 16:33:44 +03:00
Marijn Suijten
a7e3fda594
drm/msm/dsi: Drop unused regulators from QCM2290 14nm DSI PHY config
...
The regulator setup was likely copied from other SoCs by mistake. Just
like SM6125 the DSI PHY on this platform is not getting power from a
regulator but from the MX power domain.
Fixes: 572e9fd6d1 ("drm/msm/dsi: Add phy configuration for QCM2290")
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org >
Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com >
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org >
Signed-off-by: Marijn Suijten <marijn.suijten@somainline.org >
Patchwork: https://patchwork.freedesktop.org/patch/548959/
Link: https://lore.kernel.org/r/20230723-sm6125-dpu-v4-1-a3f287dd6c07@somainline.org
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org >
2023-07-27 15:17:10 +03:00
Abhinav Kumar
781452286a
drm/msm/dpu: drop DPU_INTF_DATA_COMPRESS from dpu catalog
...
Now that all usages of DPU_INTF_DATA_COMPRESS have been replaced
with the dpu core's major revision lets drop DPU_INTF_DATA_COMPRESS
from the catalog completely.
Signed-off-by: Abhinav Kumar <quic_abhinavk@quicinc.com >
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org >
Patchwork: https://patchwork.freedesktop.org/patch/546808/
Link: https://lore.kernel.org/r/20230712012003.2212-6-quic_abhinavk@quicinc.com
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org >
2023-07-27 15:17:07 +03:00
Abhinav Kumar
143dfccad3
drm/msm/dpu: rename enable_compression() to program_intf_cmd_cfg()
...
Rename the intf's enable_compression() op to program_intf_cmd_cfg()
and allow it to accept a struct intf_cmd_mode_cfg to program
all the bits at once. This can be re-used by widebus later on as
well as it touches the same register.
changes in v5:
- rename struct intf_cmd_mode_cfg to dpu_hw_intf_cmd_mode_cfg
- remove couple of comments
Signed-off-by: Abhinav Kumar <quic_abhinavk@quicinc.com >
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org >
Patchwork: https://patchwork.freedesktop.org/patch/546806/
Link: https://lore.kernel.org/r/20230712012003.2212-5-quic_abhinavk@quicinc.com
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org >
2023-07-27 15:17:07 +03:00
Abhinav Kumar
4c6df9a40b
drm/msm/dpu: rename all hw_intf structs to have dpu_hw prefix
...
dpu_hw_intf has a few instances of structs which do not have
the dpu_hw prefix. Lets fix this by renaming those structs
and updating the usage of those accordingly.
Signed-off-by: Abhinav Kumar <quic_abhinavk@quicinc.com >
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org >
Patchwork: https://patchwork.freedesktop.org/patch/546805/
Link: https://lore.kernel.org/r/20230712012003.2212-4-quic_abhinavk@quicinc.com
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org >
2023-07-27 15:17:07 +03:00
Abhinav Kumar
51e9b25c78
drm/msm/dpu: use dpu core's major version to enable data compress
...
Instead of using a feature bit to decide whether to enable data
compress or not for DSC use-cases, use dpu core's major version
instead by assigning the enable_compression op based on the
dpu core's major version.
To make this possible pass the struct dpu_mdss_version to
dpu_hw_intf_init().
This will avoid defining feature bits for every bit level details of
registers.
changes in v5:
- none
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org >
Signed-off-by: Abhinav Kumar <quic_abhinavk@quicinc.com >
Patchwork: https://patchwork.freedesktop.org/patch/546803/
Link: https://lore.kernel.org/r/20230712012003.2212-3-quic_abhinavk@quicinc.com
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org >
2023-07-27 15:17:07 +03:00
Abhinav Kumar
d5ffd30bf1
drm/msm/dpu: re-introduce dpu core revision to the catalog
...
Introduce the dpu core revision back as an entry to the catalog so that
we can just use dpu revision checks and enable those bits which
should be enabled unconditionally and not controlled by a catalog
and also simplify the changes to do something like:
if (dpu_core_revision > xxxxx && dpu_core_revision < xxxxx)
enable the bit;
changes in v5:
- fix the commit text to remove instances of DPU_HW_VER
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org >
Signed-off-by: Abhinav Kumar <quic_abhinavk@quicinc.com >
Patchwork: https://patchwork.freedesktop.org/patch/546801/
Link: https://lore.kernel.org/r/20230712012003.2212-2-quic_abhinavk@quicinc.com
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org >
2023-07-27 15:17:07 +03:00
Jessica Zhang
b173a7dcc2
drm/msm/dsi: Enable BURST_MODE for command mode for DSI 6G v1.3+
...
During a frame transfer in command mode, there could be frequent
LP11 <-> HS transitions when multiple DCS commands are sent mid-frame or
if the DSI controller is running on slow clock and is throttled. To
minimize frame latency due to these transitions, it is recommended to
send the frame in a single burst.
This feature is supported for DSI 6G 1.3 and above, thus enable burst
mode if supported.
Signed-off-by: Jessica Zhang <quic_jesszhan@quicinc.com >
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org >
Patchwork: https://patchwork.freedesktop.org/patch/544551/
Link: https://lore.kernel.org/r/20230608-b4-add-burst-mode-v2-1-2ff468457d46@quicinc.com
[DB: fixed indentation]
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org >
2023-07-27 14:59:15 +03:00
Dmitry Baryshkov
cc9a79715a
dt-bindings: display: msm: dp-controller: document SM8250 compatible
...
It looks like DP controlled on SM8250 is the same as DP controller on
SM8350. Use the SM8350 compatible as fallback for SM8250.
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org >
Reviewed-by: Bjorn Andersson <andersson@kernel.org >
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org >
Patchwork: https://patchwork.freedesktop.org/patch/546242/
Link: https://lore.kernel.org/r/20230709041926.4052245-2-dmitry.baryshkov@linaro.org
2023-07-27 14:59:15 +03:00
Ryan McCann
61e44a5b9b
drm/msm/dpu: Update dev core dump to dump registers of sub-blocks
...
Currently, the device core dump mechanism does not dump registers of
sub-blocks within the DSPP, SSPP, DSC, and PINGPONG blocks. Edit
dpu_kms_mdp_snapshot function to account for sub-blocks.
Signed-off-by: Ryan McCann <quic_rmccann@quicinc.com >
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org >
Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com >
Patchwork: https://patchwork.freedesktop.org/patch/546192/
Link: https://lore.kernel.org/r/20230622-devcoredump_patch-v5-6-67e8b66c4723@quicinc.com
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org >
2023-07-27 14:59:15 +03:00
Ryan McCann
ec059976c1
drm/msm/dpu: Refactor printing of main blocks in device core dump
...
Currently, the names of main blocks are hardcoded into the
msm_disp_snapshot_add_block function rather than using the name that
already exists in the catalog. Change this to take the name directly from
the catalog instead of hardcoding it.
Signed-off-by: Ryan McCann <quic_rmccann@quicinc.com >
Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com >
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org >
Patchwork: https://patchwork.freedesktop.org/patch/546194/
Link: https://lore.kernel.org/r/20230622-devcoredump_patch-v5-5-67e8b66c4723@quicinc.com
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org >
2023-07-27 14:59:15 +03:00
Ryan McCann
274909a85e
drm/msm/dpu: Remove redundant prefix/suffix in name of sub-blocks
...
For a device core dump, the registers of sub-blocks are printed under a
title formatted as <mainBlkName_sblkName>. For example, the csc sub-block
for an SSPP main block "sspp_0" would be printed "sspp_0_sspp_csc0". The
title is clearly redundant due to the duplicate "sspp" and "0" that exist
in both the mainBlkName and sblkName. To eliminate this redundancy, remove
the secondary "sspp" and "0" that exist in the sub-block name by
elimanting the "sspp_" prefix and the concatenation of "num" that results
in the redundant "0" suffix. Remove num parameter altogether from relevant
macros as a consequence of it no longer being used.
Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com >
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org >
Signed-off-by: Ryan McCann <quic_rmccann@quicinc.com >
Patchwork: https://patchwork.freedesktop.org/patch/546198/
Link: https://lore.kernel.org/r/20230622-devcoredump_patch-v5-4-67e8b66c4723@quicinc.com
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org >
2023-07-27 14:59:14 +03:00
Ryan McCann
46998bf843
drm/msm/dpu: Define names for unnamed sblks
...
Some sub-blocks in the hw catalog have not been given a name, so when the
registers from that block are dumped, there is no name to reference.
Define names for relevant sub-blocks to fix this.
Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com >
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org >
Signed-off-by: Ryan McCann <quic_rmccann@quicinc.com >
Patchwork: https://patchwork.freedesktop.org/patch/546199/
Link: https://lore.kernel.org/r/20230622-devcoredump_patch-v5-3-67e8b66c4723@quicinc.com
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org >
2023-07-27 14:58:56 +03:00
Ryan McCann
1071a22c0d
drm/msm/dpu: Drop unused num argument from relevant macros
...
Drop unused parameter "num" from VIG_SBLK_NOSCALE and DMA sub-block
macros. Update calls to relevant macros to reflect change.
Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com >
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org >
Signed-off-by: Ryan McCann <quic_rmccann@quicinc.com >
Patchwork: https://patchwork.freedesktop.org/patch/546196/
Link: https://lore.kernel.org/r/20230622-devcoredump_patch-v5-2-67e8b66c4723@quicinc.com
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org >
2023-07-27 14:58:56 +03:00
Ryan McCann
903705111d
drm/msm: Update dev core dump to not print backwards
...
Device core dump add block method adds hardware blocks to dumping queue
with stack behavior which causes the hardware blocks to be printed in
reverse order. Change the addition to dumping queue data structure
from "list_add" to "list_add_tail" for FIFO queue behavior.
Fixes: 98659487b8 ("drm/msm: add support to take dpu snapshot")
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org >
Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com >
Signed-off-by: Ryan McCann <quic_rmccann@quicinc.com >
Patchwork: https://patchwork.freedesktop.org/patch/546200/
Link: https://lore.kernel.org/r/20230622-devcoredump_patch-v5-1-67e8b66c4723@quicinc.com
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org >
2023-07-27 14:58:56 +03:00
Dmitry Baryshkov
1fe519aad8
drm/msm/dpu: drop empty features mask INTF_SDM845_MASK
...
The INTF_SDM845_MASK features mask is zero. Drop it completely.
Reviewed-by: Marijn Suijten <marijn.suijten@somainline.org >
Tested-by: Marijn Suijten <marijn.suijten@somainline.org >
Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com >
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org >
Patchwork: https://patchwork.freedesktop.org/patch/545386/
Link: https://lore.kernel.org/r/20230704022136.130522-20-dmitry.baryshkov@linaro.org
2023-07-11 19:26:46 +03:00
Dmitry Baryshkov
48cbbe7c76
drm/msm/dpu: drop empty features mask MERGE_3D_SM8150_MASK
...
The MERGE_3D_SM8150_MASK features mask is zero. Drop it completely.
Reviewed-by: Marijn Suijten <marijn.suijten@somainline.org >
Tested-by: Marijn Suijten <marijn.suijten@somainline.org >
Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com >
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org >
Patchwork: https://patchwork.freedesktop.org/patch/545384/
Link: https://lore.kernel.org/r/20230704022136.130522-19-dmitry.baryshkov@linaro.org
2023-07-11 19:26:46 +03:00
Dmitry Baryshkov
ed4fa8c60e
drm/msm/dpu: inline INTF_BLK and INTF_BLK_DSI_TE macros
...
To simplify making changes to the hardware block definitions, expand
corresponding macros. This way making all the changes are more obvious
and visible in the source files.
Tested-by: Marijn Suijten <marijn.suijten@somainline.org >
Reviewed-by: Marijn Suijten <marijn.suijten@somainline.org >
Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com >
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org >
Patchwork: https://patchwork.freedesktop.org/patch/545378/
Link: https://lore.kernel.org/r/20230704022136.130522-18-dmitry.baryshkov@linaro.org
2023-07-11 19:26:46 +03:00
Dmitry Baryshkov
36e2ad1d72
drm/msm/dpu: inline WB_BLK macros
...
To simplify making changes to the hardware block definitions, expand
corresponding macros. This way making all the changes are more obvious
and visible in the source files.
Tested-by: Marijn Suijten <marijn.suijten@somainline.org >
Reviewed-by: Marijn Suijten <marijn.suijten@somainline.org >
Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com >
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org >
Patchwork: https://patchwork.freedesktop.org/patch/545380/
Link: https://lore.kernel.org/r/20230704022136.130522-17-dmitry.baryshkov@linaro.org
2023-07-11 19:26:46 +03:00
Dmitry Baryshkov
35973be887
drm/msm/dpu: inline various PP_BLK_* macros
...
To simplify making changes to the hardware block definitions, expand
corresponding macros. This way making all the changes are more obvious
and visible in the source files.
Tested-by: Marijn Suijten <marijn.suijten@somainline.org >
Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com >
Reviewed-by: Marijn Suijten <marijn.suijten@somainline.org >
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org >
Patchwork: https://patchwork.freedesktop.org/patch/545371/
Link: https://lore.kernel.org/r/20230704022136.130522-16-dmitry.baryshkov@linaro.org
2023-07-11 19:26:45 +03:00
Dmitry Baryshkov
4fe37d2dbb
drm/msm/dpu: inline MERGE_3D_BLK macros
...
To simplify making changes to the hardware block definitions, expand
corresponding macros. This way making all the changes are more obvious
and visible in the source files.
Tested-by: Marijn Suijten <marijn.suijten@somainline.org >
Reviewed-by: Marijn Suijten <marijn.suijten@somainline.org >
Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com >
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org >
Patchwork: https://patchwork.freedesktop.org/patch/545382/
Link: https://lore.kernel.org/r/20230704022136.130522-15-dmitry.baryshkov@linaro.org
2023-07-11 19:26:45 +03:00
Dmitry Baryshkov
194347df58
drm/msm/dpu: inline DSC_BLK and DSC_BLK_1_2 macros
...
To simplify making changes to the hardware block definitions, expand
corresponding macros. This way making all the changes are more obvious
and visible in the source files.
Tested-by: Marijn Suijten <marijn.suijten@somainline.org >
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org >
Patchwork: https://patchwork.freedesktop.org/patch/545370/
Link: https://lore.kernel.org/r/20230704022136.130522-14-dmitry.baryshkov@linaro.org
2023-07-11 19:26:45 +03:00
Dmitry Baryshkov
8d3e0dd0f7
drm/msm/dpu: inline LM_BLK macros
...
To simplify making changes to the hardware block definitions, expand
corresponding macros. This way making all the changes are more obvious
and visible in the source files.
Tested-by: Marijn Suijten <marijn.suijten@somainline.org >
Reviewed-by: Marijn Suijten <marijn.suijten@somainline.org >
Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com >
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org >
Patchwork: https://patchwork.freedesktop.org/patch/545362/
Link: https://lore.kernel.org/r/20230704022136.130522-13-dmitry.baryshkov@linaro.org
2023-07-11 19:26:45 +03:00
Dmitry Baryshkov
e28db02156
drm/msm/dpu: inline DSPP_BLK macros
...
To simplify making changes to the hardware block definitions, expand
corresponding macros. This way making all the changes are more obvious
and visible in the source files.
Tested-by: Marijn Suijten <marijn.suijten@somainline.org >
Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com >
Reviewed-by: Marijn Suijten <marijn.suijten@somainline.org >
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org >
Patchwork: https://patchwork.freedesktop.org/patch/545359/
Link: https://lore.kernel.org/r/20230704022136.130522-12-dmitry.baryshkov@linaro.org
2023-07-11 19:26:41 +03:00
Dmitry Baryshkov
ef7d0e8dd3
drm/msm/dpu: inline SSPP_BLK macros
...
To simplify making changes to the hardware block definitions, expand
corresponding macros. This way making all the changes are more obvious
and visible in the source files.
Tested-by: Marijn Suijten <marijn.suijten@somainline.org >
Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com >
Reviewed-by: Marijn Suijten <marijn.suijten@somainline.org >
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org >
Patchwork: https://patchwork.freedesktop.org/patch/545377/
Link: https://lore.kernel.org/r/20230704022136.130522-11-dmitry.baryshkov@linaro.org
2023-07-11 18:20:52 +03:00
Dmitry Baryshkov
2a6387e2f1
drm/msm/dpu: correct indentation for CTL definitions
...
Shift dpu_ctl_cfg contents to correct the indentation of CTL blocks.
This is done in preparation to expanding the rest of hardware block
defines, so that all blocks have similar indentation.
Reviewed-by: Marijn Suijten <marijn.suijten@somainline.org >
Tested-by: Marijn Suijten <marijn.suijten@somainline.org >
Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com >
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org >
Patchwork: https://patchwork.freedesktop.org/patch/545374/
Link: https://lore.kernel.org/r/20230704022136.130522-10-dmitry.baryshkov@linaro.org
2023-07-11 18:20:52 +03:00
Dmitry Baryshkov
038c06bd5f
drm/msm/dpu: drop zero features from dpu_ctl_cfg data
...
Drop useless zero assignments to the dpu_ctl_cfg::features field.
Reviewed-by: Marijn Suijten <marijn.suijten@somainline.org >
Tested-by: Marijn Suijten <marijn.suijten@somainline.org >
Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com >
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org >
Patchwork: https://patchwork.freedesktop.org/patch/545366/
Link: https://lore.kernel.org/r/20230704022136.130522-9-dmitry.baryshkov@linaro.org
2023-07-11 18:20:52 +03:00
Dmitry Baryshkov
65c859d76d
drm/msm/dpu: drop zero features from dpu_mdp_cfg data
...
Drop useless zero assignments to the dpu_mdp_cfg::features field.
Reviewed-by: Marijn Suijten <marijn.suijten@somainline.org >
Tested-by: Marijn Suijten <marijn.suijten@somainline.org >
Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com >
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org >
Patchwork: https://patchwork.freedesktop.org/patch/545369/
Link: https://lore.kernel.org/r/20230704022136.130522-8-dmitry.baryshkov@linaro.org
2023-07-11 18:20:52 +03:00
Dmitry Baryshkov
25c6ae11a6
drm/msm/dpu: expand .clk_ctrls definitions
...
Use more standard initialisation for .clk_ctrls definitions. Define a
single .clk_ctrls field and use array init inside.
Reviewed-by: Marijn Suijten <marijn.suijten@somainline.org >
Tested-by: Marijn Suijten <marijn.suijten@somainline.org >
Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com >
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org >
Patchwork: https://patchwork.freedesktop.org/patch/545368/
Link: https://lore.kernel.org/r/20230704022136.130522-7-dmitry.baryshkov@linaro.org
2023-07-11 18:20:52 +03:00
Dmitry Baryshkov
469bae7db7
drm/msm/dpu: drop enum dpu_mdp and MDP_TOP value
...
Since there is always just a single MDP_TOP instance, drop the enum
dpu_mdp and corresponding index value.
Reviewed-by: Marijn Suijten <marijn.suijten@somainline.org >
Tested-by: Marijn Suijten <marijn.suijten@somainline.org >
Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com >
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org >
Patchwork: https://patchwork.freedesktop.org/patch/545357/
Link: https://lore.kernel.org/r/20230704022136.130522-6-dmitry.baryshkov@linaro.org
2023-07-11 18:20:52 +03:00
Dmitry Baryshkov
6b2dc8cf67
drm/msm/dpu: drop dpu_mdss_cfg::mdp_count field
...
There is always a single MDP TOP block. Drop the mdp_count field and
stop declaring dpu_mdp_cfg instances as arrays.
Tested-by: Marijn Suijten <marijn.suijten@somainline.org >
Reviewed-by: Marijn Suijten <marijn.suijten@somainline.org >
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org >
Patchwork: https://patchwork.freedesktop.org/patch/545355/
Link: https://lore.kernel.org/r/20230704022136.130522-5-dmitry.baryshkov@linaro.org
2023-07-11 18:20:52 +03:00
Dmitry Baryshkov
fdac4bc57a
drm/msm/dpu: simplify peer LM handling
...
For each LM there is at max 1 peer LM. Thus there is no need to have a
mask for the peer LM enumeration. Change that to have an ID of the peer LM.
Reviewed-by: Marijn Suijten <marijn.suijten@somainline.org >
Tested-by: Marijn Suijten <marijn.suijten@somainline.org >
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org >
Patchwork: https://patchwork.freedesktop.org/patch/545352/
Link: https://lore.kernel.org/r/20230704022136.130522-4-dmitry.baryshkov@linaro.org
2023-07-11 18:20:52 +03:00
Dmitry Baryshkov
2d3b0d74c8
drm/msm/dpu: always use MSM_DP/DSI_CONTROLLER_n
...
In several catalog entries we did not use existing MSM_DP_CONTROLLER_n
constants. Fill them in. Also use freshly defined MSM_DSI_CONTROLLER_n
for DSI interfaces.
Reviewed-by: Marijn Suijten <marijn.suijten@somainline.org >
Tested-by: Marijn Suijten <marijn.suijten@somainline.org >
Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com >
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org >
Patchwork: https://patchwork.freedesktop.org/patch/545353/
Link: https://lore.kernel.org/r/20230704022136.130522-3-dmitry.baryshkov@linaro.org
2023-07-11 18:20:52 +03:00
Dmitry Baryshkov
70e913f765
drm/msm: enumerate DSI interfaces
...
Follow the DP example and define MSM_DSI_CONTROLLER_n enumeration.
Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com >
Reviewed-by: Marijn Suijten <marijn.suijten@somainline.org >
Tested-by: Marijn Suijten <marijn.suijten@somainline.org >
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org >
Patchwork: https://patchwork.freedesktop.org/patch/545351/
Link: https://lore.kernel.org/r/20230704022136.130522-2-dmitry.baryshkov@linaro.org
2023-07-11 18:20:52 +03:00
Konrad Dybcio
21d6ec5fce
drm/msm/dsi: Hook up refgen regulator
...
Consume the refgen supply on configurations that may use it.
Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org >
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org >
Patchwork: https://patchwork.freedesktop.org/patch/545333/
Link: https://lore.kernel.org/r/20230628-topic-refgen-v3-4-9fbf0e605d23@linaro.org
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org >
2023-07-11 18:20:52 +03:00
Konrad Dybcio
270ad296e9
dt-bindings: display/msm: dsi-controller-main: Allow refgen-supply
...
DSI host needs REFGEN to be enabled (if it's present on a given platform).
Allow consuming it.
Acked-by: Rob Herring <robh@kernel.org >
Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org >
Patchwork: https://patchwork.freedesktop.org/patch/545335/
Link: https://lore.kernel.org/r/20230628-topic-refgen-v3-3-9fbf0e605d23@linaro.org
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org >
2023-07-11 18:20:52 +03:00
Neil Armstrong
d92ae3612c
dt-bindings: display: msm: sm8550-mdss: document displayport controller subnode
...
Document the optional displayport controller subnode of the SM8550 MDSS.
Acked-by: Rob Herring <robh@kernel.org >
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org >
Reviewed-by: Marijn Suijten <marijn.suijten@somainline.org >
Patchwork: https://patchwork.freedesktop.org/patch/544002/
Link: https://lore.kernel.org/r/20230621-topic-sm8x50-upstream-mdss-bindings-dp-subnode-v2-3-733ed383f6b6@linaro.org
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org >
2023-07-11 18:20:52 +03:00
Neil Armstrong
df64c86e77
dt-bindings: display: msm: sm8450-mdss: document displayport controller subnode
...
Document the optional displayport controller subnode of the SM8450 MDSS.
Acked-by: Rob Herring <robh@kernel.org >
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org >
Reviewed-by: Marijn Suijten <marijn.suijten@somainline.org >
Patchwork: https://patchwork.freedesktop.org/patch/544000/
Link: https://lore.kernel.org/r/20230621-topic-sm8x50-upstream-mdss-bindings-dp-subnode-v2-2-733ed383f6b6@linaro.org
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org >
2023-07-11 18:20:52 +03:00
Neil Armstrong
648c40bb7c
dt-bindings: display: msm: sm8350-mdss: document displayport controller subnode
...
Document the optional displayport controller subnode of the SM8350 MDSS.
Acked-by: Rob Herring <robh@kernel.org >
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org >
Reviewed-by: Marijn Suijten <marijn.suijten@somainline.org >
Patchwork: https://patchwork.freedesktop.org/patch/543999/
Link: https://lore.kernel.org/r/20230621-topic-sm8x50-upstream-mdss-bindings-dp-subnode-v2-1-733ed383f6b6@linaro.org
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org >
2023-07-11 18:20:52 +03:00
Kuogee Hsieh
cabfe08ca5
drm/msm/dpu: remove struct drm_dsc_config from struct msm_display_info
...
Since struct drm_dsc_config is stored at atomic_enable() instead
of display setup time during boot up, saving struct drm_dsc_config
at struct msm_display_info is not necessary. Lets drop the dsc member
from struct msm_display_info.
Changes in v4:
-- fix "Since" at commit text
Signed-off-by: Kuogee Hsieh <quic_khsieh@quicinc.com >
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org >
Patchwork: https://patchwork.freedesktop.org/patch/543866/
Link: https://lore.kernel.org/r/1687454686-10340-3-git-send-email-quic_khsieh@quicinc.com
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org >
2023-07-11 18:20:52 +03:00
Kuogee Hsieh
9ed6141b72
drm/msm/dpu: retrieve DSI DSC struct through priv->dsi[0]
...
Currently struct drm_dsc_config for DSI is populated at display
setup during system boot up. This mechanism works fine with
embedded display but not for pluggable displays as the
struct drm_dsc_config will become stale once external display
is unplugged.
In preparation of adding support for DP DSC support
move storing of DSI DSC struct to atomic_enable() so that same
mechanism will work for both embedded display and pluggable
displays.
Changes in v4:
-- fix checkpatch.pl warning
Changes in v5:
-- delete dpu_encoder_get_dsc_config() from atomic_mode_set
Signed-off-by: Kuogee Hsieh <quic_khsieh@quicinc.com >
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org >
Patchwork: https://patchwork.freedesktop.org/patch/543867/
Link: https://lore.kernel.org/r/1687454686-10340-2-git-send-email-quic_khsieh@quicinc.com
[DB: fixed commit message]
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org >
2023-07-11 18:20:52 +03:00
Dmitry Baryshkov
274f161474
drm/msm: stop storing the array of CRTCs in struct msm_drm_private
...
The array of CRTC in the struct msm_drm_private duplicates a list of
CRTCs in the drm_device. Drop it and use the existing list for CRTC
enumeration.
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org >
Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com >
Patchwork: https://patchwork.freedesktop.org/patch/538068/
Link: https://lore.kernel.org/r/20230519150734.3879916-1-dmitry.baryshkov@linaro.org
2023-07-11 02:37:53 +03:00
Konrad Dybcio
9891b3df2b
drm/msm/dpu1: Rename sm8150_dspp_blk to sdm845_dspp_blk
...
SDM845 was the first SoC to include both PCC v4 and GC v1.8.
We don't currently support any other blocks but the common config
for these two can be reused for a large amount of SoCs.
Rename it to indicate the origin of that combo.
Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org >
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org >
Patchwork: https://patchwork.freedesktop.org/patch/533003/
Link: https://lore.kernel.org/r/20230420-topic-dpu_gc-v1-1-d9d1a5e40917@linaro.org
[DB: also applied to new catalog files]
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org >
2023-07-11 02:35:42 +03:00
Konrad Dybcio
cd036d542a
drm/msm/a6xx: Add A610 speedbin support
...
A610 is implemented on at least three SoCs: SM6115 (bengal), SM6125
(trinket) and SM6225 (khaje). Trinket does not support speed binning
(only a single SKU exists) and we don't yet support khaje upstream.
Hence, add a fuse mapping table for bengal to allow for per-chip
frequency limiting.
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org >
Reviewed-by: Akhil P Oommen <quic_akhilpo@quicinc.com >
Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org >
Patchwork: https://patchwork.freedesktop.org/patch/542780/
Signed-off-by: Rob Clark <robdclark@chromium.org >
2023-06-18 11:35:27 -07:00
Konrad Dybcio
20c8e39985
drm/msm/a6xx: Add A619_holi speedbin support
...
A619_holi is implemented on at least two SoCs: SM4350 (holi) and SM6375
(blair). This is what seems to be a first occurrence of this happening,
but it's easy to overcome by guarding the SoC-specific fuse values with
of_machine_is_compatible(). Do just that to enable frequency limiting
on these SoCs.
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org >
Reviewed-by: Akhil P Oommen <quic_akhilpo@quicinc.com >
Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org >
Patchwork: https://patchwork.freedesktop.org/patch/542772/
Signed-off-by: Rob Clark <robdclark@chromium.org >
2023-06-18 11:35:27 -07:00