drm/msm/dpu1: Rename sm8150_dspp_blk to sdm845_dspp_blk

SDM845 was the first SoC to include both PCC v4 and GC v1.8.
We don't currently support any other blocks but the common config
for these two can be reused for a large amount of SoCs.

Rename it to indicate the origin of that combo.

Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Patchwork: https://patchwork.freedesktop.org/patch/533003/
Link: https://lore.kernel.org/r/20230420-topic-dpu_gc-v1-1-d9d1a5e40917@linaro.org
[DB: also applied to new catalog files]
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
This commit is contained in:
Konrad Dybcio
2023-04-20 03:14:54 +02:00
committed by Dmitry Baryshkov
parent cd036d542a
commit 9891b3df2b
15 changed files with 39 additions and 39 deletions

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@@ -111,13 +111,13 @@ static const struct dpu_lm_cfg sdm845_lm[] = {
static const struct dpu_dspp_cfg sdm845_dspp[] = {
DSPP_BLK("dspp_0", DSPP_0, 0x54000, DSPP_SC7180_MASK,
&sm8150_dspp_sblk),
&sdm845_dspp_sblk),
DSPP_BLK("dspp_1", DSPP_1, 0x56000, DSPP_SC7180_MASK,
&sm8150_dspp_sblk),
&sdm845_dspp_sblk),
DSPP_BLK("dspp_2", DSPP_2, 0x58000, DSPP_SC7180_MASK,
&sm8150_dspp_sblk),
&sdm845_dspp_sblk),
DSPP_BLK("dspp_3", DSPP_3, 0x5a000, DSPP_SC7180_MASK,
&sm8150_dspp_sblk),
&sdm845_dspp_sblk),
};
static const struct dpu_pingpong_cfg sdm845_pp[] = {

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@@ -118,13 +118,13 @@ static const struct dpu_lm_cfg sm8150_lm[] = {
static const struct dpu_dspp_cfg sm8150_dspp[] = {
DSPP_BLK("dspp_0", DSPP_0, 0x54000, DSPP_SC7180_MASK,
&sm8150_dspp_sblk),
&sdm845_dspp_sblk),
DSPP_BLK("dspp_1", DSPP_1, 0x56000, DSPP_SC7180_MASK,
&sm8150_dspp_sblk),
&sdm845_dspp_sblk),
DSPP_BLK("dspp_2", DSPP_2, 0x58000, DSPP_SC7180_MASK,
&sm8150_dspp_sblk),
&sdm845_dspp_sblk),
DSPP_BLK("dspp_3", DSPP_3, 0x5a000, DSPP_SC7180_MASK,
&sm8150_dspp_sblk),
&sdm845_dspp_sblk),
};
static const struct dpu_pingpong_cfg sm8150_pp[] = {

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@@ -117,13 +117,13 @@ static const struct dpu_lm_cfg sc8180x_lm[] = {
static const struct dpu_dspp_cfg sc8180x_dspp[] = {
DSPP_BLK("dspp_0", DSPP_0, 0x54000, DSPP_SC7180_MASK,
&sm8150_dspp_sblk),
&sdm845_dspp_sblk),
DSPP_BLK("dspp_1", DSPP_1, 0x56000, DSPP_SC7180_MASK,
&sm8150_dspp_sblk),
&sdm845_dspp_sblk),
DSPP_BLK("dspp_2", DSPP_2, 0x58000, DSPP_SC7180_MASK,
&sm8150_dspp_sblk),
&sdm845_dspp_sblk),
DSPP_BLK("dspp_3", DSPP_3, 0x5a000, DSPP_SC7180_MASK,
&sm8150_dspp_sblk),
&sdm845_dspp_sblk),
};
static const struct dpu_pingpong_cfg sc8180x_pp[] = {

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@@ -119,13 +119,13 @@ static const struct dpu_lm_cfg sm8250_lm[] = {
static const struct dpu_dspp_cfg sm8250_dspp[] = {
DSPP_BLK("dspp_0", DSPP_0, 0x54000, DSPP_SC7180_MASK,
&sm8150_dspp_sblk),
&sdm845_dspp_sblk),
DSPP_BLK("dspp_1", DSPP_1, 0x56000, DSPP_SC7180_MASK,
&sm8150_dspp_sblk),
&sdm845_dspp_sblk),
DSPP_BLK("dspp_2", DSPP_2, 0x58000, DSPP_SC7180_MASK,
&sm8150_dspp_sblk),
&sdm845_dspp_sblk),
DSPP_BLK("dspp_3", DSPP_3, 0x5a000, DSPP_SC7180_MASK,
&sm8150_dspp_sblk),
&sdm845_dspp_sblk),
};
static const struct dpu_pingpong_cfg sm8250_pp[] = {

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@@ -76,7 +76,7 @@ static const struct dpu_lm_cfg sc7180_lm[] = {
static const struct dpu_dspp_cfg sc7180_dspp[] = {
DSPP_BLK("dspp_0", DSPP_0, 0x54000, DSPP_SC7180_MASK,
&sm8150_dspp_sblk),
&sdm845_dspp_sblk),
};
static const struct dpu_pingpong_cfg sc7180_pp[] = {

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@@ -56,7 +56,7 @@ static const struct dpu_lm_cfg sm6115_lm[] = {
static const struct dpu_dspp_cfg sm6115_dspp[] = {
DSPP_BLK("dspp_0", DSPP_0, 0x54000, DSPP_SC7180_MASK,
&sm8150_dspp_sblk),
&sdm845_dspp_sblk),
};
static const struct dpu_pingpong_cfg sm6115_pp[] = {

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@@ -85,7 +85,7 @@ static const struct dpu_lm_cfg sm6350_lm[] = {
static const struct dpu_dspp_cfg sm6350_dspp[] = {
DSPP_BLK("dspp_0", DSPP_0, 0x54000, DSPP_SC7180_MASK,
&sm8150_dspp_sblk),
&sdm845_dspp_sblk),
};
static struct dpu_pingpong_cfg sm6350_pp[] = {

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@@ -53,7 +53,7 @@ static const struct dpu_lm_cfg qcm2290_lm[] = {
static const struct dpu_dspp_cfg qcm2290_dspp[] = {
DSPP_BLK("dspp_0", DSPP_0, 0x54000, DSPP_SC7180_MASK,
&sm8150_dspp_sblk),
&sdm845_dspp_sblk),
};
static const struct dpu_pingpong_cfg qcm2290_pp[] = {

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@@ -57,7 +57,7 @@ static const struct dpu_lm_cfg sm6375_lm[] = {
static const struct dpu_dspp_cfg sm6375_dspp[] = {
DSPP_BLK("dspp_0", DSPP_0, 0x54000, DSPP_SC7180_MASK,
&sm8150_dspp_sblk),
&sdm845_dspp_sblk),
};
static const struct dpu_pingpong_cfg sm6375_pp[] = {

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@@ -117,13 +117,13 @@ static const struct dpu_lm_cfg sm8350_lm[] = {
static const struct dpu_dspp_cfg sm8350_dspp[] = {
DSPP_BLK("dspp_0", DSPP_0, 0x54000, DSPP_SC7180_MASK,
&sm8150_dspp_sblk),
&sdm845_dspp_sblk),
DSPP_BLK("dspp_1", DSPP_1, 0x56000, DSPP_SC7180_MASK,
&sm8150_dspp_sblk),
&sdm845_dspp_sblk),
DSPP_BLK("dspp_2", DSPP_2, 0x58000, DSPP_SC7180_MASK,
&sm8150_dspp_sblk),
&sdm845_dspp_sblk),
DSPP_BLK("dspp_3", DSPP_3, 0x5a000, DSPP_SC7180_MASK,
&sm8150_dspp_sblk),
&sdm845_dspp_sblk),
};
static const struct dpu_pingpong_cfg sm8350_pp[] = {

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@@ -84,7 +84,7 @@ static const struct dpu_lm_cfg sc7280_lm[] = {
static const struct dpu_dspp_cfg sc7280_dspp[] = {
DSPP_BLK("dspp_0", DSPP_0, 0x54000, DSPP_SC7180_MASK,
&sm8150_dspp_sblk),
&sdm845_dspp_sblk),
};
static const struct dpu_pingpong_cfg sc7280_pp[] = {

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@@ -112,13 +112,13 @@ static const struct dpu_lm_cfg sc8280xp_lm[] = {
static const struct dpu_dspp_cfg sc8280xp_dspp[] = {
DSPP_BLK("dspp_0", DSPP_0, 0x54000, DSPP_SC7180_MASK,
&sm8150_dspp_sblk),
&sdm845_dspp_sblk),
DSPP_BLK("dspp_1", DSPP_1, 0x56000, DSPP_SC7180_MASK,
&sm8150_dspp_sblk),
&sdm845_dspp_sblk),
DSPP_BLK("dspp_2", DSPP_2, 0x58000, DSPP_SC7180_MASK,
&sm8150_dspp_sblk),
&sdm845_dspp_sblk),
DSPP_BLK("dspp_3", DSPP_3, 0x5a000, DSPP_SC7180_MASK,
&sm8150_dspp_sblk),
&sdm845_dspp_sblk),
};
static const struct dpu_pingpong_cfg sc8280xp_pp[] = {

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@@ -118,13 +118,13 @@ static const struct dpu_lm_cfg sm8450_lm[] = {
static const struct dpu_dspp_cfg sm8450_dspp[] = {
DSPP_BLK("dspp_0", DSPP_0, 0x54000, DSPP_SC7180_MASK,
&sm8150_dspp_sblk),
&sdm845_dspp_sblk),
DSPP_BLK("dspp_1", DSPP_1, 0x56000, DSPP_SC7180_MASK,
&sm8150_dspp_sblk),
&sdm845_dspp_sblk),
DSPP_BLK("dspp_2", DSPP_2, 0x58000, DSPP_SC7180_MASK,
&sm8150_dspp_sblk),
&sdm845_dspp_sblk),
DSPP_BLK("dspp_3", DSPP_3, 0x5a000, DSPP_SC7180_MASK,
&sm8150_dspp_sblk),
&sdm845_dspp_sblk),
};
static const struct dpu_pingpong_cfg sm8450_pp[] = {

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@@ -123,13 +123,13 @@ static const struct dpu_lm_cfg sm8550_lm[] = {
static const struct dpu_dspp_cfg sm8550_dspp[] = {
DSPP_BLK("dspp_0", DSPP_0, 0x54000, DSPP_SC7180_MASK,
&sm8150_dspp_sblk),
&sdm845_dspp_sblk),
DSPP_BLK("dspp_1", DSPP_1, 0x56000, DSPP_SC7180_MASK,
&sm8150_dspp_sblk),
&sdm845_dspp_sblk),
DSPP_BLK("dspp_2", DSPP_2, 0x58000, DSPP_SC7180_MASK,
&sm8150_dspp_sblk),
&sdm845_dspp_sblk),
DSPP_BLK("dspp_3", DSPP_3, 0x5a000, DSPP_SC7180_MASK,
&sm8150_dspp_sblk),
&sdm845_dspp_sblk),
};
static const struct dpu_pingpong_cfg sm8550_pp[] = {
PP_BLK_DITHER("pingpong_0", PINGPONG_0, 0x69000, MERGE_3D_0, sc7280_pp_sblk,

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@@ -448,7 +448,7 @@ static const struct dpu_dspp_sub_blks msm8998_dspp_sblk = {
.len = 0x90, .version = 0x10007},
};
static const struct dpu_dspp_sub_blks sm8150_dspp_sblk = {
static const struct dpu_dspp_sub_blks sdm845_dspp_sblk = {
.pcc = {.id = DPU_DSPP_PCC, .base = 0x1700,
.len = 0x90, .version = 0x40000},
};