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drm/msm/dpu: Update dev core dump to dump registers of sub-blocks

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Currently, the device core dump mechanism does not dump registers of
sub-blocks within the DSPP, SSPP, DSC, and PINGPONG blocks. Edit
dpu_kms_mdp_snapshot function to account for sub-blocks.

Signed-off-by: Ryan McCann <quic_rmccann@quicinc.com>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com>
Patchwork: https://patchwork.freedesktop.org/patch/546192/
Link: https://lore.kernel.org/r/20230622-devcoredump_patch-v5-6-67e8b66c4723@quicinc.com
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
This commit is contained in:
Ryan McCann
2023-07-07 18:24:45 -07:00
committed by Dmitry Baryshkov
parent ec059976c1
commit 61e44a5b9b
1 changed files with 54 additions and 12 deletions
Download Patch File Download Diff File Expand all files Collapse all files

66
drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c
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@@ -888,6 +888,7 @@ static void dpu_kms_mdp_snapshot(struct msm_disp_state *disp_state, struct msm_k
int i;
struct dpu_kms *dpu_kms;
const struct dpu_mdss_cfg *cat;
void __iomem *base;
dpu_kms = to_dpu_kms(kms);
@@ -901,9 +902,16 @@ static void dpu_kms_mdp_snapshot(struct msm_disp_state *disp_state, struct msm_k
dpu_kms->mmio + cat->ctl[i].base, cat->ctl[i].name);
/* dump DSPP sub-blocks HW regs info */
for (i = 0; i < cat->dspp_count; i++)
msm_disp_snapshot_add_block(disp_state, cat->dspp[i].len,
dpu_kms->mmio + cat->dspp[i].base, cat->dspp[i].name);
for (i = 0; i < cat->dspp_count; i++) {
base = dpu_kms->mmio + cat->dspp[i].base;
msm_disp_snapshot_add_block(disp_state, cat->dspp[i].len, base, cat->dspp[i].name);
if (cat->dspp[i].sblk && cat->dspp[i].sblk->pcc.len > 0)
msm_disp_snapshot_add_block(disp_state, cat->dspp[i].sblk->pcc.len,
base + cat->dspp[i].sblk->pcc.base, "%s_%s",
cat->dspp[i].name,
cat->dspp[i].sblk->pcc.name);
}
/* dump INTF sub-blocks HW regs info */
for (i = 0; i < cat->intf_count; i++)
@@ -911,14 +919,37 @@ static void dpu_kms_mdp_snapshot(struct msm_disp_state *disp_state, struct msm_k
dpu_kms->mmio + cat->intf[i].base, cat->intf[i].name);
/* dump PP sub-blocks HW regs info */
for (i = 0; i < cat->pingpong_count; i++)
msm_disp_snapshot_add_block(disp_state, cat->pingpong[i].len,
dpu_kms->mmio + cat->pingpong[i].base, cat->pingpong[i].name);
for (i = 0; i < cat->pingpong_count; i++) {
base = dpu_kms->mmio + cat->pingpong[i].base;
msm_disp_snapshot_add_block(disp_state, cat->pingpong[i].len, base,
cat->pingpong[i].name);
/* TE2 sub-block has length of 0, so will not print it */
if (cat->pingpong[i].sblk && cat->pingpong[i].sblk->dither.len > 0)
msm_disp_snapshot_add_block(disp_state, cat->pingpong[i].sblk->dither.len,
base + cat->pingpong[i].sblk->dither.base,
"%s_%s", cat->pingpong[i].name,
cat->pingpong[i].sblk->dither.name);
}
/* dump SSPP sub-blocks HW regs info */
for (i = 0; i < cat->sspp_count; i++)
msm_disp_snapshot_add_block(disp_state, cat->sspp[i].len,
dpu_kms->mmio + cat->sspp[i].base, cat->sspp[i].name);
for (i = 0; i < cat->sspp_count; i++) {
base = dpu_kms->mmio + cat->sspp[i].base;
msm_disp_snapshot_add_block(disp_state, cat->sspp[i].len, base, cat->sspp[i].name);
if (cat->sspp[i].sblk && cat->sspp[i].sblk->scaler_blk.len > 0)
msm_disp_snapshot_add_block(disp_state, cat->sspp[i].sblk->scaler_blk.len,
base + cat->sspp[i].sblk->scaler_blk.base,
"%s_%s", cat->sspp[i].name,
cat->sspp[i].sblk->scaler_blk.name);
if (cat->sspp[i].sblk && cat->sspp[i].sblk->csc_blk.len > 0)
msm_disp_snapshot_add_block(disp_state, cat->sspp[i].sblk->csc_blk.len,
base + cat->sspp[i].sblk->csc_blk.base,
"%s_%s", cat->sspp[i].name,
cat->sspp[i].sblk->csc_blk.name);
}
/* dump LM sub-blocks HW regs info */
for (i = 0; i < cat->mixer_count; i++)
@@ -941,9 +972,20 @@ static void dpu_kms_mdp_snapshot(struct msm_disp_state *disp_state, struct msm_k
}
/* dump DSC sub-blocks HW regs info */
for (i = 0; i < cat->dsc_count; i++)
msm_disp_snapshot_add_block(disp_state, cat->dsc[i].len,
dpu_kms->mmio + cat->dsc[i].base, cat->dsc[i].name);
for (i = 0; i < cat->dsc_count; i++) {
base = dpu_kms->mmio + cat->dsc[i].base;
msm_disp_snapshot_add_block(disp_state, cat->dsc[i].len, base, cat->dsc[i].name);
if (cat->dsc[i].features & BIT(DPU_DSC_HW_REV_1_2)) {
struct dpu_dsc_blk enc = cat->dsc[i].sblk->enc;
struct dpu_dsc_blk ctl = cat->dsc[i].sblk->ctl;
msm_disp_snapshot_add_block(disp_state, enc.len, base + enc.base, "%s_%s",
cat->dsc[i].name, enc.name);
msm_disp_snapshot_add_block(disp_state, ctl.len, base + ctl.base, "%s_%s",
cat->dsc[i].name, ctl.name);
}
}
pm_runtime_put_sync(&dpu_kms->pdev->dev);
}