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Author SHA1 Message Date
Douglas Anderson
74c374648e drm/msm: Simplify NULL checking in msm_disp_state_dump_regs() 
The msm_disp_state_dump_regs():

- Doesn't allocate if the caller already allocated. ...but there's one
  caller and it doesn't allocate so we don't need this check.
- Checks for allocation failure over and over even though it could
  just do it once right after the allocation.

Clean this up.

Signed-off-by: Douglas Anderson <dianders@chromium.org>
Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com>
Patchwork: https://patchwork.freedesktop.org/patch/619660/
Link: https://lore.kernel.org/r/20241014093605.3.I66049c2c17bd82767661f0ecd741b20453da02b2@changeid
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
 2024-10-27 03:46:51 +02:00
Dmitry Baryshkov
2261751d5f drm/msm/dpu: sync mode_config limits to the FB limits in dpu_plane.c 
Lift mode_config limits set by the DPU driver to the actual FB limits as
handled by the dpu_plane.c. Move 2*max_lm_width check where it belongs,
to the drm_crtc_helper_funcs::mode_valid() callback.

Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com>
Tested-by: Abhinav Kumar <quic_abhinavk@quicinc.com> # sc7280
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Patchwork: https://patchwork.freedesktop.org/patch/612259/
Link: https://lore.kernel.org/r/20240903-dpu-mode-config-width-v6-15-617e1ecc4b7a@linaro.org
 2024-10-21 14:11:12 +03:00
Dmitry Baryshkov
671cc420b5 drm/msm/dpu: merge MAX_IMG_WIDTH/HEIGHT with DPU_MAX_IMG_WIDTH/HEIGHT 
dpu_formats.c defines DPU_MAX_IMG_WIDTH and _HEIGHT, while
dpu_hw_catalog.h defines just MAX_IMG_WIDTH and _HEIGHT. Merge these
constants to remove duplication.

Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com>
Tested-by: Abhinav Kumar <quic_abhinavk@quicinc.com> # sc7280
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Patchwork: https://patchwork.freedesktop.org/patch/612255/
Link: https://lore.kernel.org/r/20240903-dpu-mode-config-width-v6-14-617e1ecc4b7a@linaro.org
 2024-10-21 14:11:12 +03:00
Dmitry Baryshkov
707db375ec drm/msm/dpu: check for the plane pitch overflow 
Check that the plane pitch doesn't overflow the maximum pitch size
allowed by the hardware.

Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com>
Tested-by: Abhinav Kumar <quic_abhinavk@quicinc.com> # sc7280
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Patchwork: https://patchwork.freedesktop.org/patch/612253/
Link: https://lore.kernel.org/r/20240903-dpu-mode-config-width-v6-13-617e1ecc4b7a@linaro.org
 2024-10-21 14:11:12 +03:00
Dmitry Baryshkov
dc0def61a1 drm/msm/dpu: move layout setup population out of dpu_plane_prepare_fb() 
Move the call to dpu_format_populate_plane_sizes() to the atomic_check
step, so that any issues with the FB layout can be reported as early as
possible.

At the same time move the call to dpu_format_populate_addrs() to
dpu_plane_sspp_atomic_update(). This way the all layout management is
performed only for the visible planes: the .prepare_fb callback is
called for not visible planes too, so keeping dpu_format_populate_addrs
in dpu_plane_prepare_fb() will require dpu_format_populate_plane_sizes()
to be called for !visible planes too.

Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Patchwork: https://patchwork.freedesktop.org/patch/612251/
Link: https://lore.kernel.org/r/20240903-dpu-mode-config-width-v6-12-617e1ecc4b7a@linaro.org
 2024-10-21 14:11:12 +03:00
Dmitry Baryshkov
4f3ec1e5e1 drm/msm/dpu: make dpu_format_populate_addrs return void 
The function msm_framebuffer_iova() can not fail, it always returns a
valid address. Drop the useless checks (that were already performed at
the time) and make dpu_format_populate_addrs() return void.

Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Patchwork: https://patchwork.freedesktop.org/patch/612247/
Link: https://lore.kernel.org/r/20240903-dpu-mode-config-width-v6-11-617e1ecc4b7a@linaro.org
 2024-10-21 14:11:12 +03:00
Dmitry Baryshkov
b05093f429 drm/msm/dpu: split dpu_format_populate_layout 
Split dpu_format_populate_layout() into addess-related and
pitch/format-related parts.

Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com>
Tested-by: Abhinav Kumar <quic_abhinavk@quicinc.com> # sc7280
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Patchwork: https://patchwork.freedesktop.org/patch/612244/
Link: https://lore.kernel.org/r/20240903-dpu-mode-config-width-v6-10-617e1ecc4b7a@linaro.org
 2024-10-21 14:11:12 +03:00
Dmitry Baryshkov
d8cb424182 drm/msm/dpu: move pitch check to _dpu_format_get_plane_sizes_linear() 
The _dpu_format_get_plane_sizes_linear() already compares pitches of
the framebuffer with the calculated pitches. Move the check to the same
place, demoting DPU_ERROR to DPU_DEBUG to prevent user from spamming the
kernel log.

Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Patchwork: https://patchwork.freedesktop.org/patch/612245/
Link: https://lore.kernel.org/r/20240903-dpu-mode-config-width-v6-9-617e1ecc4b7a@linaro.org
 2024-10-21 14:11:12 +03:00
Dmitry Baryshkov
d13445bc61 drm/msm/dpu: pass drm_framebuffer to _dpu_format_get_plane_sizes() 
Instead of passing width / height / pitches, pass drm_framebuffer
directly. This allows us to drop the useless check for !pitches, since
an array can not be NULL.

Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Patchwork: https://patchwork.freedesktop.org/patch/612248/
Link: https://lore.kernel.org/r/20240903-dpu-mode-config-width-v6-8-617e1ecc4b7a@linaro.org
 2024-10-21 14:11:12 +03:00
Dmitry Baryshkov
5e317a6496 drm/msm/dpu: drop msm_format from struct dpu_hw_fmt_layout 
The struct dpu_hw_fmt_layout defines hardware data layout (addresses,
sizes and pitches. Drop format field from this structure as it's not a
part of the data layout.

Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Patchwork: https://patchwork.freedesktop.org/patch/612242/
Link: https://lore.kernel.org/r/20240903-dpu-mode-config-width-v6-7-617e1ecc4b7a@linaro.org
 2024-10-21 14:11:12 +03:00
Dmitry Baryshkov
ce357877e6 drm/msm/dpu: drop extra aspace checks in dpu_formats 
The DPU driver isn't expected to be used without an IOMMU. Thus the
aspace will be always present. Not to mention that mdp4/mdp5 drivers
call msm_framebuffer_iova() without such checks, as the whole
msm_framebuffer layer is expected to support both IOMMU and IOMMU-less
configurations.

Drop these useless if (aspace) checks.

Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Patchwork: https://patchwork.freedesktop.org/patch/612249/
Link: https://lore.kernel.org/r/20240903-dpu-mode-config-width-v6-6-617e1ecc4b7a@linaro.org
 2024-10-21 14:11:11 +03:00
Dmitry Baryshkov
759bcfe8e7 drm/msm/dpu: drop dpu_format_populate_layout from dpu_plane_sspp_atomic_update 
The dpu_plane_prepare_fb() already calls dpu_format_populate_layout().
Store the generated layout in the plane state and drop this call from
dpu_plane_sspp_update().

Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com>
Tested-by: Abhinav Kumar <quic_abhinavk@quicinc.com> # sc7280
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Patchwork: https://patchwork.freedesktop.org/patch/612240/
Link: https://lore.kernel.org/r/20240903-dpu-mode-config-width-v6-5-617e1ecc4b7a@linaro.org
 2024-10-21 14:11:11 +03:00
Dmitry Baryshkov
a26991933c drm/msm/dpu: drop dpu_format_check_modified_format 
The msm_kms_funcs::check_modified_format() callback is not used by the
driver. Drop it completely.

Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com>
Tested-by: Abhinav Kumar <quic_abhinavk@quicinc.com> # sc7280
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Patchwork: https://patchwork.freedesktop.org/patch/612239/
Link: https://lore.kernel.org/r/20240903-dpu-mode-config-width-v6-4-617e1ecc4b7a@linaro.org
 2024-10-21 14:11:11 +03:00
Mahadevan
b139c80d18 drm/msm/dpu: Add SA8775P support 
Add definitions for the display hardware used on the
Qualcomm SA8775P platform.

Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Mahadevan <quic_mahap@quicinc.com>
Patchwork: https://patchwork.freedesktop.org/patch/620499/
Link: https://lore.kernel.org/r/20241019-patchv3_1-v5-4-d2fb72c9a845@quicinc.com
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
 2024-10-21 14:09:51 +03:00
Mahadevan
4d1cd4c3fa drm/msm: mdss: Add SA8775P support 
Add Mobile Display Subsystem (MDSS) support for the SA8775P platform.

Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Mahadevan <quic_mahap@quicinc.com>
Patchwork: https://patchwork.freedesktop.org/patch/620496/
Link: https://lore.kernel.org/r/20241019-patchv3_1-v5-3-d2fb72c9a845@quicinc.com
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
 2024-10-21 14:09:51 +03:00
Mahadevan
546f8d6c3e dt-bindings: display/msm: Document the DPU for SA8775P 
Document the DPU for Qualcomm SA8775P platform.

Signed-off-by: Mahadevan <quic_mahap@quicinc.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Patchwork: https://patchwork.freedesktop.org/patch/620494/
Link: https://lore.kernel.org/r/20241019-patchv3_1-v5-2-d2fb72c9a845@quicinc.com
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
 2024-10-21 14:09:51 +03:00
Mahadevan
409685915f dt-bindings: display/msm: Document MDSS on SA8775P 
Document the MDSS hardware found on the Qualcomm SA8775P platform.

Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Mahadevan <quic_mahap@quicinc.com>
Patchwork: https://patchwork.freedesktop.org/patch/620492/
Link: https://lore.kernel.org/r/20241019-patchv3_1-v5-1-d2fb72c9a845@quicinc.com
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
 2024-10-21 14:09:51 +03:00
Thomas Zimmermann
42170670ee drm/msm: Use video aperture helpers 
DRM's aperture functions have long been implemented as helpers
under drivers/video/ for use with fbdev. Avoid the DRM wrappers by
calling the video functions directly.

Signed-off-by: Thomas Zimmermann <tzimmermann@suse.de>
Cc: Rob Clark <robdclark@gmail.com>
Cc: Abhinav Kumar <quic_abhinavk@quicinc.com>
Cc: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Cc: Sean Paul <sean@poorly.run>
Cc: Marijn Suijten <marijn.suijten@somainline.org>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Acked-by: Javier Martinez Canillas <javierm@redhat.com>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
 2024-10-21 14:09:05 +03:00
Dmitry Baryshkov
c59afe5077 drm/msm/dpu: drop LM_3 / LM_4 on MSM8998 
On the MSM8998 platform ther are no LM_3 and LM_4 blocks. Drop them from
the MSM8998 catalog.

Fixes: 94391a14fc ("drm/msm/dpu1: Add MSM8998 to hw catalog")
Reported-by: Abhinav Kumar <quic_abhinavk@quicinc.com>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com>
Patchwork: https://patchwork.freedesktop.org/patch/612585/
Link: https://lore.kernel.org/r/20240905-dpu-fix-sdm845-catalog-v1-3-3363d03998bd@linaro.org
 2024-10-21 14:09:05 +03:00
Dmitry Baryshkov
d39271061d drm/msm/dpu: drop LM_3 / LM_4 on SDM845 
On the SDM845 platform ther are no LM_3 and LM_4 blocks. Drop them from
the SDM845 catalog.

Fixes: 25fdd5933e ("drm/msm: Add SDM845 DPU support")
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com>
Patchwork: https://patchwork.freedesktop.org/patch/612586/
Link: https://lore.kernel.org/r/20240905-dpu-fix-sdm845-catalog-v1-2-3363d03998bd@linaro.org
 2024-10-21 14:09:05 +03:00
Dmitry Baryshkov
768a272d53 drm/msm/dpu: on SDM845 move DSPP_3 to LM_5 block 
On the SDM845 platform the DSPP_3 is used by the LM_5. Correct
corresponding entries in the sdm845_lm array.

Fixes: c723751721 ("drm/msm/dpu/catalog: define DSPP blocks found on sdm845")
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com>
Patchwork: https://patchwork.freedesktop.org/patch/612584/
Link: https://lore.kernel.org/r/20240905-dpu-fix-sdm845-catalog-v1-1-3363d03998bd@linaro.org
 2024-10-21 14:09:05 +03:00
Colin Ian King
71f40d32fa drm/msm8998: make const arrays ratio_list and band_list static 
Don't populate the const read-only arrays ratio_list and band_list on the
stack at run time, instead make them static.

Signed-off-by: Colin Ian King <colin.i.king@gmail.com>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Patchwork: https://patchwork.freedesktop.org/patch/614156/
Link: https://lore.kernel.org/r/20240912151037.592477-1-colin.i.king@gmail.com
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
 2024-10-21 14:09:05 +03:00
Yang Li
00adf52efe drm/msm: Remove unneeded semicolon 
./drivers/gpu/drm/msm/hdmi/hdmi_phy_8998.c:282:2-3: Unneeded semicolon

This patch removes an unneeded semicolon after a switch statement in the
pll_get_post_div function. Adding a semicolon after a switch statement is
unnecessary and can lead to confusion in the code structure.

Reported-by: Abaci Robot <abaci@linux.alibaba.com>
Closes: https://bugzilla.openanolis.cn/show_bug.cgi?id=9852
Signed-off-by: Yang Li <yang.lee@linux.alibaba.com>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Patchwork: https://patchwork.freedesktop.org/patch/614767/
Link: https://lore.kernel.org/r/20240918023357.59399-1-yang.lee@linux.alibaba.com
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
 2024-10-21 14:09:05 +03:00
Dmitry Baryshkov
62af6e1cb5 drm/msm/dpu: Add support for MSM8917 
Add support for MSM8917, which has MDP5 v1.15. It looks like
trimmed down version of MSM8937. Even fewer PP, LM and no DSI1.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
[Remove intr_start from CTLs config, reword the commit]
Signed-off-by: Barnabás Czémán <barnabas.czeman@mainlining.org>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Patchwork: https://patchwork.freedesktop.org/patch/617311/
Link: https://lore.kernel.org/r/20240930-dpu-msm8953-msm8996-v2-4-594c3e3190b4@mainlining.org
 2024-10-21 14:09:04 +03:00
Dmitry Baryshkov
c079680bb0 drm/msm/dpu: Add support for MSM8937 
Add support for MSM8937, which has MDP5 v1.14. It looks like
trimmed down version of MSM8996. Less SSPP, LM and PP blocks. No DSC,
etc.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
[Remove intr_start from CTLs config, reword the commit]
Signed-off-by: Barnabás Czémán <barnabas.czeman@mainlining.org>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Patchwork: https://patchwork.freedesktop.org/patch/617312/
Link: https://lore.kernel.org/r/20240930-dpu-msm8953-msm8996-v2-3-594c3e3190b4@mainlining.org
 2024-10-21 14:09:04 +03:00
Dmitry Baryshkov
7a6109ce1c drm/msm/dpu: Add support for MSM8953 
Add support for MSM8953, which has MDP5 v1.16. It looks like
trimmed down version of MSM8996. Less SSPP, LM and PP blocks. No DSC,
etc.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
[Remove intr_start from CTLs config, reword the commit]
Signed-off-by: Barnabás Czémán <barnabas.czeman@mainlining.org>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Patchwork: https://patchwork.freedesktop.org/patch/617310/
Link: https://lore.kernel.org/r/20240930-dpu-msm8953-msm8996-v2-2-594c3e3190b4@mainlining.org
 2024-10-21 14:09:04 +03:00
Konrad Dybcio
daf9a92dae drm/msm/dpu: Add support for MSM8996 
Add support for MSM8996, which - fun fact - was the SoC that this driver
(or rather SDE, its downstream origin) was meant for and first tested on.

It has some hardware that differs from the modern SoCs, so not a lot of
current structs could have been reused. It's also seemingly the only SoC
supported by DPU that uses RGB pipes.

Note, by default this platform is still handled by the MDP5 driver
unless the `msm.prefer_mdp5=false' parameter is provided.

Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
[DB: rebased on top of sblk changes, add dpu_rgb_sblk]
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Acked-by: Konrad Dybcio <konrad.dybcio@linaro.org>
[Removed intr_start from CTLs config, removed LM_3 and LM_4]
Signed-off-by: Barnabás Czémán <barnabas.czeman@mainlining.org>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Patchwork: https://patchwork.freedesktop.org/patch/617309/
Link: https://lore.kernel.org/r/20240930-dpu-msm8953-msm8996-v2-1-594c3e3190b4@mainlining.org
 2024-10-21 14:09:04 +03:00
Krzysztof Kozlowski
342d482105 dt-bindings: display/msm: merge SM8550 DPU into SC7280 
Split of the bindings was artificial and not helping - we end up with
multiple binding files for very similar devices thus increasing the
chances of using different order of reg and clocks entries.

Unify DPU bindings of SC7280 and SM8550, because they are the same.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Acked-by: Rob Herring (Arm) <robh@kernel.org>
Patchwork: https://patchwork.freedesktop.org/patch/617874/
Link: https://lore.kernel.org/r/20241003-dt-binding-display-msm-merge-v1-5-91ab08fc76a2@linaro.org
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
 2024-10-21 14:09:04 +03:00
Krzysztof Kozlowski
abf0a19c49 dt-bindings: display/msm: merge SM8450 DPU into SC7280 
Split of the bindings was artificial and not helping - we end up with
multiple binding files for very similar devices thus increasing the
chances of using different order of reg and clocks entries.

Unify DPU bindings of SC7280 and SM8450, because they are the same.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Acked-by: Rob Herring (Arm) <robh@kernel.org>
Patchwork: https://patchwork.freedesktop.org/patch/617873/
Link: https://lore.kernel.org/r/20241003-dt-binding-display-msm-merge-v1-4-91ab08fc76a2@linaro.org
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
 2024-10-21 14:09:04 +03:00
Krzysztof Kozlowski
30c38fcd50 dt-bindings: display/msm: merge SM8350 DPU into SC7280 
Split of the bindings was artificial and not helping - we end up with
multiple binding files for very similar devices thus increasing the
chances of using different order of reg and clocks entries.

Unify DPU bindings of SC7280 and SM8350, because they are the same.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Acked-by: Rob Herring (Arm) <robh@kernel.org>
Patchwork: https://patchwork.freedesktop.org/patch/617871/
Link: https://lore.kernel.org/r/20241003-dt-binding-display-msm-merge-v1-3-91ab08fc76a2@linaro.org
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
 2024-10-21 14:09:04 +03:00
Krzysztof Kozlowski
5a1f6295a4 dt-bindings: display/msm: merge SM8250 DPU into SM8150 
Split of the bindings was artificial and not helping - we end up with
multiple binding files for very similar devices thus increasing the
chances of using different order of reg and clocks entries.

Unify DPU bindings of SM8150 and SM8250, because they are the same.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Acked-by: Rob Herring (Arm) <robh@kernel.org>
Patchwork: https://patchwork.freedesktop.org/patch/617868/
Link: https://lore.kernel.org/r/20241003-dt-binding-display-msm-merge-v1-2-91ab08fc76a2@linaro.org
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
 2024-10-21 14:09:04 +03:00
Krzysztof Kozlowski
897ee96725 dt-bindings: display/msm: merge SC8280XP DPU into SC7280 
Split of the bindings was artificial and not helping - we end up with
multiple binding files for very similar devices thus increasing the
chances of using different order of reg and clocks entries.

Unify DPU bindings of SC7280 and SC8280XP, because they are the same.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Acked-by: Rob Herring (Arm) <robh@kernel.org>
Patchwork: https://patchwork.freedesktop.org/patch/617867/
Link: https://lore.kernel.org/r/20241003-dt-binding-display-msm-merge-v1-1-91ab08fc76a2@linaro.org
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
 2024-10-21 14:09:04 +03:00
Soutrik Mukhopadhyay
dcb380d19e drm/msm/dp: Add DisplayPort controller for SA8775P 
The Qualcomm SA8775P platform comes with 2 DisplayPort controllers
for each mdss, having different base offsets than the previous
SoCs. The support for all 4 DPTX have been added here, and
validation of only MDSS0 DPTX0 and DPTX1 have been conducted.

Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Soutrik Mukhopadhyay <quic_mukhopad@quicinc.com>
Patchwork: https://patchwork.freedesktop.org/patch/620320/
Link: https://lore.kernel.org/r/20241018070706.28980-6-quic_mukhopad@quicinc.com
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
 2024-10-21 14:09:04 +03:00
Soutrik Mukhopadhyay
c51ff89a81 dt-bindings: display: msm: dp-controller: document SA8775P compatible 
Add compatible string for the DisplayPort controller found on the
Qualcomm SA8775P platform.

Acked-by: Krzysztof Kozlowski <krzk@kernel.org>
Signed-off-by: Soutrik Mukhopadhyay <quic_mukhopad@quicinc.com>
Patchwork: https://patchwork.freedesktop.org/patch/620315/
Link: https://lore.kernel.org/r/20241018070706.28980-5-quic_mukhopad@quicinc.com
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
 2024-10-21 14:09:04 +03:00
Rob Clark
1fac1fa4a6 Merge branch 'msm-fixes' into msm-next 
Back-merge msm-fixes to resolve msm-next conflicts.

Signed-off-by: Rob Clark <robdclark@chromium.org>
 2024-10-20 13:34:03 -07:00
Rob Clark
77ad507dbb drm/msm/a6xx+: Insert a fence wait before SMMU table update 
The CP_SMMU_TABLE_UPDATE _should_ be waiting for idle, but on some
devices (x1-85, possibly others), it seems to pass that barrier while
there are still things in the event completion FIFO waiting to be
written back to memory.

Work around that by adding a fence wait before context switch.  The
CP_EVENT_WRITE that writes the fence is the last write from a submit,
so seeing this value hit memory is a reliable indication that it is
safe to proceed with the context switch.

v2: Only emit CP_WAIT_TIMESTAMP on a7xx, as it is not supported on a6xx.
    Conversely, I've not been able to reproduce this issue on a6xx, so
    hopefully it is limited to a7xx, or perhaps just certain a7xx
    devices.

Fixes: af66706acc ("drm/msm/a6xx: Add skeleton A7xx support")
Closes: https://gitlab.freedesktop.org/drm/msm/-/issues/63
Signed-off-by: Rob Clark <robdclark@chromium.org>
Reviewed-by: Akhil P Oommen <quic_akhilpo@quicinc.com>
Signed-off-by: Abhinav Kumar <quic_abhinavk@quicinc.com>
 2024-10-15 17:18:16 -07:00
Jessica Zhang
f87f3b80ab drm/msm/dpu: don't always program merge_3d block 
Only program the merge_3d block for the video phys encoder when the 3d
blend mode is not NONE

Fixes: 3e79527a33 ("drm/msm/dpu: enable merge_3d support on sm8150/sm8250")
Suggested-by: Abhinav Kumar <quic_abhinavk@quicinc.com>
Signed-off-by: Jessica Zhang <quic_jesszhan@quicinc.com>
Patchwork: https://patchwork.freedesktop.org/patch/619095/
Link: https://lore.kernel.org/r/20241009-merge3d-fix-v1-1-0d0b6f5c244e@quicinc.com
Signed-off-by: Abhinav Kumar <quic_abhinavk@quicinc.com>
 2024-10-15 15:00:27 -07:00
Jessica Zhang
40dad89cb8 drm/msm/dpu: Don't always set merge_3d pending flush 
Don't set the merge_3d pending flush bits if the mode_3d is
BLEND_3D_NONE.

Always flushing merge_3d can cause timeout issues when there are
multiple commits with concurrent writeback enabled.

This is because the video phys enc waits for the hw_ctl flush register
to be completely cleared [1] in its wait_for_commit_done(), but the WB
encoder always sets the merge_3d pending flush during each commit
regardless of if the merge_3d is actually active.

This means that the hw_ctl flush register will never be 0 when there are
multiple CWB commits and the video phys enc will hit vblank timeout
errors after the first CWB commit.

[1] commit fe9df3f50c ("drm/msm/dpu: add real wait_for_commit_done()")

Fixes: 3e79527a33 ("drm/msm/dpu: enable merge_3d support on sm8150/sm8250")
Fixes: d7d0e73f7d ("drm/msm/dpu: introduce the dpu_encoder_phys_* for writeback")
Signed-off-by: Jessica Zhang <quic_jesszhan@quicinc.com>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Patchwork: https://patchwork.freedesktop.org/patch/619092/
Link: https://lore.kernel.org/r/20241009-mode3d-fix-v1-1-c0258354fadc@quicinc.com
Signed-off-by: Abhinav Kumar <quic_abhinavk@quicinc.com>
 2024-10-15 14:59:20 -07:00
Douglas Anderson
e4a45582db drm/msm: Allocate memory for disp snapshot with kvzalloc() 
With the "drm/msm: add a display mmu fault handler" series [1] we saw
issues in the field where memory allocation was failing when
allocating space for registers in msm_disp_state_dump_regs().
Specifically we were seeing an order 5 allocation fail. It's not
surprising that order 5 allocations will sometimes fail after the
system has been up and running for a while.

There's no need here for contiguous memory. Change the allocation to
kvzalloc() which should make it much less likely to fail.

[1] https://lore.kernel.org/r/20240628214848.4075651-1-quic_abhinavk@quicinc.com/

Fixes: 98659487b8 ("drm/msm: add support to take dpu snapshot")
Signed-off-by: Douglas Anderson <dianders@chromium.org>
Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com>
Patchwork: https://patchwork.freedesktop.org/patch/619658/
Link: https://lore.kernel.org/r/20241014093605.2.I72441365ffe91f3dceb17db0a8ec976af8139590@changeid
Signed-off-by: Abhinav Kumar <quic_abhinavk@quicinc.com>
 2024-10-14 13:16:17 -07:00
Douglas Anderson
293f532632 drm/msm: Avoid NULL dereference in msm_disp_state_print_regs() 
If the allocation in msm_disp_state_dump_regs() failed then
`block->state` can be NULL. The msm_disp_state_print_regs() function
_does_ have code to try to handle it with:

  if (*reg)
    dump_addr = *reg;

...but since "dump_addr" is initialized to NULL the above is actually
a noop. The code then goes on to dereference `dump_addr`.

Make the function print "Registers not stored" when it sees a NULL to
solve this. Since we're touching the code, fix
msm_disp_state_print_regs() not to pointlessly take a double-pointer
and properly mark the pointer as `const`.

Fixes: 98659487b8 ("drm/msm: add support to take dpu snapshot")
Signed-off-by: Douglas Anderson <dianders@chromium.org>
Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com>
Patchwork: https://patchwork.freedesktop.org/patch/619657/
Link: https://lore.kernel.org/r/20241014093605.1.Ia1217cecec9ef09eb3c6d125360cc6c8574b0e73@changeid
Signed-off-by: Abhinav Kumar <quic_abhinavk@quicinc.com>
 2024-10-14 13:16:17 -07:00
Jonathan Marek
358b762400 drm/msm/dsi: fix 32-bit signed integer extension in pclk_rate calculation 
When (mode->clock * 1000) is larger than (1<<31), int to unsigned long
conversion will sign extend the int to 64 bits and the pclk_rate value
will be incorrect.

Fix this by making the result of the multiplication unsigned.

Note that above (1<<32) would still be broken and require more changes, but
its unlikely anyone will need that anytime soon.

Fixes: c4d8cfe516 ("drm/msm/dsi: add implementation for helper functions")
Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com>
Patchwork: https://patchwork.freedesktop.org/patch/618434/
Link: https://lore.kernel.org/r/20241007050157.26855-2-jonathan@marek.ca
Signed-off-by: Abhinav Kumar <quic_abhinavk@quicinc.com>
 2024-10-14 13:16:17 -07:00
Jonathan Marek
24436a540d drm/msm/dsi: improve/fix dsc pclk calculation 
drm_mode_vrefresh() can introduce a large rounding error, avoid it.

Fixes: 7c9e4a554d ("drm/msm/dsi: Reduce pclk rate for compression")
Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com>
Patchwork: https://patchwork.freedesktop.org/patch/618432/
Link: https://lore.kernel.org/r/20241007050157.26855-1-jonathan@marek.ca
Signed-off-by: Abhinav Kumar <quic_abhinavk@quicinc.com>
 2024-10-14 13:16:17 -07:00
Dmitry Baryshkov
f260ed880c drm/msm/hdmi: drop pll_cmp_to_fdata from hdmi_phy_8998 
The pll_cmp_to_fdata() was never used by the working code. Drop it to
prevent warnings with W=1 and clang.

Reported-by: Jani Nikula <jani.nikula@intel.com>
Closes: https://lore.kernel.org/dri-devel/3553b1db35665e6ff08592e35eb438a574d1ad65.1725962479.git.jani.nikula@intel.com
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Fixes: caedbf17c4 ("drm/msm: add msm8998 hdmi phy/pll support")
Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com>
Patchwork: https://patchwork.freedesktop.org/patch/615348/
Link: https://lore.kernel.org/r/20240922-msm-drop-unused-func-v1-1-c5dc083415b8@linaro.org
Signed-off-by: Abhinav Kumar <quic_abhinavk@quicinc.com>
 2024-10-14 13:16:16 -07:00
Dmitry Baryshkov
3a0851b442 drm/msm/dpu: check for overflow in _dpu_crtc_setup_lm_bounds() 
Make _dpu_crtc_setup_lm_bounds() check that CRTC width is not
overflowing LM requirements. Rename the function accordingly.

Fixes: 25fdd5933e ("drm/msm: Add SDM845 DPU support")
Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com>
Tested-by: Abhinav Kumar <quic_abhinavk@quicinc.com> # sc7280
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Patchwork: https://patchwork.freedesktop.org/patch/612237/
Link: https://lore.kernel.org/r/20240903-dpu-mode-config-width-v6-3-617e1ecc4b7a@linaro.org
Signed-off-by: Abhinav Kumar <quic_abhinavk@quicinc.com>
 2024-10-14 13:16:16 -07:00
Dmitry Baryshkov
3ae133b019 drm/msm/dpu: move CRTC resource assignment to dpu_encoder_virt_atomic_check 
Historically CRTC resources (LMs and CTLs) were assigned in
dpu_crtc_atomic_begin(). The commit 9222cdd27e ("drm/msm/dpu: move hw
resource tracking to crtc state") simply moved resources to
struct dpu_crtc_state, without changing the code sequence. Later on the
commit b107603b4a ("drm/msm/dpu: map mixer/ctl hw blocks in encoder
modeset") rearanged the code, but still kept the cstate->num_mixers
assignment to happen during commit phase. This makes dpu_crtc_state
inconsistent between consequent atomic_check() calls.

Move CRTC resource assignment to happen at the end of
dpu_encoder_virt_atomic_check().

Fixes: b107603b4a ("drm/msm/dpu: map mixer/ctl hw blocks in encoder modeset")
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com>
Patchwork: https://patchwork.freedesktop.org/patch/612235/
Link: https://lore.kernel.org/r/20240903-dpu-mode-config-width-v6-2-617e1ecc4b7a@linaro.org
Signed-off-by: Abhinav Kumar <quic_abhinavk@quicinc.com>
 2024-10-14 13:16:16 -07:00
Dmitry Baryshkov
bfecbc2cfb drm/msm/dpu: make sure phys resources are properly initialized 
The commit b954fa6baa ("drm/msm/dpu: Refactor rm iterator") removed
zero-init of the hw_ctl array, but didn't change the error condition,
that checked for hw_ctl[i] being NULL. At the same time because of the
early returns in case of an error dpu_encoder_phys might be left with
the resources assigned in the previous state. Rework assigning of hw_pp
/ hw_ctl to the dpu_encoder_phys in order to make sure they are always
set correctly.

Fixes: b954fa6baa ("drm/msm/dpu: Refactor rm iterator")
Suggested-by: Abhinav Kumar <quic_abhinavk@quicinc.com>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com>
Patchwork: https://patchwork.freedesktop.org/patch/612233/
Link: https://lore.kernel.org/r/20240903-dpu-mode-config-width-v6-1-617e1ecc4b7a@linaro.org
Signed-off-by: Abhinav Kumar <quic_abhinavk@quicinc.com>
 2024-10-14 13:16:16 -07:00
Antonino Maniscalco
a20a91fb1b Documentation: document adreno preemption 
Add documentation about the preemption feature supported by the msm
driver.

Signed-off-by: Antonino Maniscalco <antomani103@gmail.com>
Patchwork: https://patchwork.freedesktop.org/patch/618032/
Signed-off-by: Rob Clark <robdclark@chromium.org>
 2024-10-04 08:47:29 -07:00
Antonino Maniscalco
20f3327575 drm/msm/a6xx: Enable preemption for tested a7xx targets 
Initialize with 4 rings to enable preemption.

Add the "preemption_enabled" module parameter to override this.

Tested-by: Rob Clark <robdclark@gmail.com>
Tested-by: Neil Armstrong <neil.armstrong@linaro.org> # on SM8650-QRD
Tested-by: Neil Armstrong <neil.armstrong@linaro.org> # on SM8550-QRD
Tested-by: Neil Armstrong <neil.armstrong@linaro.org> # on SM8450-HDK
Signed-off-by: Antonino Maniscalco <antomani103@gmail.com>
Patchwork: https://patchwork.freedesktop.org/patch/618029/
Signed-off-by: Rob Clark <robdclark@chromium.org>
 2024-10-03 13:21:52 -07:00
Antonino Maniscalco
7788d320ba drm/msm/a6xx: Add a flag to allow preemption to submitqueue_create 
Some userspace changes are necessary so add a flag for userspace to
advertise support for preemption when creating the submitqueue.

When this flag is not set preemption will not be allowed in the middle
of the submitted IBs therefore mantaining compatibility with older
userspace.

The flag is rejected if preemption is not supported on the target, this
allows userspace to know whether preemption is supported.

Tested-by: Rob Clark <robdclark@gmail.com>
Tested-by: Neil Armstrong <neil.armstrong@linaro.org> # on SM8650-QRD
Tested-by: Neil Armstrong <neil.armstrong@linaro.org> # on SM8550-QRD
Tested-by: Neil Armstrong <neil.armstrong@linaro.org> # on SM8450-HDK
Signed-off-by: Antonino Maniscalco <antomani103@gmail.com>
Patchwork: https://patchwork.freedesktop.org/patch/618028/
Signed-off-by: Rob Clark <robdclark@chromium.org>
 2024-10-03 13:21:52 -07:00
Antonino Maniscalco
35d36dc169 drm/msm/a6xx: Add traces for preemption 
Add trace points corresponding to preemption being triggered and being
completed for latency measurement purposes.

Reviewed-by: Akhil P Oommen <quic_akhilpo@quicinc.com>
Tested-by: Rob Clark <robdclark@gmail.com>
Tested-by: Neil Armstrong <neil.armstrong@linaro.org> # on SM8650-QRD
Tested-by: Neil Armstrong <neil.armstrong@linaro.org> # on SM8550-QRD
Tested-by: Neil Armstrong <neil.armstrong@linaro.org> # on SM8450-HDK
Signed-off-by: Antonino Maniscalco <antomani103@gmail.com>
Patchwork: https://patchwork.freedesktop.org/patch/618026/
Signed-off-by: Rob Clark <robdclark@chromium.org>
 2024-10-03 13:21:52 -07:00