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dt-bindings: display/msm: merge SC8280XP DPU into SC7280

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Split of the bindings was artificial and not helping - we end up with
multiple binding files for very similar devices thus increasing the
chances of using different order of reg and clocks entries.

Unify DPU bindings of SC7280 and SC8280XP, because they are the same.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Acked-by: Rob Herring (Arm) <robh@kernel.org>
Patchwork: https://patchwork.freedesktop.org/patch/617867/
Link: https://lore.kernel.org/r/20241003-dt-binding-display-msm-merge-v1-1-91ab08fc76a2@linaro.org
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
This commit is contained in:
Krzysztof Kozlowski
2024-10-03 10:14:18 +02:00
committed by Dmitry Baryshkov
parent dcb380d19e
commit 897ee96725
2 changed files with 4 additions and 123 deletions
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5
Documentation/devicetree/bindings/display/msm/qcom,sc7280-dpu.yaml
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@@ -7,13 +7,16 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#
title: Qualcomm Display DPU on SC7280
maintainers:
- Bjorn Andersson <andersson@kernel.org>
- Krishna Manikandan <quic_mkrishn@quicinc.com>
$ref: /schemas/display/msm/dpu-common.yaml#
properties:
compatible:
const: qcom,sc7280-dpu
enum:
- qcom,sc7280-dpu
- qcom,sc8280xp-dpu
reg:
items:

122
Documentation/devicetree/bindings/display/msm/qcom,sc8280xp-dpu.yaml
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@@ -1,122 +0,0 @@
# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
%YAML 1.2
---
$id: http://devicetree.org/schemas/display/msm/qcom,sc8280xp-dpu.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Qualcomm SC8280XP Display Processing Unit
maintainers:
- Bjorn Andersson <andersson@kernel.org>
description:
Device tree bindings for SC8280XP Display Processing Unit.
$ref: /schemas/display/msm/dpu-common.yaml#
properties:
compatible:
const: qcom,sc8280xp-dpu
reg:
items:
- description: Address offset and size for mdp register set
- description: Address offset and size for vbif register set
reg-names:
items:
- const: mdp
- const: vbif
clocks:
items:
- description: Display hf axi clock
- description: Display sf axi clock
- description: Display ahb clock
- description: Display lut clock
- description: Display core clock
- description: Display vsync clock
clock-names:
items:
- const: bus
- const: nrt_bus
- const: iface
- const: lut
- const: core
- const: vsync
unevaluatedProperties: false
examples:
- |
#include <dt-bindings/clock/qcom,dispcc-sc8280xp.h>
#include <dt-bindings/clock/qcom,gcc-sc8280xp.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/interconnect/qcom,sc8280xp.h>
#include <dt-bindings/power/qcom-rpmpd.h>
display-controller@ae01000 {
compatible = "qcom,sc8280xp-dpu";
reg = <0x0ae01000 0x8f000>,
<0x0aeb0000 0x2008>;
reg-names = "mdp", "vbif";
clocks = <&gcc GCC_DISP_HF_AXI_CLK>,
<&gcc GCC_DISP_SF_AXI_CLK>,
<&dispcc0 DISP_CC_MDSS_AHB_CLK>,
<&dispcc0 DISP_CC_MDSS_MDP_LUT_CLK>,
<&dispcc0 DISP_CC_MDSS_MDP_CLK>,
<&dispcc0 DISP_CC_MDSS_VSYNC_CLK>;
clock-names = "bus",
"nrt_bus",
"iface",
"lut",
"core",
"vsync";
assigned-clocks = <&dispcc0 DISP_CC_MDSS_MDP_CLK>,
<&dispcc0 DISP_CC_MDSS_VSYNC_CLK>;
assigned-clock-rates = <460000000>,
<19200000>;
operating-points-v2 = <&mdp_opp_table>;
power-domains = <&rpmhpd SC8280XP_MMCX>;
interrupt-parent = <&mdss0>;
interrupts = <0>;
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
endpoint {
remote-endpoint = <&mdss0_dp0_in>;
};
};
port@4 {
reg = <4>;
endpoint {
remote-endpoint = <&mdss0_dp1_in>;
};
};
port@5 {
reg = <5>;
endpoint {
remote-endpoint = <&mdss0_dp3_in>;
};
};
port@6 {
reg = <6>;
endpoint {
remote-endpoint = <&mdss0_dp2_in>;
};
};
};
};
...