Commit Graph

982031 Commits

Author SHA1 Message Date
Steev Klimaszewski
6be4ba5467 arm64: dts: sdm850: Add OPP tables for 2.84 and 2.96GHz
Running cpufreq-hw driver on Lenovo Yoga C630 laptop, the following
warning messages will be seen.

[    3.415340] cpu cpu4: Voltage update failed freq=2841600
[    3.418755] cpu cpu4: failed to update OPP for freq=2841600
[    3.422949] cpu cpu4: Voltage update failed freq=2956800
[    3.427086] cpu cpu4: failed to update OPP for freq=2956800

This is because the cpufreq-hw lookup table of SDM850 provides these two
set-points, but they are missing from OPP table in DT.  Let's create
sdm850.dtsi to add the OPP for them, so that the warning will be gone.

Signed-off-by: Steev Klimaszewski <steev@kali.org>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Link: https://lore.kernel.org/r/20210112090640.20062-1-shawn.guo@linaro.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-01-15 08:25:12 -06:00
Caleb Connolly
288ef8a426 arm64: dts: sdm845: add oneplus6/6t devices
Add initial support for the OnePlus 6 (enchilada) and 6T (fajita) based
on the sdm845-mtp DT with the following functionality:

 * Touch
 * Display
 * GPU
 * Wlan and Bluetooth
 * USB peripheral mode
 * Remoteproc

Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Signed-off-by: Caleb Connolly <caleb@connolly.tech>
Link: https://lore.kernel.org/r/20210114203057.64541-2-caleb@connolly.tech
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-01-15 08:14:20 -06:00
Dmitry Baryshkov
74097d805e arm64: dts: qcom: sm8250: correct sdhc_2 xo clk
sdhc_2 uses 19200000 Hz clock rather than wrongly specified xo_board
(39400000 Hz). Specify correct clock to fix DLL setup for SDR104 mode.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Fixes: c4cf0300be ("arm64: dts: qcom: sm8250: Add support for SDC2")
Link: https://lore.kernel.org/r/20210109011252.3436533-1-dmitry.baryshkov@linaro.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-01-14 21:50:24 -06:00
Dmitry Baryshkov
c2c76ddb14 arm64: dts: qcom: qrb5165-rb5: add HDMI audio playback
Add support for audio output over the HDMI output using Tertiary I2S
and LT9611UXC DSI-to-HDMI bridge.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20210115024713.92574-1-dmitry.baryshkov@linaro.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-01-14 21:11:39 -06:00
Dmitry Baryshkov
8f03014019 arm64: dts: qcom: qrb5165-rb5: enable cdsp device
Enable Compute DSP (cdsp) on QRB5165-RB5 platform and provide firmware
filename used to boot the cdsp.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20210115024156.92265-1-dmitry.baryshkov@linaro.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-01-14 21:11:12 -06:00
Danny Lin
b2e3f89768 arm64: dts: qcom: sm8150: Add support for deep CPU cluster idle
This commit adds support for deep idling of the entire unified DynamIQ
CPU cluster on sm8150. In this idle state, the LLCC (Last-Level Cache
Controller) is powered off and the AOP (Always-On Processor) enters a
low-power sleep state.

I'm not sure what the per-CPU 0x400000f4 idle state previously
contributed by Qualcomm as the "cluster sleep" state is, but the
downstream kernel has no such state. The real deep cluster idle state
is 0x41000c244, composed of:

    Cluster idle state: (0xc24) << 4 = 0xc240
    Is reset state: 1 << 30 = 0x40000000
    Affinity level: 1 << 24 = 0x1000000
    CPU idle state: 0x4 (power collapse)

This setup can be replicated with the PSCI power domain cpuidle driver,
which utilizes OSI to enter cluster idle when the last active CPU
enters idle.

The cluster idle state cannot be used as a plain cpuidle state because
it requires that all CPUs in the cluster are idling.

Reviewed-by: Ulf Hansson <ulf.hansson@linaro.org>
Signed-off-by: Danny Lin <danny@kdrag0n.dev>
Link: https://lore.kernel.org/r/20210105201000.913183-1-danny@kdrag0n.dev
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-01-12 08:10:51 -06:00
Douglas Anderson
e5376f2ea2 arm64: dts: qcom: Clean up sc7180-trogdor voltage rails
For a bunch of rails we really don't do anything with them in Linux.
These are things like modem voltage rails that the modem manages these
itself and core rails (like IO rails) that are setup to just
automagically do the right thing by the firmware.

Let's stop even listing those rails in our device tree.

The net result of this is that some of these rails might be able to go
down to a lower voltage or perhaps transition to LPM (low power mode)
sometimes.

Here's a list of what we're doing and why:

* L1A - only goes to SoC and doesn't seem associated with any
  particular peripheral. Kernel isn't doing anything with
  this. Removing from dts. NET IMPACT: rail might drop from 1.2V to
  1.178V and switch to LPM in some cases depending on firmware.
* L2A - only goes to SoC and doesn't seem associated with any
  particular peripheral. Kernel isn't doing anything with
  this. Removing from dts. NET IMPACT: rail might switch to LPM in
  some cases depending on firmware.
* L3A - only goes to SoC and doesn't seem associated with any
  particular peripheral. Kernel isn't doing anything with
  this. Removing from dts. NET IMPACT: rail might switch to LPM in
  some cases depending on firmware.
* L5A - seems to be totally unused as far as I can tell and doesn't
  even come off QSIP. Removing from dts.
* L6A - only goes to SoC and doesn't seem associated with any
  particular peripheral (I think?). Kernel isn't doing anything with
  this. Removing from dts. NET IMPACT: rail might switch to LPM in
  some cases depending on firmware.
* L16A - Looks like this is only used for internal RF stuff. Removing
  from dts. NET IMPACT: rail might switch to LPM in some cases
  depending on firmware.
* L1C - Just goes to WiFi / Bluetooth. Trust how IDP has this set and
  put this back at 1.616V min.
* L4C - This goes out to the eSIM among other places. This looks like
  it's intended to be for SIM card and modem manages. NET IMPACT:
  rail might switch to LPM in some cases depending on firmware.
* L5C - This goes to the physical SIM.  This looks like it's intended
  to be for SIM card and modem manages. NET IMPACT: rail might drop
  from 1.8V to 1.648V and switch to LPM in some cases depending on
  firmware.

NOTE: in general for anything which is supposed to be managed by Linux
I still left it all forced to HPM since I'm not 100% sure that all the
needed calls to regulator_set_load() are in place and HPM is safer.
Switching more things to LPM can happen in a future patch.

ALSO NOTE: Power measurements showed no measurable difference after
applying this patch, so perhaps it should be viewed more as a cleanup
than any power savings.

Reviewed-by: Alexandru M Stan <amstan@google.com>
Signed-off-by: Douglas Anderson <dianders@chromium.org>
Link: https://lore.kernel.org/r/20201207143255.1.Ib92ec35163682dec4b2fbb4bde0785cb6e6dde27@changeid
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-01-11 17:27:05 -06:00
Stephan Gerhold
826e6faf49 arm64: dts: qcom: msm8916-samsung-a5u: Fix iris compatible
Unlike most MSM8916 boards, samsung-a5u uses WCN3660B instead of
WCN3620 to support the 5 GHz band additionally.

WCN3660B has similar requirements as WCN3620, but it needs the XO
clock to run at 48 MHz instead of 19.2 MHz. So far it was possible
to describe that configuration using the qcom,wcn3680 compatible.

However, as of commit 8490987bdb ("wcn36xx: Hook and identify RF_IRIS_WCN3680"),
the wcn36xx driver will now use the qcom,wcn3680 compatible
to enable functionality specific to WCN3680. In particular,
WCN3680 supports 802.11ac, which is not available in WCN3660B.

Use the new qcom,wcn3660b compatible to describe the chip properly.

Fixes: 0d70519991 ("arm64: dts: msm8916-samsung-a5u: Override iris compatible")
Signed-off-by: Stephan Gerhold <stephan@gerhold.net>
Link: https://lore.kernel.org/r/20210106102134.59801-4-stephan@gerhold.net
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-01-07 11:09:33 -06:00
Douglas Anderson
f772081f48 arm64: dts: qcom: sc7180: Add "dp_hot_plug_det" pinconf for trogdor
We have an external pull on this line, so disable the internal pull.

Signed-off-by: Douglas Anderson <dianders@chromium.org>
Link: https://lore.kernel.org/r/20210106152537.1.Ib4b5b0e88fdc825c0e2662bab982dda8af2297b2@changeid
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-01-07 11:03:23 -06:00
Danny Lin
5b2dae7218 arm64: dts: qcom: sm8150: Add CPU capacities and energy model
Power and performance measurements were made using my freqbench [1]
benchmark coordinator, which isolates, offlines, and disables the timer
tick on test CPUs to maximize accuracy. It uses EEMBC CoreMark [2] as
the workload and measures power usage using the PM8150B PMIC's fuel
gauge.

The energy model dynamic-power-coefficient values were calculated with
    DPC = µW / MHz / V^2
for each OPP, and averaged across all OPPs within each cluster for the
final coefficient. Voltages were obtained from the qcom-cpufreq-hw
driver that reads voltages from the OSM LUT programmed into the SoC.

Normalized DMIPS/MHz capacity scale values for each CPU were calculated
from CoreMarks/MHz (CoreMark iterations per second per MHz), which
serves the same purpose. For each CPU, the final capacity-dmips-mhz
value is the C/MHz value of its maximum frequency normalized to
SCHED_CAPACITY_SCALE (1024) for the fastest CPU in the system.

An Asus ZenFone 6 device running a downstream Qualcomm 4.14 kernel
(LA.UM.8.1.r1-15600-sm8150.0) was used for benchmarks to ensure proper
frequency scaling and other low-level controls.

Raw benchmark results can be found in the freqbench repository [3].
Below is a human-readable summary:

Frequency domains: cpu1 cpu4 cpu7
Offline CPUs: cpu1 cpu2 cpu3 cpu4 cpu5 cpu6 cpu7
Baseline power usage: 1400 mW

===== CPU 1 =====
Frequencies: 300 403 499 576 672 768 844 940 1036 1113 1209 1305 1382 1478 1555 1632 1708 1785

 300:  1114     3.7 C/MHz     52 mW   11.8 J   21.3 I/mJ   224.4 s
 403:  1497     3.7 C/MHz     57 mW    9.5 J   26.2 I/mJ   167.0 s
 499:  1854     3.7 C/MHz     73 mW    9.8 J   25.5 I/mJ   134.9 s
 576:  2139     3.7 C/MHz     83 mW    9.7 J   25.8 I/mJ   116.9 s
 672:  2495     3.7 C/MHz     65 mW    6.5 J   38.6 I/mJ   100.2 s
 768:  2852     3.7 C/MHz     72 mW    6.3 J   39.4 I/mJ    87.7 s
 844:  3137     3.7 C/MHz     77 mW    6.2 J   40.5 I/mJ    79.7 s
 940:  3493     3.7 C/MHz     84 mW    6.0 J   41.8 I/mJ    71.6 s
1036:  3850     3.7 C/MHz     91 mW    5.9 J   42.5 I/mJ    64.9 s
1113:  4135     3.7 C/MHz     96 mW    5.8 J   43.2 I/mJ    60.5 s
1209:  4491     3.7 C/MHz    102 mW    5.7 J   44.2 I/mJ    55.7 s
1305:  4848     3.7 C/MHz    110 mW    5.7 J   44.0 I/mJ    51.6 s
1382:  5133     3.7 C/MHz    114 mW    5.5 J   45.2 I/mJ    48.7 s
1478:  5490     3.7 C/MHz    120 mW    5.5 J   45.7 I/mJ    45.5 s
1555:  5775     3.7 C/MHz    126 mW    5.5 J   45.8 I/mJ    43.3 s
1632:  6060     3.7 C/MHz    131 mW    5.4 J   46.1 I/mJ    41.3 s
1708:  6345     3.7 C/MHz    137 mW    5.4 J   46.3 I/mJ    39.4 s
1785:  6630     3.7 C/MHz    146 mW    5.5 J   45.5 I/mJ    37.7 s

===== CPU 4 =====
Frequencies: 710 825 940 1056 1171 1286 1401 1497 1612 1708 1804 1920 2016 2131 2227 2323 2419

 710:  2765     3.9 C/MHz    126 mW   11.4 J   22.0 I/mJ    90.4 s
 825:  6432     7.8 C/MHz    206 mW    8.0 J   31.2 I/mJ    38.9 s
 940:  7331     7.8 C/MHz    227 mW    7.7 J   32.3 I/mJ    34.1 s
1056:  8227     7.8 C/MHz    249 mW    7.6 J   33.0 I/mJ    30.4 s
1171:  9127     7.8 C/MHz    261 mW    7.2 J   34.9 I/mJ    27.4 s
1286: 10020     7.8 C/MHz    289 mW    7.2 J   34.6 I/mJ    25.0 s
1401: 10918     7.8 C/MHz    311 mW    7.1 J   35.1 I/mJ    22.9 s
1497: 11663     7.8 C/MHz    336 mW    7.2 J   34.7 I/mJ    21.4 s
1612: 12546     7.8 C/MHz    375 mW    7.5 J   33.5 I/mJ    19.9 s
1708: 13320     7.8 C/MHz    398 mW    7.5 J   33.5 I/mJ    18.8 s
1804: 14069     7.8 C/MHz    456 mW    8.1 J   30.9 I/mJ    17.8 s
1920: 14909     7.8 C/MHz    507 mW    8.5 J   29.4 I/mJ    16.8 s
2016: 15706     7.8 C/MHz    558 mW    8.9 J   28.1 I/mJ    15.9 s
2131: 16612     7.8 C/MHz    632 mW    9.5 J   26.3 I/mJ    15.1 s
2227: 17349     7.8 C/MHz    698 mW   10.1 J   24.8 I/mJ    14.4 s
2323: 18088     7.8 C/MHz    717 mW    9.9 J   25.2 I/mJ    13.8 s
2419: 18835     7.8 C/MHz    845 mW   11.2 J   22.3 I/mJ    13.3 s

===== CPU 7 =====
Frequencies: 825 940 1056 1171 1286 1401 1497 1612 1708 1804 1920 2016 2131 2227 2323 2419 2534 2649 2745 2841

 825:  3215     3.9 C/MHz    158 mW   12.3 J   20.3 I/mJ    77.8 s
 940:  7330     7.8 C/MHz    269 mW    9.2 J   27.3 I/mJ    34.1 s
1056:  8227     7.8 C/MHz    291 mW    8.8 J   28.2 I/mJ    30.4 s
1171:  9125     7.8 C/MHz    316 mW    8.7 J   28.9 I/mJ    27.4 s
1286: 10024     7.8 C/MHz    338 mW    8.4 J   29.6 I/mJ    25.0 s
1401: 10922     7.8 C/MHz    365 mW    8.4 J   29.9 I/mJ    22.9 s
1497: 11674     7.8 C/MHz    383 mW    8.2 J   30.4 I/mJ    21.4 s
1612: 12564     7.8 C/MHz    406 mW    8.1 J   30.9 I/mJ    19.9 s
1708: 13317     7.8 C/MHz    427 mW    8.0 J   31.2 I/mJ    18.8 s
1804: 14062     7.8 C/MHz    446 mW    7.9 J   31.5 I/mJ    17.8 s
1920: 14966     7.8 C/MHz    498 mW    8.3 J   30.1 I/mJ    16.7 s
2016: 15711     7.8 C/MHz    513 mW    8.2 J   30.6 I/mJ    15.9 s
2131: 16599     7.8 C/MHz    599 mW    9.0 J   27.7 I/mJ    15.1 s
2227: 17353     7.8 C/MHz    622 mW    9.0 J   27.9 I/mJ    14.4 s
2323: 18095     7.8 C/MHz    704 mW    9.7 J   25.7 I/mJ    13.8 s
2419: 18849     7.8 C/MHz    738 mW    9.8 J   25.5 I/mJ    13.3 s
2534: 19761     7.8 C/MHz    824 mW   10.4 J   23.9 I/mJ    12.7 s
2649: 20658     7.8 C/MHz    882 mW   10.7 J   23.4 I/mJ    12.1 s
2745: 21400     7.8 C/MHz   1003 mW   11.7 J   21.3 I/mJ    11.7 s
2841: 22147     7.8 C/MHz   1092 mW   12.3 J   20.3 I/mJ    11.3 s

[1] https://github.com/kdrag0n/freqbench
[2] https://www.eembc.org/coremark/
[3] https://github.com/kdrag0n/freqbench/tree/master/results/sm8150/main

Signed-off-by: Danny Lin <danny@kdrag0n.dev>
Link: https://lore.kernel.org/r/20201221002907.2870059-4-danny@kdrag0n.dev
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-01-05 16:36:22 -06:00
Danny Lin
81188f585d arm64: dts: qcom: sm8150: Add PSCI idle states
Like other Qualcomm SoCs, sm8150 exposes CPU and cluster idle states
through PSCI. Define the idle states to save power when the CPU is not
in active use.

These idle states, latency, and residency values match the downstream
4.14 kernel from Qualcomm as of LA.UM.8.1.r1-15600-sm8150.0.

It's worth noting that the CPU has an additional C3 power collapse idle
state between WFI and rail power collapse (with PSCI mode 0x40000003),
but it is not officially used in downstream kernels due to "thermal
throttling issues."

Signed-off-by: Danny Lin <danny@kdrag0n.dev>
Link: https://lore.kernel.org/r/20201221002907.2870059-3-danny@kdrag0n.dev
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-01-05 16:36:18 -06:00
Danny Lin
066d21bcf6 arm64: dts: qcom: sm8150: Define CPU topology
sm8150 has a big.LITTLE CPU setup with DynamIQ, so all cores are within
the same CPU cluster and LLC (Last-Level Cache) domain. Define this
topology to help the scheduler make decisions.

Signed-off-by: Danny Lin <danny@kdrag0n.dev>
Link: https://lore.kernel.org/r/20201221002907.2870059-2-danny@kdrag0n.dev
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-01-05 16:35:54 -06:00
Stephen Boyd
8d079bf204 arm64: dts: qcom: sc7180: Drop pinconf on dp_hot_plug_det
We shouldn't put any pinconf here in case someone decides to invert this
HPD signal or remove an external pull-down. It's better to leave that to
the board pinconf nodes, so drop it here.

Reviewed-by: Douglas Anderson <dianders@chromium.org>
Reported-by: Douglas Anderson <dianders@chromium.org>
Cc: Tanmay Shah <tanmay@codeaurora.org>
Fixes: 681a607ad2 ("arm64: dts: qcom: sc7180: Add DisplayPort HPD pin dt node")
Signed-off-by: Stephen Boyd <swboyd@chromium.org>
Link: https://lore.kernel.org/r/20201215020004.731239-1-swboyd@chromium.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-12-28 12:14:26 -06:00
J.R. Divya Antony
bd167507d5 arm64: dts: qcom: Add device tree for ASUS Zenfone 2 Laser
ASUS Zenfone 2 Laser Z00L is a smartphone based on MSM8916 SoC
released on 2015.

Add a device tree for Z00L with initial support for:
  - SDHCI (internal storage)
  - USB Device Mode
  - UART
  - Regulators

Reviewed-by: Stephan Gerhold <stephan@gerhold.net>
Signed-off-by: J.R. Divya Antony <d.antony.jr@gmail.com>
Link: https://lore.kernel.org/r/20201209143743.7383-1-d.antony.jr@gmail.com
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-12-28 12:14:26 -06:00
Douglas Anderson
465b13cc0a arm64: dts: qcom: Fix SD card vqmmc max voltage on sc7180-trogdor
It never makes sense to set the IO voltage of the SD card (vqmmc) to a
voltage that's higher than the voltage of the card's main power supply
(vmmc).  The card's main voltage is 2.952V on trogdor, so let's set
the max for the IO voltage to the same.

NOTE: On Linux, this is pretty much a no-op currently.  Linux already
makes an effort to match vqmmc with vmmc when running at "3.3" signal
voltage, so both before and after this change we end up running vqmmc
at 2.904V when talking to non-UHS cards.  It still seems cleaner to
make it a little more correct, though.

Also note: as per above, on Linux right now we end up running vqmmc as
2.904V even though vmmc is 2.952V.  This isn't super ideal but
shouldn't really hurt.

Signed-off-by: Douglas Anderson <dianders@chromium.org>
Link: https://lore.kernel.org/r/20201204104900.1.I0a4ac2c7f4d405431cf95eb7b7c36800660516ec@changeid
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-12-28 12:14:25 -06:00
Dmitry Baryshkov
88b57bc335 arm64: dts: qcom: sm8250: rename smem device node to follow schema
Rename 'qcom,smem' to just 'smem' to follow the rest of SoC (and device
schema).

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20201203191335.927001-2-dmitry.baryshkov@linaro.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-12-28 12:14:25 -06:00
Srinivas Kandagatla
590a135ebd arm64: dts: qcom: qrb5165-rb5: Add Audio support
This patch add support for two WSA881X smart speakers attached via Soundwire
and a DMIC0 on the main board.

Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Tested-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20201202180741.16386-7-srinivas.kandagatla@linaro.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-12-28 12:14:25 -06:00
Srinivas Kandagatla
b657d37262 arm64: dts: qcom: sm8250: add mi2s pinconfs
Add primary and tertinary mi2s pinconfs required to get I2S audio.

Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Tested-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20201202180741.16386-6-srinivas.kandagatla@linaro.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-12-28 12:14:24 -06:00
Srinivas Kandagatla
768270ca57 arm64: dts: qcom: sm8250: add wsa and va codec macros
Add support for WSA and VA codec macros along with WSA soundwire
controller required for getting audio on RB5.

Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Tested-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20201202180741.16386-5-srinivas.kandagatla@linaro.org
[bjorn: Replaced LPASS_CDC clock defines with constants]
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-12-28 12:14:24 -06:00
Srinivas Kandagatla
3160c1b894 arm64: dts: qcom: sm8250: add lpass lpi pin controller node
Add LPASS LPI pinctrl node required for Audio functionality on RB5.

Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Tested-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20201202180741.16386-4-srinivas.kandagatla@linaro.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-12-28 12:14:23 -06:00
Srinivas Kandagatla
793bbd2db7 arm64: dts: qcom: sm8250: add audio clock controllers
Add audiocc and aoncc clock controller nodes required for audio on RB5.

Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Tested-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20201202180741.16386-3-srinivas.kandagatla@linaro.org
[bjorn: Dropped includes for now]
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-12-28 12:14:23 -06:00
Srinivas Kandagatla
63e10791cc arm64: dts: qcom: sm8250: add apr and its services
Add apr node and its associated services required for audio on RB5.

Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Tested-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20201202180741.16386-2-srinivas.kandagatla@linaro.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-12-28 12:14:23 -06:00
Dmitry Baryshkov
3f2094dfbe arm64: dts: qcom: sm8250: power up dispcc on sm8250 by MMCX regulator
Add regulator controlling MMCX power domain to be used by display clock
controller on SM8250.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20201203142105.841666-8-dmitry.baryshkov@linaro.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-12-28 12:14:22 -06:00
Dmitry Baryshkov
d004c631ea arm64: dts: qcom: qrb5165-rb5: add lt9611 HDMI bridge
Add device tree node for the lontium lt9611ux DSI-HDMI bridge.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20201203142105.841666-7-dmitry.baryshkov@linaro.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-12-28 12:14:22 -06:00
Dmitry Baryshkov
04c8e3f7e9 arm64: dts: qcom: qrb5165-rb5: correct vdc_3v3 regulator
vdc_3v3 regulator is sourced from 12V, but it is controlled by l11c
regulator, so set it as vin for vdc_3v3.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20201203142105.841666-6-dmitry.baryshkov@linaro.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-12-28 12:14:21 -06:00
Dmitry Baryshkov
9e301a547a arm64: dts: qcom: sm8250-mtp: add gpu/zap-shader node
Add firmware configuration for Adreno zap shader on sm8250-mtp.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20201203142105.841666-5-dmitry.baryshkov@linaro.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-12-28 12:14:21 -06:00
Dmitry Baryshkov
0b2033dcf4 arm64: dts: qcom: qrb5165-rb5: add gpu/zap-shader node
Add firmware configuration for Adreno zap shader on qrb5165-rb5.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20201203142105.841666-4-dmitry.baryshkov@linaro.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-12-28 12:14:21 -06:00
Dmitry Baryshkov
46967bb61a arm64: dts: qrb5165-rb5: add mdss/mdp/dsi nodes
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20201203142105.841666-3-dmitry.baryshkov@linaro.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-12-28 12:14:20 -06:00
Dmitry Baryshkov
7c1dffd471 arm64: dts: qcom: sm8250.dtsi: add display system nodes
Add device tree nodes for mdss, mdp, dsi0/1.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20201203142105.841666-2-dmitry.baryshkov@linaro.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-12-28 12:14:20 -06:00
Dmitry Baryshkov
221f0ef37f arm64: dts: sm8250-mtp: enable USB host nodes
Enable both USB host controller, hsphy and qmpphy nodes on sm8250. Add
missing pm8150 ldo18 definition (used by USB qmp phys). Both controllers
are locked to host mode: dual role on first controller is not enabled.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20201127092646.122663-1-dmitry.baryshkov@linaro.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-12-28 12:14:19 -06:00
Manivannan Sadhasivam
0085a33a25 arm64: dts: qcom: sm8250: Add support for LLCC block
Add support for Last Level Cache Controller (LLCC) in SM8250 SoC.
This LLCC is used to provide common cache memory pool for the cores in
the SM8250 SoC thereby minimizing the percore caches.

Reviewed-by: Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org>
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Link: https://lore.kernel.org/r/20201130093924.45057-3-manivannan.sadhasivam@linaro.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2020-12-28 12:14:19 -06:00
Linus Torvalds
5c8fe583cc Linux 5.11-rc1 v5.11-rc1 2020-12-27 15:30:22 -08:00
Linus Torvalds
14e3e989f6 proc mountinfo: make splice available again
Since commit 36e2c7421f ("fs: don't allow splice read/write without
explicit ops") we've required that file operation structures explicitly
enable splice support, rather than falling back to the default handlers.

Most /proc files use the indirect 'struct proc_ops' to describe their
file operations, and were fixed up to support splice earlier in commits
40be821d627c..b24c30c67863, but the mountinfo files interact with the
VFS directly using their own 'struct file_operations' and got missed as
a result.

This adds the necessary support for splice to work for /proc/*/mountinfo
and friends.

Reported-by: Joan Bruguera Micó <joanbrugueram@gmail.com>
Reported-by: Jussi Kivilinna <jussi.kivilinna@iki.fi>
Link: https://bugzilla.kernel.org/show_bug.cgi?id=209971
Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Cc: Christoph Hellwig <hch@lst.de>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2020-12-27 12:00:36 -08:00
Linus Torvalds
52cd5f9c22 Merge tag 'ntb-5.11' of git://github.com/jonmason/ntb
Pull NTB fixes from Jon Mason:
 "Bug fix for IDT NTB and Intel NTB LTR management support"

* tag 'ntb-5.11' of git://github.com/jonmason/ntb:
  ntb: intel: add Intel NTB LTR vendor support for gen4 NTB
  ntb: idt: fix error check in ntb_hw_idt.c
2020-12-27 09:22:55 -08:00
Linus Torvalds
33c148a4ae Merge branch 'linus' of git://git.kernel.org/pub/scm/linux/kernel/git/herbert/crypto-2.6
Pull crypto fixes from Herbert Xu:
 "Fix a number of autobuild failures due to missing Kconfig
  dependencies"

* 'linus' of git://git.kernel.org/pub/scm/linux/kernel/git/herbert/crypto-2.6:
  crypto: qat - add CRYPTO_AES to Kconfig dependencies
  crypto: keembay - Add dependency on HAS_IOMEM
  crypto: keembay - CRYPTO_DEV_KEEMBAY_OCS_AES_SM4 should depend on ARCH_KEEMBAY
2020-12-27 09:14:32 -08:00
Linus Torvalds
cce622ab92 Merge tag 'objtool-urgent-2020-12-27' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip
Pull objtool fix from Ingo Molnar:
 "Fix a segfault that occurs when built with Clang"

* tag 'objtool-urgent-2020-12-27' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
  objtool: Fix seg fault with Clang non-section symbols
2020-12-27 09:08:23 -08:00
Linus Torvalds
6be5f58215 Merge tag 'locking-urgent-2020-12-27' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip
Pull locking fixes from Ingo Molnar:
 "Misc fixes/updates:

   - Fix static keys usage in module __init sections

   - Add separate MAINTAINERS entry for static branches/calls

   - Fix lockdep splat with CONFIG_PREEMPTIRQ_EVENTS=y tracing"

* tag 'locking-urgent-2020-12-27' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
  softirq: Avoid bad tracing / lockdep interaction
  jump_label/static_call: Add MAINTAINERS
  jump_label: Fix usage in module __init
2020-12-27 09:06:10 -08:00
Linus Torvalds
2eeefc60ad Merge tag 'timers-urgent-2020-12-27' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip
Pull timer fixes from Ingo Molnar:
 "Update/fix two CPU sanity checks in the hotplug and the boot code, and
  fix a typo in the Kconfig help text.

  [ Context: the first two commits are the result of an ongoing
    annotation+review work of (intentional) tick_do_timer_cpu() data
    races reported by KCSAN, but the annotations aren't fully cooked
    yet ]"

* tag 'timers-urgent-2020-12-27' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
  timekeeping: Fix spelling mistake in Kconfig "fullfill" -> "fulfill"
  tick/sched: Remove bogus boot "safety" check
  tick: Remove pointless cpu valid check in hotplug code
2020-12-27 09:03:41 -08:00
Linus Torvalds
3b80dee70e Merge tag 'sched-urgent-2020-12-27' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip
Pull scheduler fix from Ingo Molnar:
 "Fix a context switch performance regression"

* tag 'sched-urgent-2020-12-27' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
  sched: Optimize finish_lock_switch()
2020-12-27 09:00:47 -08:00
Linus Torvalds
f838f8d2b6 mfd: ab8500-debugfs: Remove extraneous seq_putc
Commit c9a3c4e637 ("mfd: ab8500-debugfs: Remove extraneous curly
brace") removed a left-over curly brace that caused build failures, but
Joe Perches points out that the subsequent 'seq_putc()' should also be
removed, because the commit that caused all these problems already added
the final '\n' to the seq_printf() above it.

Reported-by: Joe Perches <joe@perches.com>
Fixes: 886c812165 ("mfd: ab8500-debugfs: Remove the racy fiddling with irq_desc")
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Nathan Chancellor <natechancellor@gmail.com>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2020-12-26 09:19:49 -08:00
Linus Torvalds
40f78232f9 Merge tag 'pci-v5.11-fixes-1' of git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci
Pull PCI fixes from Bjorn Helgaas:

 - Fix a tegra enumeration regression (Rob Herring)

 - Fix a designware-host check that warned on *success*, not failure
   (Alexander Lobakin)

* tag 'pci-v5.11-fixes-1' of git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci:
  PCI: dwc: Fix inverted condition of DMA mask setup warning
  PCI: tegra: Fix host link initialization
2020-12-25 20:17:40 -08:00
Nathan Chancellor
c9a3c4e637 mfd: ab8500-debugfs: Remove extraneous curly brace
Clang errors:

  drivers/mfd/ab8500-debugfs.c:1526:2: error: non-void function does not return a value [-Werror,-Wreturn-type]
          }
          ^
  drivers/mfd/ab8500-debugfs.c:1528:2: error: expected identifier or '('
  return 0;
          ^
  drivers/mfd/ab8500-debugfs.c:1529:1: error: extraneous closing brace ('}')
  }
  ^
  3 errors generated.

The cleanup in ab8500_interrupts_show left a curly brace around, remove
it to fix the error.

Fixes: 886c812165 ("mfd: ab8500-debugfs: Remove the racy fiddling with irq_desc")
Signed-off-by: Nathan Chancellor <natechancellor@gmail.com>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2020-12-25 19:59:02 -08:00
Alexander Lobakin
99e629f14b PCI: dwc: Fix inverted condition of DMA mask setup warning
Commit 660c486590 ("PCI: dwc: Set 32-bit DMA mask for MSI target address
allocation") added dma_mask_set() call to explicitly set 32-bit DMA mask
for MSI message mapping, but for now it throws a warning on ret == 0, while
dma_set_mask() returns 0 in case of success.

Fix this by inverting the condition.

[bhelgaas: join string to make it greppable]
Fixes: 660c486590 ("PCI: dwc: Set 32-bit DMA mask for MSI target address allocation")
Link: https://lore.kernel.org/r/20201222150708.67983-1-alobakin@pm.me
Signed-off-by: Alexander Lobakin <alobakin@pm.me>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2020-12-25 21:58:42 -06:00
Rob Herring
275e88b06a PCI: tegra: Fix host link initialization
Commit b9ac0f9dc8 ("PCI: dwc: Move dw_pcie_setup_rc() to DWC common
code") broke enumeration of downstream devices on Tegra:

In non-working case (next-20201211):

  0001:00:00.0 PCI bridge: NVIDIA Corporation Device 1ad2 (rev a1)
  0001:01:00.0 SATA controller: Marvell Technology Group Ltd. Device 9171 (rev 13)
  0005:00:00.0 PCI bridge: NVIDIA Corporation Device 1ad0 (rev a1)

In working case (v5.10-rc7):

  0001:00:00.0 PCI bridge: Molex Incorporated Device 1ad2 (rev a1)
  0001:01:00.0 SATA controller: Marvell Technology Group Ltd. Device 9171 (rev 13)
  0005:00:00.0 PCI bridge: Molex Incorporated Device 1ad0 (rev a1)
  0005:01:00.0 PCI bridge: PLX Technology, Inc. Device 3380 (rev ab)
  0005:02:02.0 PCI bridge: PLX Technology, Inc. Device 3380 (rev ab)
  0005:03:00.0 USB controller: PLX Technology, Inc. Device 3380 (rev ab)

The problem seems to be dw_pcie_setup_rc() is now called twice before and
after the link up handling. The fix is to move Tegra's link up handling to
.start_link() function like other DWC drivers. Tegra is a bit more
complicated than others as it re-inits the whole DWC controller to retry
the link. With this, the initialization ordering is restored to match the
prior sequence.

Fixes: b9ac0f9dc8 ("PCI: dwc: Move dw_pcie_setup_rc() to DWC common code")
Link: https://lore.kernel.org/r/20201218143905.1614098-1-robh@kernel.org
Reported-by: Mian Yousaf Kaukab <ykaukab@suse.de>
Tested-by: Mian Yousaf Kaukab <ykaukab@suse.de>
Signed-off-by: Rob Herring <robh@kernel.org>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Cc: Thierry Reding <thierry.reding@gmail.com>
Cc: Jonathan Hunter <jonathanh@nvidia.com>
Cc: Vidya Sagar <vidyas@nvidia.com>
2020-12-25 21:58:36 -06:00
Linus Torvalds
61d791365b drm/amd/display: avoid uninitialized variable warning
clang (quite rightly) complains fairly loudly about the newly added
mpc1_get_mpc_out_mux() function returning an uninitialized value if the
'opp_id' checks don't pass.

This may not happen in practice, but the code really shouldn't return
garbage if the sanity checks don't pass.

So just initialize 'val' to zero to avoid the issue.

Fixes: 110b055b28 ("drm/amd/display: add getter routine to retrieve mpcc mux")
Cc: Josip Pavic <Josip.Pavic@amd.com>
Cc: Bindu Ramamurthy <bindu.r@amd.com>
Cc: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2020-12-25 15:41:13 -08:00
Linus Torvalds
5814bc2d4c Merge tag 'perf-tools-2020-12-24' of git://git.kernel.org/pub/scm/linux/kernel/git/acme/linux
Pull more perf tools updates from Arnaldo Carvalho de Melo:

 - Refactor 'perf stat' per CPU/socket/die/thread aggregation fixing use
   cases in ARM machines.

 - Fix memory leak when synthesizing SDT probes in 'perf probe'.

 - Update kernel header copies related to KVM, epol_pwait. msr-index and
   powerpc and s390 syscall tables.

* tag 'perf-tools-2020-12-24' of git://git.kernel.org/pub/scm/linux/kernel/git/acme/linux: (24 commits)
  perf probe: Fix memory leak when synthesizing SDT probes
  perf stat aggregation: Add separate thread member
  perf stat aggregation: Add separate core member
  perf stat aggregation: Add separate die member
  perf stat aggregation: Add separate socket member
  perf stat aggregation: Add separate node member
  perf stat aggregation: Start using cpu_aggr_id in map
  perf cpumap: Drop in cpu_aggr_map struct
  perf cpumap: Add new map type for aggregation
  perf stat: Replace aggregation ID with a struct
  perf cpumap: Add new struct for cpu aggregation
  perf cpumap: Use existing allocator to avoid using malloc
  perf tests: Improve topology test to check all aggregation types
  perf tools: Update s390's syscall.tbl copy from the kernel sources
  perf tools: Update powerpc's syscall.tbl copy from the kernel sources
  perf s390: Move syscall.tbl check into check-headers.sh
  perf powerpc: Move syscall.tbl check to check-headers.sh
  tools headers UAPI: Synch KVM's svm.h header with the kernel
  tools kvm headers: Update KVM headers from the kernel sources
  tools headers UAPI: Sync KVM's vmx.h header with the kernel sources
  ...
2020-12-25 11:07:34 -08:00
Linus Torvalds
42dc45e844 Merge branch 'for-5.11' of git://git.kernel.org/pub/scm/linux/kernel/git/jlawall/linux
Pull coccinelle updates from Julia Lawall.

* 'for-5.11' of git://git.kernel.org/pub/scm/linux/kernel/git/jlawall/linux:
  scripts: coccicheck: Correct usage of make coccicheck
  coccinelle: update expiring email addresses
  coccinnelle: Remove ptr_ret script
  kbuild: do not use scripts/ld-version.sh for checking spatch version
  remove boolinit.cocci
2020-12-25 11:05:32 -08:00
Michael Ellerman
11cc92eb74 genirq: Fix export of irq_to_desc() for powerpc KVM
Commit 64a1b95bb9 ("genirq: Restrict export of irq_to_desc()") removed
the export of irq_to_desc() unless powerpc KVM is being built, because
there is still a use of irq_to_desc() in modular code there.

However it used:

  #ifdef CONFIG_KVM_BOOK3S_64_HV

Which doesn't work when that symbol is =m, leading to a build failure:

  ERROR: modpost: "irq_to_desc" [arch/powerpc/kvm/kvm-hv.ko] undefined!

Fix it by checking for the definedness of the correct symbol which is
CONFIG_KVM_BOOK3S_64_HV_MODULE.

Fixes: 64a1b95bb9 ("genirq: Restrict export of irq_to_desc()")
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2020-12-25 11:02:39 -08:00
Linus Torvalds
7bb5226c8a Merge branch 'work.misc' of git://git.kernel.org/pub/scm/linux/kernel/git/viro/vfs
Pull misc vfs updates from Al Viro:
 "Assorted patches from previous cycle(s)..."

* 'work.misc' of git://git.kernel.org/pub/scm/linux/kernel/git/viro/vfs:
  fix hostfs_open() use of ->f_path.dentry
  Make sure that make_create_in_sticky() never sees uninitialized value of dir_mode
  fs: Kill DCACHE_DONTCACHE dentry even if DCACHE_REFERENCED is set
  fs: Handle I_DONTCACHE in iput_final() instead of generic_drop_inode()
  fs/namespace.c: WARN if mnt_count has become negative
2020-12-25 10:54:29 -08:00
Linus Torvalds
71c5f03154 Merge tag 'docs-5.11-2' of git://git.lwn.net/linux
Pull documentation fixes from Jonathan Corbet:
 "A small set of late-arriving, small documentation fixes"

* tag 'docs-5.11-2' of git://git.lwn.net/linux:
  docs: admin-guide: Fix default value of max_map_count in sysctl/vm.rst
  Documentation/submitting-patches: Document the SoB chain
  Documentation: process: Correct numbering
  docs: submitting-patches: Trivial - fix grammatical error
2020-12-24 14:20:33 -08:00