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arm64: dts: qcom: sm8150: Add PSCI idle states

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Like other Qualcomm SoCs, sm8150 exposes CPU and cluster idle states
through PSCI. Define the idle states to save power when the CPU is not
in active use.

These idle states, latency, and residency values match the downstream
4.14 kernel from Qualcomm as of LA.UM.8.1.r1-15600-sm8150.0.

It's worth noting that the CPU has an additional C3 power collapse idle
state between WFI and rail power collapse (with PSCI mode 0x40000003),
but it is not officially used in downstream kernels due to "thermal
throttling issues."

Signed-off-by: Danny Lin <danny@kdrag0n.dev>
Link: https://lore.kernel.org/r/20201221002907.2870059-3-danny@kdrag0n.dev
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
This commit is contained in:
Danny Lin
2020-12-20 16:29:06 -08:00
committed by Bjorn Andersson
parent 066d21bcf6
commit 81188f585d
1 changed files with 50 additions and 0 deletions
Download Patch File Download Diff File Expand all files Collapse all files

50
arch/arm64/boot/dts/qcom/sm8150.dtsi
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@@ -47,6 +47,8 @@ CPU0: cpu@0 {
compatible = "qcom,kryo485";
reg = <0x0 0x0>;
enable-method = "psci";
cpu-idle-states = <&LITTLE_CPU_SLEEP_0
&CLUSTER_SLEEP_0>;
next-level-cache = <&L2_0>;
qcom,freq-domain = <&cpufreq_hw 0>;
#cooling-cells = <2>;
@@ -64,6 +66,8 @@ CPU1: cpu@100 {
compatible = "qcom,kryo485";
reg = <0x0 0x100>;
enable-method = "psci";
cpu-idle-states = <&LITTLE_CPU_SLEEP_0
&CLUSTER_SLEEP_0>;
next-level-cache = <&L2_100>;
qcom,freq-domain = <&cpufreq_hw 0>;
#cooling-cells = <2>;
@@ -79,6 +83,8 @@ CPU2: cpu@200 {
compatible = "qcom,kryo485";
reg = <0x0 0x200>;
enable-method = "psci";
cpu-idle-states = <&LITTLE_CPU_SLEEP_0
&CLUSTER_SLEEP_0>;
next-level-cache = <&L2_200>;
qcom,freq-domain = <&cpufreq_hw 0>;
#cooling-cells = <2>;
@@ -93,6 +99,8 @@ CPU3: cpu@300 {
compatible = "qcom,kryo485";
reg = <0x0 0x300>;
enable-method = "psci";
cpu-idle-states = <&LITTLE_CPU_SLEEP_0
&CLUSTER_SLEEP_0>;
next-level-cache = <&L2_300>;
qcom,freq-domain = <&cpufreq_hw 0>;
#cooling-cells = <2>;
@@ -107,6 +115,8 @@ CPU4: cpu@400 {
compatible = "qcom,kryo485";
reg = <0x0 0x400>;
enable-method = "psci";
cpu-idle-states = <&BIG_CPU_SLEEP_0
&CLUSTER_SLEEP_0>;
next-level-cache = <&L2_400>;
qcom,freq-domain = <&cpufreq_hw 1>;
#cooling-cells = <2>;
@@ -121,6 +131,8 @@ CPU5: cpu@500 {
compatible = "qcom,kryo485";
reg = <0x0 0x500>;
enable-method = "psci";
cpu-idle-states = <&BIG_CPU_SLEEP_0
&CLUSTER_SLEEP_0>;
next-level-cache = <&L2_500>;
qcom,freq-domain = <&cpufreq_hw 1>;
#cooling-cells = <2>;
@@ -135,6 +147,8 @@ CPU6: cpu@600 {
compatible = "qcom,kryo485";
reg = <0x0 0x600>;
enable-method = "psci";
cpu-idle-states = <&BIG_CPU_SLEEP_0
&CLUSTER_SLEEP_0>;
next-level-cache = <&L2_600>;
qcom,freq-domain = <&cpufreq_hw 1>;
#cooling-cells = <2>;
@@ -149,6 +163,8 @@ CPU7: cpu@700 {
compatible = "qcom,kryo485";
reg = <0x0 0x700>;
enable-method = "psci";
cpu-idle-states = <&BIG_CPU_SLEEP_0
&CLUSTER_SLEEP_0>;
next-level-cache = <&L2_700>;
qcom,freq-domain = <&cpufreq_hw 2>;
#cooling-cells = <2>;
@@ -193,6 +209,40 @@ core7 {
};
};
};
idle-states {
entry-method = "psci";
LITTLE_CPU_SLEEP_0: cpu-sleep-0-0 {
compatible = "arm,idle-state";
idle-state-name = "little-rail-power-collapse";
arm,psci-suspend-param = <0x40000004>;
entry-latency-us = <355>;
exit-latency-us = <909>;
min-residency-us = <3934>;
local-timer-stop;
};
BIG_CPU_SLEEP_0: cpu-sleep-1-0 {
compatible = "arm,idle-state";
idle-state-name = "big-rail-power-collapse";
arm,psci-suspend-param = <0x40000004>;
entry-latency-us = <241>;
exit-latency-us = <1461>;
min-residency-us = <4488>;
local-timer-stop;
};
CLUSTER_SLEEP_0: cluster-sleep-0 {
compatible = "arm,idle-state";
idle-state-name = "cluster-power-collapse";
arm,psci-suspend-param = <0x400000F4>;
entry-latency-us = <3263>;
exit-latency-us = <6562>;
min-residency-us = <9987>;
local-timer-stop;
};
};
};
firmware {