mirrors/linux
2
0
Fork 0
mirror of https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git synced 2026-05-14 15:55:28 -04:00
Code Issues Packages Projects Releases Wiki Activity
1,294,533 Commits 1 Branch 930 Tags
095105496e7dde554aa3dc01189779759d976c2d
Commit Graph

1294533 Commits

This Branch
This Branch
All Branches
Author SHA1 Message Date
Lad Prabhakar
095105496e arm64: dts: renesas: r9a09g057: Add WDT0-WDT3 nodes 
Add WDT0-WDT3 nodes to RZ/V2H(P) ("R9A09G057") SoC DTSI.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/20240828124134.188864-8-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
 2024-09-02 11:23:57 +02:00
Lad Prabhakar
2cc5322acd arm64: dts: renesas: r9a09g057: Add SDHI0-SDHI2 nodes 
Add SDHI0-SDHI2 nodes to RZ/V2H(P) ("R9A09G057") SoC DTSI.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/20240828124134.188864-7-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
 2024-09-02 11:23:57 +02:00
Lad Prabhakar
04c80e7bed arm64: dts: renesas: r9a09g057: Add RIIC0-RIIC8 nodes 
Add RIIC0-RIIC8 nodes to RZ/V2H(P) ("R9A09G057") SoC DTSI.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/20240828124134.188864-6-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
 2024-09-02 11:23:57 +02:00
Lad Prabhakar
e3dc593ef3 arm64: dts: renesas: r9a09g057: Add OSTM0-OSTM7 nodes 
Add OSTM0-OSTM7 nodes to RZ/V2H(P) ("R9A09G057") SoC DTSI.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/20240828124134.188864-5-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
 2024-09-02 11:23:57 +02:00
Lad Prabhakar
2fddca72dc arm64: dts: renesas: Add initial DTS for RZ/V2H EVK board 
Add initial DTS for RZ/V2H EVK board (based on R9A09G057H44), adding
the below support:
- Memory
- Clock inputs
- PINCTRL
- SCIF

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/20240828124134.188864-4-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
 2024-09-02 11:23:57 +02:00
Lad Prabhakar
740cf2a2d6 arm64: dts: renesas: Add initial SoC DTSI for RZ/V2H(P) SoC 
Add initial SoC DTSI for Renesas RZ/V2H(P) ("R9A09G057") SoC, below are
the list of blocks added:
- EXT CLKs
- 4X CA55
- SCIF
- PFC
- CPG
- SYS
- GIC
- ARMv8 Timer

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/20240828124134.188864-3-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
 2024-09-02 11:23:57 +02:00
Geert Uytterhoeven
bbdee962b2 Merge tag 'renesas-r9a09g057-dt-binding-defs-tag' into renesas-dts-for-v6.12 
Renesas RZ/V2H DT Binding Definitions

DT bindings and binding definitions for the Renesas RZ/V2H (R9A09G057)
SoC, shared by driver and DT source files.
 2024-09-02 11:23:32 +02:00
Lad Prabhakar
15bba65c19 dt-bindings: soc: renesas: Document RZ/V2H EVK board 
Add "renesas,rzv2h-evk" which targets the Renesas RZ/V2H ("R9A09G057")
EVK board.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Acked-by: Rob Herring (Arm) <robh@kernel.org>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/20240828124134.188864-2-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
 2024-09-02 11:18:39 +02:00
Lad Prabhakar
afec1aba08 dt-bindings: clock: renesas: Document RZ/V2H(P) SoC CPG 
Document the device tree bindings for the Renesas RZ/V2H(P) SoC
Clock Pulse Generator (CPG).

CPG block handles the below operations:
- Generation and control of clock signals for the IP modules
- Generation and control of resets
- Control over booting
- Low power consumption and power supply domains

Also define constants for the core clocks of the RZ/V2H(P) SoC. Note the
core clocks are a subset of the ones which are listed as part of section
4.4.2 of HW manual Rev.1.01 which cannot be controlled by CLKON register.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/20240729202645.263525-2-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
 2024-09-02 11:17:51 +02:00
Biju Das
cc49fcd0bc arm64: dts: renesas: r9a07g043u11-smarc: Enable DU 
Enable the Display Unit and link with the HDMI add-on board connected
to the parallel connector on the RZ/G2UL SMARC EVK by using a Device
Tree overlay.

Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/20240826101648.176647-1-biju.das.jz@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
 2024-08-29 10:41:07 +02:00
Biju Das
7fe722ee4c arm64: dts: renesas: rzg2lc-smarc: Enable HDMI audio 
Enable HDMI audio on the RZ/G2LC SMARC EVK.  Set SW 1.5 on the SoM
module to the OFF position to turn on HDMI audio.

Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/20240826090803.56176-3-biju.das.jz@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
 2024-08-29 10:38:56 +02:00
Biju Das
73573fde91 arm64: dts: renesas: rzg2l-smarc: Enable HDMI audio 
Enable HDMI audio on the RZ/{G2L,V2L} SMARC EVK.

Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/20240826090803.56176-2-biju.das.jz@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
 2024-08-29 10:38:25 +02:00
Biju Das
e895a80660 arm64: dts: renesas: r9a07g043u: Add DU node 
Add DU node to RZ/G2UL SoC DTSI.

Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/20240822162320.5084-4-biju.das.jz@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
 2024-08-23 15:52:45 +02:00
Yoshihiro Shimoda
6ca537aa16 arm64: dts: renesas: white-hawk-cpu-common: Enable PCIe Host ch0 
Enable PCIe Host controller channel 0 on R-Car V4H White Hawk boards.

Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/20240822004454.1087582-3-yoshihiro.shimoda.uh@renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
 2024-08-23 15:52:45 +02:00
Yoshihiro Shimoda
9b3e59b707 arm64: dts: renesas: r8a779g0: Add PCIe Host and Endpoint nodes 
Add PCIe Host and Endpoint nodes for R-Car V4H (R8A779G0).

Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/20240822004454.1087582-2-yoshihiro.shimoda.uh@renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
 2024-08-23 15:52:45 +02:00
Claudiu Beznea
1670b7cc71 arm64: dts: renesas: rzg3s-smarc-som: Enable I2C1 node 
Enable I2C1 node.

Signed-off-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/20240820101918.2384635-12-claudiu.beznea.uj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
 2024-08-23 15:52:36 +02:00
Claudiu Beznea
268a995833 arm64: dts: renesas: rzg3s-smarc: Enable I2C0 node 
Enable I2C0 node.

Signed-off-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/20240820101918.2384635-11-claudiu.beznea.uj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
 2024-08-23 15:52:27 +02:00
Claudiu Beznea
a502d6e784 arm64: dts: renesas: r9a08g045: Add I2C nodes 
The Renesas RZ/G3S SoC has 4 I2C channels. Add DT nodes for them.

Signed-off-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/20240820101918.2384635-10-claudiu.beznea.uj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
 2024-08-23 15:52:27 +02:00
Biju Das
6bfd974d03 arm64: dts: renesas: r9a07g043u: Add VSPD node 
Add VSPD node to RZ/G2UL SoC DTSI.

Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/20240805131709.101679-3-biju.das.jz@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
 2024-08-23 15:52:19 +02:00
Biju Das
a94a244a5b arm64: dts: renesas: r9a07g043u: Add FCPVD node 
Add FCPVD node to RZ/G2UL SoC DTSI.

Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/20240805131709.101679-2-biju.das.jz@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
 2024-08-23 15:50:04 +02:00
Lad Prabhakar
833948fb2b arm64: dts: renesas: r9a07g044: Correct GICD and GICR sizes 
The RZ/G2L(C) SoC is equipped with the GIC-600. The GICD is 64KiB +
64KiB for the MBI alias (in total 128KiB), and the GICR is 128KiB per
CPU.

Fixes: 68a4552529 ("arm64: dts: renesas: Add initial DTSI for RZ/G2{L,LC} SoC's")
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Link: https://lore.kernel.org/20240730122436.350013-5-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
 2024-08-23 15:43:27 +02:00
Lad Prabhakar
45afa9eacb arm64: dts: renesas: r9a07g054: Correct GICD and GICR sizes 
The RZ/V2L SoC is equipped with the GIC-600. The GICD is 64KiB + 64KiB
for the MBI alias (in total 128KiB), and the GICR is 128KiB per CPU.

Fixes: 7c2b8198f4 ("arm64: dts: renesas: Add initial DTSI for RZ/V2L SoC")
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Link: https://lore.kernel.org/20240730122436.350013-4-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
 2024-08-23 15:43:27 +02:00
Lad Prabhakar
ab39547f73 arm64: dts: renesas: r9a07g043u: Correct GICD and GICR sizes 
The RZ/G2UL SoC is equipped with the GIC-600. The GICD is 64KiB + 64KiB
for the MBI alias (in total 128KiB), and the GICR is 128KiB per CPU.

Despite the RZ/G2UL SoC being single-core, it has two instances of GICR.

Fixes: cf40c9689e ("arm64: dts: renesas: Add initial DTSI for RZ/G2UL SoC")
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Link: https://lore.kernel.org/20240730122436.350013-3-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
 2024-08-23 15:43:27 +02:00
Lad Prabhakar
ec9532628e arm64: dts: renesas: r9a08g045: Correct GICD and GICR sizes 
The RZ/G3S SoC is equipped with the GIC-600. The GICD is 64KiB + 64KiB
for the MBI alias (in total 128KiB), and the GICR is 128KiB per CPU.

Despite the RZ/G3S SoC being single-core, it has two instances of GICR.

Fixes: e20396d65b ("arm64: dts: renesas: Add initial DTSI for RZ/G3S SoC")
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Link: https://lore.kernel.org/20240730122436.350013-2-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
 2024-08-23 15:43:26 +02:00
Biju Das
bdfa062d14 arm64: dts: renesas: r9a07g0{43,44,54}: Move regulator-vbus device node 
Move regulator-vbus device node from common to the usbphy-ctrl device node
of the individual SoC dtsi's as it embeds the vbus regulator.

Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/20240715140705.334183-1-biju.das.jz@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
 2024-08-23 15:43:26 +02:00
Niklas Söderlund
3d8e475bd7 arm64: dts: renesas: white-hawk-single: Wire-up Ethernet TSN 
On the V4H White Hawk Single board as opposed to the Quad board the
Ethernet TSN is wired up to a PHY (Marvel 88Q2110/QFN40).  Wire up the
connection and enable the TSN0.

Signed-off-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/20240701145012.2342868-3-niklas.soderlund+renesas@ragnatech.se
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
 2024-08-23 15:42:21 +02:00
Niklas Söderlund
c7b4d6e7fa arm64: dts: renesas: r8a779g0: R-Car Ethernet TSN support 
Add Ethernet TSN support for R-Car V4H.

Signed-off-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/20240701145012.2342868-2-niklas.soderlund+renesas@ragnatech.se
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
 2024-08-23 15:42:21 +02:00
Geert Uytterhoeven
ab7d885a33 arm64: dts: renesas: gray-hawk-single: Add CAN-FD support 
Enable confirmed-working CAN-FD channels 0 and 1 on the Gray Hawk Single
development board:
  - Channel 0 uses an NXP TJR1443AT CAN transceiver, which must be
    enabled through a GPIO,
  - Channels 1-3 use Microchip MCP2558FD-H/SN CAN transceivers, which do
    not need explicit description, but channels 2-3 do not seem to work.

Inspired by a patch for Gray Hawk in the BSP by Duy Nguyen.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/7c2a06b7abec4ce1025761003ccdbce559789708.1722519717.git.geert+renesas@glider.be
 2024-08-20 09:40:52 +02:00
Duy Nguyen
b3749d434e arm64: dts: renesas: r8a779h0: Add CAN-FD node 
Add device nodes for the CAN-FD interface and the related external CAN
clock on the Renesas R-Car V4M (R8A779H0) SoC.

Signed-off-by: Duy Nguyen <duy.nguyen.rh@renesas.com>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/43b786db932f5c53103d34fd530365c445c0425e.1722519717.git.geert+renesas@glider.be
 2024-08-20 09:40:52 +02:00
Claudiu Beznea
054a83a154 arm64: dts: renesas: r9a08g045: Add DMAC node 
Add DMAC node.

Signed-off-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/20240711123405.2966302-4-claudiu.beznea.uj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
 2024-08-02 11:15:00 +02:00
Paul Barker
d98121492b arm64: dts: renesas: rzg2ul: Set Ethernet PVDD to 1.8V 
On the RZ/G2UL & RZ/Five SMARC SOMs, the RGMII interface between the SoC
and the Ethernet PHY operates at 1.8V.

The power supply for this interface may be correctly configured in
u-boot, but the kernel should not be relying on this. Now that the
RZ/G2L pinctrl driver supports configuring the Ethernet power supply
voltage, we can simply specify the desired voltage in the device tree.

Signed-off-by: Paul Barker <paul.barker.ct@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Link: https://lore.kernel.org/20240625200316.4282-10-paul.barker.ct@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
 2024-08-02 11:13:24 +02:00
Paul Barker
831d521927 arm64: dts: renesas: rzg2lc: Set Ethernet PVDD to 1.8V 
On the RZ/G2LC SMARC SOM, the RGMII interface between the SoC and the
Ethernet PHY operates at 1.8V.

The power supply for this interface may be correctly configured in
u-boot, but the kernel should not be relying on this. Now that the
RZ/G2L pinctrl driver supports configuring the Ethernet power supply
voltage, we can simply specify the desired voltage in the device tree.

Signed-off-by: Paul Barker <paul.barker.ct@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Link: https://lore.kernel.org/20240625200316.4282-9-paul.barker.ct@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
 2024-08-02 11:13:24 +02:00
Paul Barker
96a3f52570 arm64: dts: renesas: rzg2l: Set Ethernet PVDD to 1.8V 
On the RZ/G2L & RZ/V2L SMARC SOMs, the RGMII interface between the SoC
and the Ethernet PHY operates at 1.8V.

The power supply for this interface may be correctly configured in
u-boot, but the kernel should not be relying on this. Now that the
RZ/G2L pinctrl driver supports configuring the Ethernet power supply
voltage, we can simply specify the desired voltage in the device tree.

Signed-off-by: Paul Barker <paul.barker.ct@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Link: https://lore.kernel.org/20240625200316.4282-8-paul.barker.ct@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
 2024-08-02 11:13:24 +02:00
Paul Barker
73302ad17e arm64: dts: renesas: rzg2ul: Enable Ethernet TXC output 
Configure ET0_TXC and ET1_TXC as outputs on the Renesas RZ/G2UL and
RZ/Five SMARC SoMs, as per RGMII specification.

Signed-off-by: Paul Barker <paul.barker.ct@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Link: https://lore.kernel.org/20240625200316.4282-7-paul.barker.ct@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
 2024-08-02 11:13:24 +02:00
Paul Barker
dabee5f143 arm64: dts: renesas: rzg2lc: Enable Ethernet TXC output 
Configure ET0_TXC and ET1_TXC as outputs on the Renesas RZ/G2LC SMARC
SoM, as per RGMII specification.

Signed-off-by: Paul Barker <paul.barker.ct@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Link: https://lore.kernel.org/20240625200316.4282-6-paul.barker.ct@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
 2024-08-02 11:13:24 +02:00
Paul Barker
41c934da48 arm64: dts: renesas: rzg2l: Enable Ethernet TXC output 
Configure ET0_TXC and ET1_TXC as outputs on the Renesas RZ/[GV]2L SMARC
SoMs, as per RGMII specification.

Signed-off-by: Paul Barker <paul.barker.ct@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Link: https://lore.kernel.org/20240625200316.4282-5-paul.barker.ct@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
 2024-08-02 11:13:24 +02:00
Khanh Le
ca999750b9 arm64: dts: renesas: r8a779h0: Add PWM device nodes 
Add device nodes for the PWM timers on the Renesas R-Car V4M (R8A779H0)
SoC.

Signed-off-by: Khanh Le <khanh.le.xr@renesas.com>
[wsa: rebased, dropped TPU part to be upstreamed seperately]
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Tested-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/20240725194906.14644-11-wsa+renesas@sang-engineering.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
 2024-07-30 10:27:01 +02:00
Geert Uytterhoeven
1200525fbc arm64: dts: renesas: gray-hawk-single: Add GP LEDs 
Describe the three General Purpose LEDs on the Gray Hawk Single board,
so they can be used as indicator LEDs.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/408eac88ec61cf4c56c96397fbb93b4b8c2c8f5b.1721649057.git.geert+renesas@glider.be
 2024-07-29 11:51:36 +02:00
Geert Uytterhoeven
d4d9a2fbea arm64: dts: renesas: gray-hawk-single: Add push switches 
Describe the three Push Switches on the Gray Hawk Single board, so they
can be used for user input.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/41b8277d4b630e0c296375888d9b958448d02cde.1721649057.git.geert+renesas@glider.be
 2024-07-29 11:51:36 +02:00
Geert Uytterhoeven
cd0a847aa6 arm64: dts: renesas: r8a779h0: Add missing iommus properties 
Add missing iommus properties to all EthernetAVB device nodes that still
lack them.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/1ed05b12961662e8fed2f1a6790f5ae3b595f509.1720430758.git.geert+renesas@glider.be
 2024-07-29 11:51:36 +02:00
Geert Uytterhoeven
c313c77bab arm64: dts: renesas: r8a779g0: Add missing iommus properties 
Add missing iommus properties to all EthernetAVB and Frame Compression
Processor device nodes.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/bd394a7e330610d76d98cd5d230c0b3fcbf5c3e4.1720430758.git.geert+renesas@glider.be
 2024-07-29 11:51:36 +02:00
Geert Uytterhoeven
2c44893ba3 arm64: dts: renesas: r8a779a0: Add missing iommus properties 
Add missing iommus properties to all EthernetAVB, DMAC, and Frame
Compression Processor device nodes.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/39da0dddf7e7f1fde2b2d83444af7bb5ae73b922.1720430758.git.geert+renesas@glider.be
 2024-07-29 11:51:36 +02:00
Geert Uytterhoeven
58026a0353 arm64: dts: renesas: r8a77980: Add missing iommus properties 
Add missing iommus properties to the Gigabit Ethernet and Frame
Compression Processor device nodes.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/3259f4906e20ea626dcd45b7dd310155570b399c.1720430758.git.geert+renesas@glider.be
 2024-07-29 11:51:36 +02:00
Geert Uytterhoeven
da840cce10 arm64: dts: renesas: r8a77970: Add missing iommus property 
Add the missing iommus property to the Frame Compression Processor
device node.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/41445bdf72a40c9deb36b88e8360b50eb2836919.1720430758.git.geert+renesas@glider.be
 2024-07-29 11:51:36 +02:00
Geert Uytterhoeven
bc909045fd arm64: dts: renesas: r8a77965: Add missing iommus properties 
Add missing iommus properties to all Audio-DMAC, Serial-ATA, and Frame
Compression Processor device nodes.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/79fe31020799ba508d16ff8dbd4296f239ecf76a.1720430758.git.geert+renesas@glider.be
 2024-07-29 11:51:36 +02:00
Geert Uytterhoeven
fc50fd9ab5 arm64: dts: renesas: r8a77961: Add missing iommus properties 
Add missing iommus properties to Frame Compression Processor device
nodes that still lack them.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/25f8764edcb4f83f4dc3acfae36fa1fcbfd10cd7.1720430758.git.geert+renesas@glider.be
 2024-07-29 11:51:35 +02:00
Geert Uytterhoeven
9e2494ba0a arm64: dts: renesas: r8a77960: Add missing iommus properties 
Add missing iommus properties to Frame Compression Processor device
nodes that still lack them.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/21e6b8dc21d8f1605d1cf5f081811b55e33ce04d.1720430758.git.geert+renesas@glider.be
 2024-07-29 11:51:35 +02:00
Geert Uytterhoeven
3d7de696a1 arm64: dts: renesas: r8a774e1: Add missing iommus properties 
Add missing iommus properties to all Frame Compression Processor device
nodes.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/b2a1a5fd41c78c881e6e410b720e5e12572e2668.1720430758.git.geert+renesas@glider.be
 2024-07-29 11:51:35 +02:00
Geert Uytterhoeven
b4bcb7792f arm64: dts: renesas: r8a774c0: Add missing iommus properties 
Add missing iommus properties to all SDHI device nodes.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/299b47bf40d4d2d44beff46b3323c471915c714d.1720430758.git.geert+renesas@glider.be
 2024-07-29 11:51:35 +02:00
Geert Uytterhoeven
1d325f5060 arm64: dts: renesas: r8a774b1: Add missing iommus properties 
Add missing iommus properties to all Audio-DMAC, SDHI, Serial-ATA, and
Frame Compression Processor device nodes.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/2d6a97d2df0532c661a2be6bafc9e5061c645197.1720430758.git.geert+renesas@glider.be
 2024-07-29 11:51:35 +02:00