mirrors/linux
2
0
Fork 0
mirror of https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git synced 2026-05-14 02:59:19 -04:00
Code Issues Packages Projects Releases Wiki Activity

arm64: dts: renesas: r9a07g043u: Add VSPD node

Browse Source 
Add VSPD node to RZ/G2UL SoC DTSI.

Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/20240805131709.101679-3-biju.das.jz@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
This commit is contained in:
Biju Das
2024-08-05 14:17:06 +01:00
committed by Geert Uytterhoeven
parent a94a244a5b
commit 6bfd974d03
1 changed files with 13 additions and 0 deletions
Download Patch File Download Diff File Expand all files Collapse all files

13
arch/arm64/boot/dts/renesas/r9a07g043u.dtsi
View File

@@ -129,6 +129,19 @@ csi2cru: endpoint@0 {
};
};
vspd: vsp@10870000 {
compatible = "renesas,r9a07g043u-vsp2", "renesas,r9a07g044-vsp2";
reg = <0 0x10870000 0 0x10000>;
interrupts = <SOC_PERIPHERAL_IRQ(149) IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD R9A07G043_LCDC_CLK_A>,
<&cpg CPG_MOD R9A07G043_LCDC_CLK_P>,
<&cpg CPG_MOD R9A07G043_LCDC_CLK_D>;
clock-names = "aclk", "pclk", "vclk";
power-domains = <&cpg>;
resets = <&cpg R9A07G043_LCDC_RESET_N>;
renesas,fcp = <&fcpvd>;
};
fcpvd: fcp@10880000 {
compatible = "renesas,r9a07g043u-fcpvd", "renesas,fcpv";
reg = <0 0x10880000 0 0x10000>;