Dmitry Baryshkov
021fd8ca0c
drm/msm/dpu: drop vbif_idx from WB configuration
...
All MDP / DPU implementations except for MSM8996 use VBIF_RT (or the
only VBIF) for WB2. Writeback on MSM8996 is not supported (nor planned
to be supported). In order to simplify the driver, drop the field form
the struct dpu_wb_cfg.
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com >
Patchwork: https://patchwork.freedesktop.org/patch/707778/
Link: https://lore.kernel.org/r/20260227-drop-vbif-nrt-v1-5-2b97d0438182@oss.qualcomm.com
[DB: also handled Eliza platform]
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com >
2026-03-25 08:06:20 +02:00
Dmitry Baryshkov
b26bfb5bf1
drm/msm/dpu: drop VBIF id, base and name from the catalog
...
For all the platforms VBIF id is VBIF_RT, the name and base are also
fixed. Drop those fields from the catalog.
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com >
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com >
Patchwork: https://patchwork.freedesktop.org/patch/707777/
Link: https://lore.kernel.org/r/20260227-drop-vbif-nrt-v1-4-2b97d0438182@oss.qualcomm.com
2026-03-25 08:06:20 +02:00
Dmitry Baryshkov
014390e30a
drm/msm/dpu: replace VBIF-related array with bare pointers
...
As we no longer have multiple VBIF instances, it doesn't make sense to
keep VBIF data as arrays. Drop the extra wrapping and keep only a single
instance of each of the structures.
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com >
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com >
Patchwork: https://patchwork.freedesktop.org/patch/707776/
Link: https://lore.kernel.org/r/20260227-drop-vbif-nrt-v1-3-2b97d0438182@oss.qualcomm.com
2026-03-25 08:06:20 +02:00
Dmitry Baryshkov
2c0c3d9d95
drm/msm/dpu: stop declaring VBIFs as an array in catalog
...
The driver handles a single VBIF instance, VBIF_RT. Stop declaring VBIFs
as an array in the DPU hardware catalog.
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com >
Patchwork: https://patchwork.freedesktop.org/patch/707774/
Link: https://lore.kernel.org/r/20260227-drop-vbif-nrt-v1-2-2b97d0438182@oss.qualcomm.com
[DB: handled Eliza platform]
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com >
2026-03-25 08:06:14 +02:00
Dmitry Baryshkov
cfb64b0926
drm/msm/dpu: drop VBIF_NRT handling
...
The second VBIF instance, VBIF_NRT, is only used for the separate inline
rotator block. It is unsupported by the DPU driver and will require a
separate driver (or separate instance of the DPU device).
The only possible user of VBIF_NRT is writeback on MSM8996, however
writeback on that platform is currently unsupported and it's not worth
keeping extra complexity for the sake of that single legacy platform.
None of the hardware catalogs entries actually declare VBIF_NRT, so it
is left in its default state.
Stop pretending that DPU driver cares about VBIF_NRT and drop it.
Reported-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com >
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com >
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com >
Patchwork: https://patchwork.freedesktop.org/patch/707773/
Link: https://lore.kernel.org/r/20260227-drop-vbif-nrt-v1-1-2b97d0438182@oss.qualcomm.com
2026-03-25 08:06:14 +02:00
Pengyu Luo
82159db437
drm/msm/dsi: fix hdisplay calculation for CMD mode panel
...
Commit ac47870fd7 ("drm/msm/dsi: fix hdisplay calculation when
programming dsi registers") incorrecly broke hdisplay calculation for
CMD mode by specifying incorrect number of bytes per transfer, fix it.
Fixes: ac47870fd7 ("drm/msm/dsi: fix hdisplay calculation when programming dsi registers")
Signed-off-by: Pengyu Luo <mitltlatltl@gmail.com >
Patchwork: https://patchwork.freedesktop.org/patch/709917/
Link: https://lore.kernel.org/r/20260307111250.105772-2-mitltlatltl@gmail.com
[DB: fixed commit message]
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com >
2026-03-25 08:06:14 +02:00
Pengyu Luo
2d51cfb77d
drm/msm/dsi: fix bits_per_pclk
...
mipi_dsi_pixel_format_to_bpp return dst bpp not src bpp, dst bpp may
not be the uncompressed data size. use src bpc * 3 to get src bpp,
this aligns with pclk rate calculation.
Fixes: ac47870fd7 ("drm/msm/dsi: fix hdisplay calculation when programming dsi registers")
Signed-off-by: Pengyu Luo <mitltlatltl@gmail.com >
Patchwork: https://patchwork.freedesktop.org/patch/709916/
Link: https://lore.kernel.org/r/20260307111250.105772-1-mitltlatltl@gmail.com
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com >
2026-03-25 08:06:14 +02:00
Cédric Bellegarde
961c900628
drm/msm/dpu: fix vblank IRQ registration before atomic_mode_set
...
dpu_encoder_toggle_vblank_for_crtc() can call control_vblank_irq()
at any time in response to a userspace vblank request, independently
of the atomic commit sequence. If this happens before the encoder's
first atomic_mode_set(), irq[INTR_IDX_RDPTR] is still zero.
Passing irq_idx=0 to dpu_core_irq_register_callback() is treated as
invalid, and DPU_IRQ_REG(0) and DPU_IRQ_BIT(0) produce misleading
values of 134217727 and 31 respectively due to unsigned wraparound
in the (irq_idx - 1) macros, resulting in the confusing error:
[dpu error]invalid IRQ=[134217727, 31]
Since irq[INTR_IDX_RDPTR] will be properly populated by
atomic_mode_set() and registered by irq_enable() as part of the
normal modeset sequence, silently skip the vblank IRQ registration
when the index has not yet been initialized. This matches the
existing pattern of the master encoder check above it.
Signed-off-by: Cédric Bellegarde <cedric.bellegarde@adishatz.org >
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com >
Patchwork: https://patchwork.freedesktop.org/patch/712752/
Link: https://lore.kernel.org/r/20260318171700.394945-1-cedric.bellegarde@adishatz.org
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com >
2026-03-25 08:06:14 +02:00
Dmitry Baryshkov
b9699dd862
drm/msm/dpu: don't try using 2 LMs if only one DSC is available
...
Current topology code will try using 2 LMs with just one DSC, which
breaks cases like SC7280 / Fairphone5. Forbid using 2 LMs split in such
a case.
Fixes: 1ce69c265a ("drm/msm/dpu: move resource allocation to CRTC")
Reported-by: Luca Weiss <luca.weiss@fairphone.com >
Closes: https://lore.kernel.org/r/DH1IKLU0YZYU.2SW4WYO7H3H4R@fairphone.com/
Tested-by: Luca Weiss <luca.weiss@fairphone.com > # qcm6490-fairphone-fp5
Patchwork: https://patchwork.freedesktop.org/patch/712386/
Link: https://lore.kernel.org/r/20260317-fix-3d-dsc-v1-1-88b54f62f659@oss.qualcomm.com
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com >
2026-03-25 08:06:09 +02:00
Krzysztof Kozlowski
536d2eb2bf
drm/msm/hdmi: Drop redundant 'int' for longs
...
'long' type is already an integer, so 'int' is redundant.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com >
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com >
Patchwork: https://patchwork.freedesktop.org/patch/711175/
Link: https://lore.kernel.org/r/20260311-drm-msm-hdmi-cleanup-v1-5-c5535245f6de@oss.qualcomm.com
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com >
2026-03-25 08:06:09 +02:00
Krzysztof Kozlowski
bc11794cfe
drm/msm/hdmi: Consistently use u32 instead of uint32_t
...
Linux coding style asks to use kernel types like u32 instead of uint32_t
and code already has it in other places, so unify the remaining pieces.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com >
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com >
Patchwork: https://patchwork.freedesktop.org/patch/711172/
Link: https://lore.kernel.org/r/20260311-drm-msm-hdmi-cleanup-v1-4-c5535245f6de@oss.qualcomm.com
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com >
2026-03-25 08:06:09 +02:00
Krzysztof Kozlowski
69c68ab38d
drm/msm/hdmi: Simplify with local 'dev' variable
...
msm_hdmi_dev_probe() function already stores pdev->dev in local
variable, so use it directly to make code simpler.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com >
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com >
Patchwork: https://patchwork.freedesktop.org/patch/711171/
Link: https://lore.kernel.org/r/20260311-drm-msm-hdmi-cleanup-v1-3-c5535245f6de@oss.qualcomm.com
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com >
2026-03-25 08:06:09 +02:00
Krzysztof Kozlowski
ae505afd62
drm/msm/hdmi: Avoid double error print on msm_hdmi_get_phy() failure
...
msm_hdmi_get_phy() already prints error messages on each error path
using dev_err_probe(), so final DRM_DEV_ERROR() would duplicate it and
possibly flood the dmesg on probe deferrals.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com >
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com >
Patchwork: https://patchwork.freedesktop.org/patch/711168/
Link: https://lore.kernel.org/r/20260311-drm-msm-hdmi-cleanup-v1-2-c5535245f6de@oss.qualcomm.com
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com >
2026-03-25 08:06:09 +02:00
Krzysztof Kozlowski
5a9a712b0b
drm/msm/hdmi: Simplify with dev_of_node()
...
Simplify chain of pointer dereferences with dev_of_node() which also
checks if 'dev' argument is non-NULL.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com >
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com >
Patchwork: https://patchwork.freedesktop.org/patch/711167/
Link: https://lore.kernel.org/r/20260311-drm-msm-hdmi-cleanup-v1-1-c5535245f6de@oss.qualcomm.com
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com >
2026-03-25 08:06:09 +02:00
Krzysztof Kozlowski
8c6c93b7db
drm/msm/hdmi: Fix wrong CTRL1 register used in writing info frames
...
Commit 384d2b03d0 ("drm/msm/hdmi: make use of the drm_connector_hdmi
framework") changed the unconditional register writes in few places to
updates: read, apply mask, write. The new code reads
REG_HDMI_INFOFRAME_CTRL1 register, applies fields/mask for
HDMI_INFOFRAME_CTRL0 register and finally writes to
HDMI_INFOFRAME_CTRL0. This difference between CTRL1 and CTRL0 looks
unintended and may result in wrong data being written to HDMI bridge
registers.
Cc: <stable@vger.kernel.org >
Fixes: 384d2b03d0 ("drm/msm/hdmi: make use of the drm_connector_hdmi framework")
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com >
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com >
Patchwork: https://patchwork.freedesktop.org/patch/711156/
Link: https://lore.kernel.org/r/20260311191620.245394-2-krzysztof.kozlowski@oss.qualcomm.com
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com >
2026-03-25 08:06:09 +02:00
Ben Dooks
fdbc6391b4
drm/msm/hdmi: make 'msm_hdmi_pm_ops' static
...
The struct 'msm_hdmi_pm_ops' is not used outside of the
file it is defined in, so make it static.
Fixes the following sparse warning:
drivers/gpu/drm/msm/hdmi/hdmi.c:432:1: warning: symbol 'msm_hdmi_pm_ops' was not declared. Should it be static?
Signed-off-by: Ben Dooks <ben.dooks@codethink.co.uk >
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com >
Patchwork: https://patchwork.freedesktop.org/patch/710583/
Link: https://lore.kernel.org/r/20260310132501.195954-1-ben.dooks@codethink.co.uk
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com >
2026-03-25 08:06:09 +02:00
Konrad Dybcio
d19faa0dcc
drm/msm/mdss: Add a TODO for better managing the MDSS clock power state
...
There's a small window where the MDP clock could be set to a high rate
(say, from the bootloader) without a corresponding RPM(H)PD vote to
back it up. This is normally not an issue, but could be, if rmmod fails
to shut down the display driver cleanly, and the module is inserted
again, or when the providers' .sync_state has timed out.
Mark a TODO to fix it one day. Linking the relevant discussion below.
Link: https://lore.kernel.org/linux-arm-msm/d5c4eed5-bd87-4156-b178-2d78140ec8a9@oss.qualcomm.com/
Signed-off-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com >
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com >
Patchwork: https://patchwork.freedesktop.org/patch/710572/
Link: https://lore.kernel.org/r/20260310-topic-mdss_power_todo-v1-1-59457b8b7486@oss.qualcomm.com
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com >
2026-03-25 08:06:09 +02:00
Pengyu Luo
958adefc4c
drm/msm/dsi: add the missing parameter description
...
Add a description for is_bonded_dsi in dsi_adjust_pclk_for_compression
to match the existing kernel-doc comment.
Fixes: e4eb11b34d ("drm/msm/dsi: fix pclk rate calculation for bonded dsi")
Reported-by: kernel test robot <lkp@intel.com >
Closes: https://lore.kernel.org/oe-kbuild-all/202603080314.XeqyRZ7A-lkp@intel.com/
Signed-off-by: Pengyu Luo <mitltlatltl@gmail.com >
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com >
Patchwork: https://patchwork.freedesktop.org/patch/710112/
Link: https://lore.kernel.org/r/20260309100254.877801-1-mitltlatltl@gmail.com
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com >
2026-03-25 08:06:09 +02:00
Yuanjie Yang
bc1dccc518
drm/msm/dpu: fix mismatch between power and frequency
...
During DPU runtime suspend, calling dev_pm_opp_set_rate(dev, 0) drops
the MMCX rail to MIN_SVS while the core clock frequency remains at its
original (highest) rate. When runtime resume re-enables the clock, this
may result in a mismatch between the rail voltage and the clock rate.
For example, in the DPU bind path, the sequence could be:
cpu0: dev_sync_state -> rpmhpd_sync_state
cpu1: dpu_kms_hw_init
timeline 0 ------------------------------------------------> t
After rpmhpd_sync_state, the voltage performance is no longer guaranteed
to stay at the highest level. During dpu_kms_hw_init, calling
dev_pm_opp_set_rate(dev, 0) drops the voltage, causing the MMCX rail to
fall to MIN_SVS while the core clock is still at its maximum frequency.
When the power is re-enabled, only the clock is enabled, leading to a
situation where the MMCX rail is at MIN_SVS but the core clock is at its
highest rate. In this state, the rail cannot sustain the clock rate,
which may cause instability or system crash.
Remove the call to dev_pm_opp_set_rate(dev, 0) from dpu_runtime_suspend
to ensure the correct vote is restored when DPU resumes.
Fixes: b0530eb119 ("drm/msm/dpu: Use OPP API to set clk/perf state")
Signed-off-by: Yuanjie Yang <yuanjie.yang@oss.qualcomm.com >
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com >
Patchwork: https://patchwork.freedesktop.org/patch/710077/
Link: https://lore.kernel.org/r/20260309063720.13572-1-yuanjie.yang@oss.qualcomm.com
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com >
2026-03-25 08:06:08 +02:00
Pengyu Luo
6113aaf7a5
dt-bindings: display: msm: Document DSI controller and DSI PHY on SC8280XP
...
Document DSI controller and DSI phy on SC8280XP platform.
Signed-off-by: Pengyu Luo <mitltlatltl@gmail.com >
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com >
Patchwork: https://patchwork.freedesktop.org/patch/709947/
Link: https://lore.kernel.org/r/20260308064835.479356-4-mitltlatltl@gmail.com
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com >
2026-03-25 08:06:08 +02:00
Pengyu Luo
1607c084b1
dt-bindings: display/msm: dsi-controller-main: Add SC8280XP
...
Since SC8280XP and SA8775P have the same DSI version(2.5.1), then we
fallback to SA8775P compatible.
Signed-off-by: Pengyu Luo <mitltlatltl@gmail.com >
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com >
Patchwork: https://patchwork.freedesktop.org/patch/709944/
Link: https://lore.kernel.org/r/20260308064835.479356-3-mitltlatltl@gmail.com
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com >
2026-03-25 08:06:08 +02:00
Pengyu Luo
59f6bdf913
dt-bindings: display: msm-dsi-phy-7nm: Add SC8280XP
...
Since SC8280XP and SA8775P have the same values for the REVISION_ID
registers, then we fallback to SA8775P compatible.
Signed-off-by: Pengyu Luo <mitltlatltl@gmail.com >
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com >
Patchwork: https://patchwork.freedesktop.org/patch/709943/
Link: https://lore.kernel.org/r/20260308064835.479356-2-mitltlatltl@gmail.com
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com >
2026-03-25 08:06:08 +02:00
Krzysztof Kozlowski
3e64e6959d
drm/msm/mdss: Add support for Eliza SoC
...
Add support for the Qualcomm Eliza SoC platform.
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com >
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com >
Patchwork: https://patchwork.freedesktop.org/patch/708874/
Link: https://lore.kernel.org/r/20260304-drm-display-eliza-v2-8-ea0579f62358@oss.qualcomm.com
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com >
2026-03-25 08:06:08 +02:00
Krzysztof Kozlowski
0eb707bbc7
drm/msm/dpu: Add support for Eliza SoC
...
Add support for DPU (v12.4) on Qualcomm Eliza SoC, with one
incomplete/skipped part: HDMI interface (INT_4).
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com >
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com >
Patchwork: https://patchwork.freedesktop.org/patch/708879/
Link: https://lore.kernel.org/r/20260304-drm-display-eliza-v2-7-ea0579f62358@oss.qualcomm.com
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com >
2026-03-25 08:06:08 +02:00
Krzysztof Kozlowski
0a40e2e91b
dt-bindings: display/msm: qcom,eliza-mdss: Add Eliza SoC
...
Add MDSS/MDP display subsystem for Qualcomm Eliza SoC, being overall a
minor revision change against SM8750, but coming with few different
components, like different DSI PHY, missing DP1 and added HDMI.
The binding does not include HDMI description yet.
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com >
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com >
Patchwork: https://patchwork.freedesktop.org/patch/708878/
Link: https://lore.kernel.org/r/20260304-drm-display-eliza-v2-5-ea0579f62358@oss.qualcomm.com
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com >
2026-03-25 08:06:08 +02:00
Krzysztof Kozlowski
df76187341
dt-bindings: display/msm: qcom,sm8650-dpu: Add Eliza SoC
...
Add DPU (v12.4) for Qualcomm Eliza SoC which has noticeable differences
against SM8750 (v12.0) of mostly removing blocks:
- INTF_3 paired with INTF_0 (no DP1),
- Removed CTL4-5 blocks,
- Removed VIG2-3 and DMA4-5,
- Removed LM4-7, DSPP3, PINGPONG4-7, MERGE4-5 and several DSC blocks,
- Added HDMI interface.
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com >
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com >
Patchwork: https://patchwork.freedesktop.org/patch/708872/
Link: https://lore.kernel.org/r/20260304-drm-display-eliza-v2-4-ea0579f62358@oss.qualcomm.com
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com >
2026-03-25 08:06:08 +02:00
Krzysztof Kozlowski
c01cca4007
dt-bindings: display/msm: dsi-controller-main: Add Eliza SoC
...
Add DSI controller Qualcomm Eliza SoC using exactly the same block as
SM8750.
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com >
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com >
Acked-by: Rob Herring (Arm) <robh@kernel.org >
Patchwork: https://patchwork.freedesktop.org/patch/708867/
Link: https://lore.kernel.org/r/20260304-drm-display-eliza-v2-3-ea0579f62358@oss.qualcomm.com
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com >
2026-03-25 08:06:08 +02:00
Krzysztof Kozlowski
4a0172e8a4
dt-bindings: display/msm: dsi-phy-7nm: Add Eliza SoC
...
Add DSI PHY 4nm v5.2.4 for the Qualcomm Eliza SoC, fully compatible with
SM8650. Note that this DSI PHY, unlike the Eliza MDSS DSI, is not
compatible with SM8750.
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com >
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com >
Acked-by: Rob Herring (Arm) <robh@kernel.org >
Patchwork: https://patchwork.freedesktop.org/patch/708866/
Link: https://lore.kernel.org/r/20260304-drm-display-eliza-v2-2-ea0579f62358@oss.qualcomm.com
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com >
2026-03-25 08:06:08 +02:00
Krzysztof Kozlowski
069a1db190
dt-bindings: display/msm: dp-controller: Add Eliza SoC
...
Add DisplayPort controller for Qualcomm Eliza SoC fully compatible with
SM8650. The device looks very similar to SM8750 (same DP TX block
v1.5.1) but with a differences in DP PHY: Eliza and SM8650 use DP PHY
4nm v7.0, SM8750 uses 3nm v8.0.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com >
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com >
Acked-by: Rob Herring (Arm) <robh@kernel.org >
Patchwork: https://patchwork.freedesktop.org/patch/708864/
Link: https://lore.kernel.org/r/20260304-drm-display-eliza-v2-1-ea0579f62358@oss.qualcomm.com
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com >
2026-03-25 08:06:08 +02:00
Konrad Dybcio
a6f081ec4c
drm/msm/mdp5: Remove MSM8974v1
...
To the best of my knowledge, the v1 version of this SoC had been
superseded before any device was released on the market. Everywhere
else in the kernel, there are assumptions about the SoC being revision
2 or the later MSM8974PRO.
Remove the config for that flavor of MDP. To bring the naming in line
with the rest of the kernel, remove the v2 suffix from the remaining
config.
Suggested-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com >
Signed-off-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com >
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com >
Patchwork: https://patchwork.freedesktop.org/patch/708112/
Link: https://lore.kernel.org/r/20260302-topic-goodnight_8974v1-v1-1-e0006f7a0526@oss.qualcomm.com
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com >
2026-03-25 08:06:08 +02:00
Dmitry Baryshkov
b21e85400c
drm/msm: add missing MODULE_DEVICE_ID definitions
...
The drm/msm module bundles several drivers, each of them having a
separate OF match table, however only MDSS (subsystem), KMS devices and
GPU have corresponding MODULE_DEVICE_ID tables.
Add MODULE_DEVICE_ID to the display-related driver and to all other
drivers in this module, simplifying userspace job.
Fixes: 060530f1ea ("drm/msm: use componentised device support")
Reported-by: Loïc Minier <loic.minier@oss.qualcomm.com >
Patchwork: https://patchwork.freedesktop.org/patch/707960/
Link: https://lore.kernel.org/r/20260228-msm-device-id-v2-1-24b085919444@oss.qualcomm.com
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com >
2026-03-25 08:06:03 +02:00
Dmitry Baryshkov
b0907ee59e
drm/msm/dpu: enable virtual planes by default
...
Turn on the switch and use virtual planes by default, enhancing
utilisation of the display pipelines. It is still possible to use legacy
implementation by using `msm.dpu_use_virtual_planes=false` kernel boot
parameter.
Acked-by: Neil Armstrong <neil.armstrong@linaro.org >
Acked-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com >
Tested-by: Val Packett <val@packett.cool > # x1e80100-dell-latitude-7455,
Patchwork: https://patchwork.freedesktop.org/patch/707437/
Link: https://lore.kernel.org/r/20260226-dpu-enable-virt-planes-v2-1-87971236fe86@oss.qualcomm.com
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com >
2026-03-25 08:05:54 +02:00
Pengyu Luo
18417122d6
drm/msm/dsi/phy: rename DSI_PHY_7NM_QUIRK_PRE_V4_1 to DSI_PHY_7NM_QUIRK_V4_0
...
The quirk flag DSI_PHY_7NM_QUIRK_PRE_V4_1 is renamed to
DSI_PHY_7NM_QUIRK_V4_0 to better reflect the actual hardware revision
it applies to. (Only SM8150 uses it, its hardware revision is 4.0)
No functional change.
Suggested-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com >
Signed-off-by: Pengyu Luo <mitltlatltl@gmail.com >
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com >
Patchwork: https://patchwork.freedesktop.org/patch/707416/
Link: https://lore.kernel.org/r/20260226122958.22555-3-mitltlatltl@gmail.com
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com >
2026-03-25 04:07:08 +02:00
Dmitry Baryshkov
7fe04c7c43
drm/msm/dpu: use full scale alpha in _dpu_crtc_setup_blend_cfg()
...
Both _dpu_crtc_setup_blend_cfg() and setup_blend_config_alpha()
callbacks embed knowledge about platform's alpha range (8-bit or
10-bit). Make _dpu_crtc_setup_blend_cfg() use full 16-bit values for
alpha and reduce alpha only in DPU-specific callbacks.
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com >
Patchwork: https://patchwork.freedesktop.org/patch/697898/
Link: https://lore.kernel.org/r/20260112-dpu-rework-alpha-v2-2-d168785911d5@oss.qualcomm.com
2026-03-25 03:54:41 +02:00
Dmitry Baryshkov
eef07fd9aa
drm/msm/dpu: simplify bg_alpha selection
...
In order to be more obvious in fg_alpha / bg_alpha handling during the
blending programming drop the default setting for background alpha value
and set it explicitly in all cases.
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com >
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com >
Patchwork: https://patchwork.freedesktop.org/patch/697896/
Link: https://lore.kernel.org/r/20260112-dpu-rework-alpha-v2-1-d168785911d5@oss.qualcomm.com
2026-03-25 03:54:40 +02:00
Vignesh Raman
6efced27f5
drm/ci: add rk3588-rock-5b
...
Add job that executes the IGT test suite for rk3588-rock-5b.
Signed-off-by: Vignesh Raman <vignesh.raman@collabora.com >
Reviewed-by: Daniel Stone <daniels@collabora.com >
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com >
2026-03-25 02:15:37 +02:00
Vignesh Raman
dd3a39aa20
drm/ci: move qualcomm baremetal jobs to lava
...
Qualcomm apq8016 and apq8096 DUTS are moved to Collabora lava
farm. So enable these jobs to use lava and update expectation
files.
Signed-off-by: Vignesh Raman <vignesh.raman@collabora.com >
Reviewed-by: Daniel Stone <daniels@collabora.com >
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com >
Co-developed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com >
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com >
2026-03-25 02:15:31 +02:00
Vignesh Raman
0bebb1773d
drm/ci: uprev mesa
...
Uprev mesa to adapt to the latest changes in Mesa CI, such as:
- LAVA overlay-based firmware handling
- Container/job rule separation
- Removal of the python-artifacts job
- Use lava-job-submitter container to submit jobs
- Use of the Alpine container for LAVA jobs
- Various other CI improvements
- Remove bare-metal jobs and disable apq8016 and apq8096 jobs,
as these have been migrated to the Collabora LAVA farm
- Fix issues with rebase with external fixes branch
- Update expectation files
Signed-off-by: Vignesh Raman <vignesh.raman@collabora.com >
Reviewed-by: Daniel Stone <daniels@collabora.com >
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com >
Co-developed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com >
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com >
2026-03-25 02:15:27 +02:00
Vignesh Raman
f1f2a9a874
drm/ci: i915: cml: update runner tag
...
asus-C436FA-Flip-hatch has fewer devices available in the LAVA lab and
drm-ci uses only 2 DUTs, causing tests to time out. Update drm-ci to
use puff instead of hatch so the tests can run on 5 DUTs.
Also increase parallel count for amly jobs to 3.
Signed-off-by: Vignesh Raman <vignesh.raman@collabora.com >
Reviewed-by: Daniel Stone <daniels@collabora.com >
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com >
2026-03-25 02:15:23 +02:00
Vignesh Raman
2c9ee79130
drm/ci: reduce sm8350-hdk parallel jobs from 4 to 2
...
The sm8350-hdk jobs are short and each test takes around 2–3 minutes and
the full job completes in about 10 minutes. Running 4 parallel jobs uses
4 devices at once, which is not needed. Set parallel to 2 to reduce
device usage.
Signed-off-by: Vignesh Raman <vignesh.raman@collabora.com >
Reviewed-by: Daniel Stone <daniels@collabora.com >
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com >
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com >
2026-03-25 02:15:07 +02:00
Pengyu Luo
e4eb11b34d
drm/msm/dsi: fix pclk rate calculation for bonded dsi
...
Recently, we round up new_hdisplay once at most, for bonded dsi, we
may need twice, since they are independent links, we should round up
each half separately. This also aligns with the hdisplay we program
later in dsi_timing_setup()
Example:
full_hdisplay = 1904, dsc_bpp = 8, bpc = 8
new_full_hdisplay = DIV_ROUND_UP(1904 * 8, 8 * 3) = 635
if we use half display
new_half_hdisplay = DIV_ROUND_UP(952 * 8, 8 * 3) = 318
new_full_display = 636
Fixes: 7c9e4a554d ("drm/msm/dsi: Reduce pclk rate for compression")
Signed-off-by: Pengyu Luo <mitltlatltl@gmail.com >
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com >
Patchwork: https://patchwork.freedesktop.org/patch/709716/
Link: https://lore.kernel.org/r/20260306163255.215456-1-mitltlatltl@gmail.com
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com >
2026-03-06 20:41:08 +02:00
Krzysztof Kozlowski
4355b13d46
dt-bindings: display/msm: qcom,sm8750-mdss: Fix model typo
...
Fix obvious model typo (SM8650->SM8750) in the description.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com >
Fixes: 6b93840116 ("dt-bindings: display/msm: qcom,sm8750-mdss: Add SM8750")
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com >
Patchwork: https://patchwork.freedesktop.org/patch/707192/
Link: https://lore.kernel.org/r/20260225173419.125565-2-krzysztof.kozlowski@oss.qualcomm.com
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com >
2026-03-06 01:53:03 +02:00
Pengyu Luo
fd941c787c
drm/msm/dsi/phy: fix hardware revision
...
The hardware revision for TSMC 3nm-based Qualcomm SOCs should be 7.2,
this can be confirmed from REG_DSI_7nm_PHY_CMN_REVISION_ID0, the value
is 0x27, which means hardware revision is 7.2
No functional change.
Fixes: 1337d7ebfb ("drm/msm/dsi/phy: Add support for SM8750")
Suggested-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com >
Signed-off-by: Pengyu Luo <mitltlatltl@gmail.com >
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com >
Patchwork: https://patchwork.freedesktop.org/patch/707414/
Link: https://lore.kernel.org/r/20260226122958.22555-2-mitltlatltl@gmail.com
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com >
2026-03-06 01:53:03 +02:00
Abel Vesa
7403e87c13
dt-bindings: display: msm: Fix reg ranges and clocks on Glymur
...
The Glymur platform has four DisplayPort controllers. The hardware
supports four streams (MST) per controller. However, on Glymur the first
three controllers only have two streams wired to the display subsystem,
while the fourth controller operates in single-stream mode.
Add a dedicated clause for the Glymur compatible to require the register
ranges for all four stream blocks, while allowing either one pixel clock
(for the single-stream controller) or two pixel clocks (for the remaining
controllers).
Update the Glymur MDSS schema example by adding the missing p2, p3,
mst2link and mst3link register blocks. Without these, the bindings
validation fails. Also replace the made-up register addresses with the
actual addresses from the first controller to match the SoC devicetree
description.
Cc: stable@vger.kernel.org # v6.19
Fixes: 8f63bf9082 ("dt-bindings: display: msm: Document the Glymur DiplayPort controller")
Fixes: 1aee577bbc ("dt-bindings: display: msm: Document the Glymur Mobile Display SubSystem")
Signed-off-by: Abel Vesa <abel.vesa@oss.qualcomm.com >
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com >
Patchwork: https://patchwork.freedesktop.org/patch/708518/
Link: https://lore.kernel.org/r/20260303-glymur-fix-dp-bindings-reg-clocks-v4-1-1ebd9c7c2cee@oss.qualcomm.com
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com >
2026-03-06 01:53:03 +02:00
Abhinav Kumar
4ce71cea57
drm/msm/dpu: Correct the SA8775P intr_underrun/intr_underrun index
...
The intr_underrun and intr_vsync indices have been swapped, just simply
corrects them.
Cc: stable@vger.kernel.org
Fixes: b139c80d18 ("drm/msm/dpu: Add SA8775P support")
Signed-off-by: Abhinav Kumar <quic_abhinavk@quicinc.com >
Signed-off-by: Yongxing Mou <yongxing.mou@oss.qualcomm.com >
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com >
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com >
Patchwork: https://patchwork.freedesktop.org/patch/709209/
Link: https://lore.kernel.org/r/20260305-mdss_catalog-v5-2-06678ac39ac7@oss.qualcomm.com
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com >
2026-03-06 01:53:03 +02:00
Akhil P Oommen
7e459c4126
drm/msm/a8xx: Fix ubwc config related to swizzling
...
To disable l2/l3 swizzling in A8x, set the respective bits in both
GRAS_NC_MODE_CNTL and RB_CCU_NC_MODE_CNTL registers. This is required
for Glymur where it is recommended to keep l2/l3 swizzling disabled.
Fixes: 288a932008 ("drm/msm/adreno: Introduce A8x GPU Support")
Signed-off-by: Akhil P Oommen <akhilpo@oss.qualcomm.com >
Message-ID: <20260305-a8xx-ubwc-fix-v1-1-d99b6da4c5a9@oss.qualcomm.com >
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com >
Signed-off-by: Rob Clark <robin.clark@oss.qualcomm.com >
2026-03-05 13:49:50 -08:00
Thomas Fourier
e4eb6e4dd6
drm/msm: Fix dma_free_attrs() buffer size
...
The gpummu->table buffer is alloc'd with size TABLE_SIZE + 32 in
a2xx_gpummu_new() but freed with size TABLE_SIZE in
a2xx_gpummu_destroy().
Change the free size to match the allocation.
Fixes: c2052a4e5c ("drm/msm: implement a2xx mmu")
Cc: <stable@vger.kernel.org >
Signed-off-by: Thomas Fourier <fourier.thomas@gmail.com >
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com >
Patchwork: https://patchwork.freedesktop.org/patch/707340/
Message-ID: <20260226095714.12126-2-fourier.thomas@gmail.com >
Signed-off-by: Rob Clark <robin.clark@oss.qualcomm.com >
2026-03-03 10:39:06 -08:00
Akhil P Oommen
20f644f42e
drm/msm/a6xx: Fix the bogus protect error on X2-85
...
Update the X2-85 gpu's register protect count configuration with the
correct count_max value to avoid blocking the entire MMIO region from the
UMD.
Protect configurations are a bit complicated on A8xx. There are 2 set of
protect registers with different counts: Global and Pipe-specific. The
last-span-unbound feature is available only on the Pipe-specific protect
registers. Due to this, we cannot use the BUILD_BUG sanity check for A8x
protect configurations, so remove the A840 entry from there.
Fixes: 01ff3bf272 ("drm/msm/a8xx: Add support for Adreno X2-85 GPU")
Signed-off-by: Akhil P Oommen <akhilpo@oss.qualcomm.com >
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com >
Patchwork: https://patchwork.freedesktop.org/patch/706944/
Message-ID: <20260225-glymur-protect-fix-v1-1-0deddedf9277@oss.qualcomm.com >
Signed-off-by: Rob Clark <robin.clark@oss.qualcomm.com >
2026-03-03 10:36:35 -08:00
Pengyu Luo
ac47870fd7
drm/msm/dsi: fix hdisplay calculation when programming dsi registers
...
Recently, the hdisplay calculation is working for 3:1 compressed ratio
only. If we have a video panel with DSC BPP = 8, and BPC = 10, we still
use the default bits_per_pclk = 24, then we get the wrong hdisplay. We
can draw the conclusion by cross-comparing the calculation with the
calculation in dsi_adjust_pclk_for_compression().
Since CMD mode does not use this, we can remove
!(msm_host->mode_flags & MIPI_DSI_MODE_VIDEO) safely.
Fixes: efcbd6f9cd ("drm/msm/dsi: Enable widebus for DSI")
Signed-off-by: Pengyu Luo <mitltlatltl@gmail.com >
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com >
Patchwork: https://patchwork.freedesktop.org/patch/704822/
Link: https://lore.kernel.org/r/20260214105145.105308-1-mitltlatltl@gmail.com
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com >
2026-02-24 09:22:40 +02:00
Thomas Weißschuh
5886cc8f89
drm/msm/dpu: Don't use %pK through printk (again)
...
In the past %pK was preferable to %p as it would not leak raw pointer
values into the kernel log.
Since commit ad67b74d24 ("printk: hash addresses printed with %p")
the regular %p has been improved to avoid this issue.
Furthermore, restricted pointers ("%pK") were never meant to be used
through printk(). They can still unintentionally leak raw pointers or
acquire sleeping locks in atomic contexts.
Switch to the regular pointer formatting which is safer and
easier to reason about.
This was previously fixed in this driver in commit 1ba9fbe403
("drm/msm: Don't use %pK through printk") but an additional usage
was reintroduced in commit 39a750ff5f ("drm/msm/dpu: Add DSPP GC
driver to provide GAMMA_LUT DRM property")
Signed-off-by: Thomas Weißschuh <thomas.weissschuh@linutronix.de >
Fixes: 39a750ff5f ("drm/msm/dpu: Add DSPP GC driver to provide GAMMA_LUT DRM property")
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com >
Patchwork: https://patchwork.freedesktop.org/patch/706229/
Link: https://lore.kernel.org/r/20260223-restricted-pointers-msm-v1-1-14c0b451e372@linutronix.de
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com >
2026-02-24 01:32:20 +02:00