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drm/msm/dsi: fix hdisplay calculation for CMD mode panel
Commitac47870fd7("drm/msm/dsi: fix hdisplay calculation when programming dsi registers") incorrecly broke hdisplay calculation for CMD mode by specifying incorrect number of bytes per transfer, fix it. Fixes:ac47870fd7("drm/msm/dsi: fix hdisplay calculation when programming dsi registers") Signed-off-by: Pengyu Luo <mitltlatltl@gmail.com> Patchwork: https://patchwork.freedesktop.org/patch/709917/ Link: https://lore.kernel.org/r/20260307111250.105772-2-mitltlatltl@gmail.com [DB: fixed commit message] Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
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Dmitry Baryshkov
parent
2d51cfb77d
commit
82159db437
@@ -1034,8 +1034,9 @@ static void dsi_timing_setup(struct msm_dsi_host *msm_host, bool is_bonded_dsi)
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/*
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* DPU sends 3 bytes per pclk cycle to DSI. If widebus is
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* enabled, MDP always sends out 48-bit compressed data per
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* pclk and on average, DSI consumes an amount of compressed
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* data equivalent to the uncompressed pixel depth per pclk.
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* pclk and on average, for video mode, DSI consumes only an
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* amount of compressed data equivalent to the uncompressed
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* pixel depth per pclk.
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*
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* Calculate the number of pclks needed to transmit one line of
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* the compressed data.
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@@ -1047,10 +1048,14 @@ static void dsi_timing_setup(struct msm_dsi_host *msm_host, bool is_bonded_dsi)
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* unused anyway.
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*/
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h_total -= hdisplay;
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if (wide_bus_enabled)
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bits_per_pclk = dsc->bits_per_component * 3;
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else
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if (wide_bus_enabled) {
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if (msm_host->mode_flags & MIPI_DSI_MODE_VIDEO)
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bits_per_pclk = dsc->bits_per_component * 3;
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else
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bits_per_pclk = 48;
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} else {
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bits_per_pclk = 24;
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}
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hdisplay = DIV_ROUND_UP(msm_dsc_get_bytes_per_line(msm_host->dsc) * 8, bits_per_pclk);
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