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Merge tag 'socfpga_dts_for_v4.15_part1' of git://git.kernel.org/pub/scm/linux/kernel/git/dinguyen/linux into next/soc

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Pull "SoCFPGA DTS updates for v4.15" from Dinh Nguyen:
- Stratix10 platform updates
  - Fix up gic register entry
  - Enable ethernet/SDMMC
  - Update reset manager properties

* tag 'socfpga_dts_for_v4.15_part1' of git://git.kernel.org/pub/scm/linux/kernel/git/dinguyen/linux:
  arm64: dts: stratix10: add reset property for various peripherals
  arm64: dts: stratix10: add the 'altr,modrst-off' property
  arm64: dts: stratix10: include the reset manager bindings
  arm64: dts: stratix10: add ethernet/sdmmc support to the S10 devkit
  arm64: dts: stratix10: fix up the gic register for the Stratix10 platform
This commit is contained in:
Arnd Bergmann
2017-10-19 23:44:06 +02:00
parent 063f7c8248 788251fa08
commit 9d2e8198d3
2 changed files with 70 additions and 5 deletions
Download Patch File Download Diff File Expand all files Collapse all files

35
arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi
View File

@@ -15,6 +15,7 @@
*/
/dts-v1/;
#include <dt-bindings/reset/altr,rst-mgr-s10.h>
/ {
compatible = "altr,socfpga-stratix10";
@@ -75,10 +76,10 @@ intc: intc@fffc1000 {
compatible = "arm,gic-400", "arm,cortex-a15-gic";
#interrupt-cells = <3>;
interrupt-controller;
reg = <0x0 0xfffc1000 0x1000>,
<0x0 0xfffc2000 0x2000>,
<0x0 0xfffc4000 0x2000>,
<0x0 0xfffc6000 0x2000>;
reg = <0x0 0xfffc1000 0x0 0x1000>,
<0x0 0xfffc2000 0x0 0x2000>,
<0x0 0xfffc4000 0x0 0x2000>,
<0x0 0xfffc6000 0x0 0x2000>;
};
soc {
@@ -100,6 +101,8 @@ gmac0: ethernet@ff800000 {
interrupts = <0 90 4>;
interrupt-names = "macirq";
mac-address = [00 00 00 00 00 00];
resets = <&rst EMAC0_RESET>;
reset-names = "stmmaceth";
status = "disabled";
};
@@ -109,6 +112,8 @@ gmac1: ethernet@ff802000 {
interrupts = <0 91 4>;
interrupt-names = "macirq";
mac-address = [00 00 00 00 00 00];
resets = <&rst EMAC1_RESET>;
reset-names = "stmmaceth";
status = "disabled";
};
@@ -118,6 +123,8 @@ gmac2: ethernet@ff804000 {
interrupts = <0 92 4>;
interrupt-names = "macirq";
mac-address = [00 00 00 00 00 00];
resets = <&rst EMAC2_RESET>;
reset-names = "stmmaceth";
status = "disabled";
};
@@ -126,6 +133,7 @@ gpio0: gpio@ffc03200 {
#size-cells = <0>;
compatible = "snps,dw-apb-gpio";
reg = <0xffc03200 0x100>;
resets = <&rst GPIO0_RESET>;
status = "disabled";
porta: gpio-controller@0 {
@@ -145,6 +153,7 @@ gpio1: gpio@ffc03300 {
#size-cells = <0>;
compatible = "snps,dw-apb-gpio";
reg = <0xffc03300 0x100>;
resets = <&rst GPIO1_RESET>;
status = "disabled";
portb: gpio-controller@0 {
@@ -165,6 +174,7 @@ i2c0: i2c@ffc02800 {
compatible = "snps,designware-i2c";
reg = <0xffc02800 0x100>;
interrupts = <0 103 4>;
resets = <&rst I2C0_RESET>;
status = "disabled";
};
@@ -174,6 +184,7 @@ i2c1: i2c@ffc02900 {
compatible = "snps,designware-i2c";
reg = <0xffc02900 0x100>;
interrupts = <0 104 4>;
resets = <&rst I2C1_RESET>;
status = "disabled";
};
@@ -183,6 +194,7 @@ i2c2: i2c@ffc02a00 {
compatible = "snps,designware-i2c";
reg = <0xffc02a00 0x100>;
interrupts = <0 105 4>;
resets = <&rst I2C2_RESET>;
status = "disabled";
};
@@ -192,6 +204,7 @@ i2c3: i2c@ffc02b00 {
compatible = "snps,designware-i2c";
reg = <0xffc02b00 0x100>;
interrupts = <0 106 4>;
resets = <&rst I2C3_RESET>;
status = "disabled";
};
@@ -201,6 +214,7 @@ i2c4: i2c@ffc02c00 {
compatible = "snps,designware-i2c";
reg = <0xffc02c00 0x100>;
interrupts = <0 107 4>;
resets = <&rst I2C4_RESET>;
status = "disabled";
};
@@ -211,6 +225,8 @@ mmc: dwmmc0@ff808000 {
reg = <0xff808000 0x1000>;
interrupts = <0 96 4>;
fifo-depth = <0x400>;
resets = <&rst SDMMC_RESET>;
reset-names = "reset";
status = "disabled";
};
@@ -223,6 +239,7 @@ rst: rstmgr@ffd11000 {
#reset-cells = <1>;
compatible = "altr,rst-mgr";
reg = <0xffd11000 0x1000>;
altr,modrst-offset = <0x20>;
};
spi0: spi@ffda4000 {
@@ -291,6 +308,7 @@ uart0: serial0@ffc02000 {
interrupts = <0 108 4>;
reg-shift = <2>;
reg-io-width = <4>;
resets = <&rst UART0_RESET>;
status = "disabled";
};
@@ -300,6 +318,7 @@ uart1: serial1@ffc02100 {
interrupts = <0 109 4>;
reg-shift = <2>;
reg-io-width = <4>;
resets = <&rst UART1_RESET>;
status = "disabled";
};
@@ -315,6 +334,8 @@ usb0: usb@ffb00000 {
interrupts = <0 93 4>;
phys = <&usbphy0>;
phy-names = "usb2-phy";
resets = <&rst USB0_RESET>;
reset-names = "dwc2";
status = "disabled";
};
@@ -324,6 +345,8 @@ usb1: usb@ffb40000 {
interrupts = <0 94 4>;
phys = <&usbphy0>;
phy-names = "usb2-phy";
resets = <&rst USB1_RESET>;
reset-names = "dwc2";
status = "disabled";
};
@@ -331,6 +354,7 @@ watchdog0: watchdog@ffd00200 {
compatible = "snps,dw-wdt";
reg = <0xffd00200 0x100>;
interrupts = <0 117 4>;
resets = <&rst WATCHDOG0_RESET>;
status = "disabled";
};
@@ -338,6 +362,7 @@ watchdog1: watchdog@ffd00300 {
compatible = "snps,dw-wdt";
reg = <0xffd00300 0x100>;
interrupts = <0 118 4>;
resets = <&rst WATCHDOG1_RESET>;
status = "disabled";
};
@@ -345,6 +370,7 @@ watchdog2: watchdog@ffd00400 {
compatible = "snps,dw-wdt";
reg = <0xffd00400 0x100>;
interrupts = <0 125 4>;
resets = <&rst WATCHDOG2_RESET>;
status = "disabled";
};
@@ -352,6 +378,7 @@ watchdog3: watchdog@ffd00500 {
compatible = "snps,dw-wdt";
reg = <0xffd00500 0x100>;
interrupts = <0 126 4>;
resets = <&rst WATCHDOG3_RESET>;
status = "disabled";
};
};

40
arch/arm64/boot/dts/altera/socfpga_stratix10_socdk.dts
View File

@@ -14,7 +14,7 @@
* this program. If not, see <http://www.gnu.org/licenses/>.
*/
/include/ "socfpga_stratix10.dtsi"
#include "socfpga_stratix10.dtsi"
/ {
model = "SoCFPGA Stratix 10 SoCDK";
@@ -34,6 +34,44 @@ memory {
};
};
&gmac0 {
status = "okay";
phy-mode = "rgmii";
phy-handle = <&phy0>;
max-frame-size = <3800>;
mdio0 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "snps,dwmac-mdio";
phy0: ethernet-phy@0 {
reg = <4>;
txd0-skew-ps = <0>; /* -420ps */
txd1-skew-ps = <0>; /* -420ps */
txd2-skew-ps = <0>; /* -420ps */
txd3-skew-ps = <0>; /* -420ps */
rxd0-skew-ps = <420>; /* 0ps */
rxd1-skew-ps = <420>; /* 0ps */
rxd2-skew-ps = <420>; /* 0ps */
rxd3-skew-ps = <420>; /* 0ps */
txen-skew-ps = <0>; /* -420ps */
txc-skew-ps = <1860>; /* 960ps */
rxdv-skew-ps = <420>; /* 0ps */
rxc-skew-ps = <1680>; /* 780ps */
};
};
};
&mmc {
status = "okay";
num-slots = <1>;
cap-sd-highspeed;
broken-cd;
bus-width = <4>;
};
&uart0 {
status = "okay";
};