Khairul Anuar Romli 2050b57ecd clk: socfpga: agilex5: add clock driver for Agilex5 ...

Add the new Clock manager driver to support new Agilex5 platform. The new
driver got rid of the clk_parent_data structures as there are no 'clock-names'
property in the DT bindings and use parent_names internally. This is based on
the previous feedback from the maintainer.

Signed-off-by: Ang Tien Sung <tiensung.ang@altera.com>
Signed-off-by: Khairul Anuar Romli <khairul.anuar.romli@altera.com>
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>

2025-10-22 22:52:58 -05:00

..

clk-agilex5.c

clk: socfpga: agilex5: add clock driver for Agilex5

2025-10-22 22:52:58 -05:00

clk-agilex.c

clk: socfpga: agilex: Add bounds-checking coverage for struct stratix10_clock_data

2023-10-23 20:34:39 -07:00

clk-gate-a10.c

clk: socfpga: arria10: use of_clk_add_hw_provider and improve error handling

2023-03-21 16:47:48 -07:00

clk-gate-s10.c

clk: socfpga: agilex5: add clock driver for Agilex5

2025-10-22 22:52:58 -05:00

clk-gate.c

clk: socfpga: gate: Account for the divider in determine_rate

2023-10-12 17:30:54 -07:00

clk-periph-a10.c

clk: socfpga: arria10: use of_clk_add_hw_provider and improve error handling

2023-03-21 16:47:48 -07:00

clk-periph-s10.c

clk: socfpga: agilex5: add clock driver for Agilex5

2025-10-22 22:52:58 -05:00

clk-periph.c

clk: socfpga: use of_clk_add_hw_provider and improve error handling

2023-03-21 16:47:48 -07:00

clk-pll-a10.c

clk: socfpga: arria10: Optimize local variables in clk_pll_recalc_rate()

2024-12-16 18:22:00 -06:00

clk-pll-s10.c

clk: socfpga: agilex5: add clock driver for Agilex5

2025-10-22 22:52:58 -05:00

clk-pll.c

clk: socfpga: clk-pll: Optimize local variables

2025-04-24 17:38:06 -05:00

clk-s10.c

clk: socfpga: agilex: Add bounds-checking coverage for struct stratix10_clock_data

2023-10-23 20:34:39 -07:00

clk.c

…

clk.h

clk: socfpga: remove the setting of clk-phase for sdmmc_clk

2022-12-07 13:22:37 +01:00

Kconfig

clk: socfpga: agilex5: add clock driver for Agilex5

2025-10-22 22:52:58 -05:00

Makefile

clk: socfpga: agilex5: add clock driver for Agilex5

2025-10-22 22:52:58 -05:00

stratix10-clk.h

clk: socfpga: agilex5: add clock driver for Agilex5

2025-10-22 22:52:58 -05:00