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Krzysztof Kozlowski
ff36bed5dc arm64: dts: qcom: align PMIC GPIO pin configuration with DT schema 
DT schema expects PMIC GPIO pin configuration nodes to be named with
'-state' suffix.  Optional children should be either 'pinconf' or
followed with '-pins' suffix.  This fixes dtbs_check warnings like:

  sdm845-xiaomi-beryllium.dtb: gpios@c000: 'vol-up-active' does not match any of the regexes: '-state$', 'pinctrl-[0-9]+'

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220507194913.261121-6-krzysztof.kozlowski@linaro.org
 2022-06-27 16:40:19 -05:00
Marijn Suijten
4148a9eeb1 arm64: dts: qcom: sdm845-akatsuki: Round down l22a regulator voltage 
2700000 is not a multiple of pmic4_pldo's step size of 8000 (with base
voltage 1664000), resulting in pm8998-rpmh-regulators not probing.  Just
as we did with MSM8998's Sony Yoshino Poplar [1], round the voltages
down to err on the cautious side and leave a comment in place to
document this discrepancy wrt downstream sources.

[1]: https://lore.kernel.org/linux-arm-msm/20220507153627.1478268-1-marijn.suijten@somainline.org/

Fixes: 30a7f99bef ("arm64: dts: qcom: Add support for SONY Xperia XZ2 / XZ2C / XZ3 (Tama platform)")
Signed-off-by: Marijn Suijten <marijn.suijten@somainline.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220620211212.269956-1-marijn.suijten@somainline.org
 2022-06-27 16:35:44 -05:00
Konrad Dybcio
68333a42fc arm64: dts: qcom: msm8996: Add SDHCI resets 
On MSM8996, the default bootloader configuration leaves the hosts in some
weird state that never allows them to function properly under Linux.
Add the hardware resets so that we can start clean and get them actually
working.

Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220430162642.608106-1-konrad.dybcio@somainline.org
 2022-06-27 16:01:04 -05:00
Konrad Dybcio
a743dff7ac arm64: dts: qcom: msm8996-tone: Rule out PM(I)8994 variants 
It looks like all Tone devices out in the wild are using PMI8996, which
suggests the PMI8994-variant DTs are not needed. Remove them.

Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220430162525.607946-1-konrad.dybcio@somainline.org
 2022-06-27 16:00:32 -05:00
Konrad Dybcio
bb9bb4123a arm64: dts: qcom: msm8996-tone: Drop cont_splash_mem region 
Tone does not have a functioning bootloader framebuffer and Linux allocates
the DRM framebuffer dynamically. Free up 36 MiB of precious RAM by removing
this reservation.

Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220430162319.607629-1-konrad.dybcio@somainline.org
 2022-06-27 15:59:52 -05:00
Konrad Dybcio
3ae6156e2f arm64: dts: qcom: msm8998-mtp: Merge and fix up the DT 
Merge the two DT files into one, sort the nodes and fix up a couple of style
incoherencies by adding some newlines, removing some, sorting properties etc.

Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220430162353.607709-14-konrad.dybcio@somainline.org
 2022-06-27 15:58:45 -05:00
Konrad Dybcio
d0eaf4122c arm64: dts: qcom: msm8998-fxtec: Decouple from 8998 MTP 
While the Pro-1 is based on MTP and is very close to it, it's really not great
for it to include the MTP dtsi straight up, as any small change will affect
both boards and not all of them will apply to the phone as well.

Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220430162353.607709-13-konrad.dybcio@somainline.org
 2022-06-27 15:58:45 -05:00
Konrad Dybcio
5d393f14d4 arm64: dts: qcom: msm8998*: Clean up #includes 
Sort the includes and remove unused ones.

Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220430162353.607709-12-konrad.dybcio@somainline.org
 2022-06-27 15:58:45 -05:00
Konrad Dybcio
d582c02012 arm64: dts: qcom: msm8998-oneplus: Add clocks & GDSC to simplefb 
This is required to keep the display working with MMCC enabled until proper
panel support is in place.

Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220430162353.607709-11-konrad.dybcio@somainline.org
 2022-06-27 15:58:45 -05:00
Konrad Dybcio
392b73cb81 arm64: dts: qcom: msm8998*: Keep MMCC & MMSS_SMMU enabled by default 
MMCC is a component of the SoC that should always be configured. It was kept
off due to misconfiguration on clamshell machines. Keep it disabled on these
ones and enable it by default on all the others.

Exactly the same story applies to MMSS_SMMU, which directly depends on MMCC.

Do note, that if a platform doesn't use neither EFIFB (only applies to WoA
devices in this case) or simplefb (applies to precisely 2 msm8998 devices
as of this commit), this will not cause any harm.

Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220430162353.607709-10-konrad.dybcio@somainline.org
 2022-06-27 15:58:45 -05:00
Konrad Dybcio
20bba6b732 arm64: dts: qcom: msm8998-fxtec: Use "okay" instead of "ok" 
This is the standard way.

Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220430162353.607709-9-konrad.dybcio@somainline.org
 2022-06-27 15:58:44 -05:00
Konrad Dybcio
bc0e82fbb2 arm64: dts: qcom: msm8998-oneplus: Apply style fixes 
Add some newlines, reorder some properties, remove some indentation to make
it more coherent.

Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220430162353.607709-8-konrad.dybcio@somainline.org
 2022-06-27 15:58:44 -05:00
Konrad Dybcio
b448501c2e arm64: dts: qcom: msm8998-yoshino/oneplus: Use pm8005_regulators label 
Now that a label is added, use it!

Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220430162353.607709-7-konrad.dybcio@somainline.org
 2022-06-27 15:58:44 -05:00
Konrad Dybcio
016928c052 arm64: dts: qcom: msm8998-yoshino: Remove simple-bus compatible from clocks{} 
It's not necessary and the SoC clocks{} node doesn't use it either.

Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220430162353.607709-6-konrad.dybcio@somainline.org
 2022-06-27 15:58:44 -05:00
Konrad Dybcio
6dad36ebe1 arm64: dts: qcom: msm8998-yoshino: Add USB extcon 
While not strictly necessary, at least on maple, configure the USB extcon,
which requires two pins on Yoshino.

Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220430162353.607709-5-konrad.dybcio@somainline.org
 2022-06-27 15:58:44 -05:00
Konrad Dybcio
4efbec42c0 arm64: dts: qcom: msm8998-yoshino-lilac: Disable LVS1 
It's disabled on downstream, follow it.

Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220430162353.607709-4-konrad.dybcio@somainline.org
 2022-06-27 15:58:44 -05:00
Konrad Dybcio
16901ba567 arm64: dts: qcom: msm8998-laptops: Clean up DTs 
Reorder properties to match new laptop DTs, change hex to dec.

Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220430162353.607709-3-konrad.dybcio@somainline.org
 2022-06-27 15:58:44 -05:00
Konrad Dybcio
ce383e8078 arm64: dts: qcom: msm8998-clamshell: Clean up the DT 
Keep the nodes and includes in order, clean up unnecessary properties & nodes.

Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220430162353.607709-2-konrad.dybcio@somainline.org
 2022-06-27 15:58:44 -05:00
Konrad Dybcio
12541f687e arm64: dts: qcom: msm8998*: Fix TLMM and pin nodes 
Remove the unnecessary level of indentation, commonize SDC2 pins and notice
that SDCC2_CD_ON and _OFF is identical, deduplicate it!

Also, remove some unnecessary overrides and use decimal values in #-cells

Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220430162353.607709-1-konrad.dybcio@somainline.org
 2022-06-27 15:58:44 -05:00
Bryan O'Donoghue
f424d75421 arm64: dts: qcom: sdm845: Add camss vdda-pll-supply 
Add in the missing vdda-pll-supply rail description.

Reviewed-by: Robert Foss <robert.foss@linaro.org>
Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220111125212.2343184-5-bryan.odonoghue@linaro.org
 2022-06-27 15:24:28 -05:00
Bryan O'Donoghue
11c83450ff arm64: dts: qcom: sdm845: Rename camss vdda-supply to vdda-phy-supply 
The dts entry vdda-supply connects to a common vdda-phy-supply rail. Rename
to reflect what the functionality is.

Reviewed-by: Robert Foss <robert.foss@linaro.org>
Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220111125212.2343184-4-bryan.odonoghue@linaro.org
 2022-06-27 15:24:28 -05:00
David Heidelberg
458ebdbb8e arm64: dts: qcom: timer should use only 32-bit size 
There's no reason the timer needs > 32-bits of address or size.
Since we using 32-bit size, we need to define ranges properly.

Fixes warnings as:
```
arch/arm64/boot/dts/qcom/sdm845-oneplus-fajita.dt.yaml: timer@17c90000: #size-cells:0:0: 1 was expected
        From schema: Documentation/devicetree/bindings/timer/arm,arch_timer_mmio.yaml
```

Signed-off-by: David Heidelberg <david@ixit.cz>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220626105800.35586-1-david@ixit.cz
 2022-06-27 15:18:44 -05:00
Krzysztof Kozlowski
0e3e654696 arm64: dts: qcom: align OPP table names with DT schema 
DT schema expects names of operating points tables to start with
"opp-table":

  ipq6018-cp01-c1.dtb: cpu_opp_table: $nodename:0: 'cpu_opp_table' does not match '^opp-table(-[a-z0-9]+)?$'

Use hyphens instead of underscores, fix the names to match DT schema or
remove the prefix entirely when it is not needed.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220627093250.84391-1-krzysztof.kozlowski@linaro.org
 2022-06-27 15:11:02 -05:00
Vladimir Zapolskiy
1b3bfc4066 arm64: dts: qcom: sm8250: Disable camcc by default 
At the moment there are no changes in SM8250 board files, which require
camera clock controller to run, whenever it is needed for a particular
board, the status of camcc device node will be changed in a board file.

Signed-off-by: Vladimir Zapolskiy <vladimir.zapolskiy@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220518091943.734478-1-vladimir.zapolskiy@linaro.org
 2022-06-25 22:08:25 -05:00
Dmitry Baryshkov
48aa636285 arm64: dts: qcom: msm8996: add clocks to the MMCC device node 
As we are converting this platform to use DT clock bindings, add clocks
and clock-names properties to the MMCC device tree node.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Reviewed-by: Stephen Boyd <sboyd@kernel.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220617122922.769562-7-dmitry.baryshkov@linaro.org
 2022-06-25 21:43:03 -05:00
Dmitry Baryshkov
f583741847 arm64: dts: qcom: sm8450: add uart20 node 
Add device tree node for uart20, which is typically used for Bluetooth attachment.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220502195133.275209-1-dmitry.baryshkov@linaro.org
 2022-06-25 21:43:03 -05:00
Srinivasa Rao Mandadapu
a57de71f09 arm64: dts: qcom: sc7280-qcard: Add ldo_l17b regulator node 
Add pm7325 ldo_l17b regulator, which is required for
wcd codec vdd buck supply on sc7280-qcard board.

Signed-off-by: Srinivasa Rao Mandadapu <quic_srivasam@quicinc.com>
Co-developed-by: Venkata Prasad Potturu <quic_potturu@quicinc.com>
Signed-off-by: Venkata Prasad Potturu <quic_potturu@quicinc.com>
Reviewed-by: Douglas Anderson <dianders@chromium.org>
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/1650621734-10297-1-git-send-email-quic_srivasam@quicinc.com
 2022-06-25 21:43:03 -05:00
Douglas Anderson
d756a0b29f arm64: dts: qcom: sc7280: Set SPI flash to 50 MHz for herobrine boards 
sc7280-herobrine based boards are specced to be able to access their
SPI flash at 50 MHz with the drive strength of the pins set at 8. The
drive strength is already set to 8 in "sc7280-herobrine.dtsi", so
let's bump up the clock. The matching firmware change for this is at:

https://review.coreboot.org/c/coreboot/+/63948

NOTE: the firmware change isn't _required_ to make the kernel work at
50 MHz, it merely shows that the boards are known to work fine at 50
MHz.

ALSO NOTE: this doesn't update the "sc7280-chrome-common.dtsi" file
which is used by both herobrine boards and IDP. At the moment the IDP
boards aren't configuring a drive strength of 8 and it seems safer to
just leave them at the slower speed if they're already working.

Signed-off-by: Douglas Anderson <dianders@chromium.org>
Reviewed-by: Matthias Kaehlcke <mka@chromium.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220505161425.1.Icf6f3796d2fa122b4c0566d9317b461bfbc24b7f@changeid
 2022-06-25 21:43:03 -05:00
Matthias Kaehlcke
1c20d3dbaa arm64: dts: qcom: sc7280: Set modem FW path for Chrome OS boards 
Specify the path of the modem FW for SC7280 Chrome OS boards in
the 'remoteproc_mpss' node.

Signed-off-by: Matthias Kaehlcke <mka@chromium.org>
Reviewed-by: Douglas Anderson <dianders@chromium.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220510104656.1.Id98b473e08c950f9a461826dde187ef7705a928c@changeid
 2022-06-25 21:43:03 -05:00
Douglas Anderson
4ab03ef8b3 arm64: qcom: sc7280-herobrine: Enable DP 
This enables DisplayPort for herobrine boards.

Signed-off-by: Douglas Anderson <dianders@chromium.org>
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220513065704.1.I9b9b9d4d1a3e0350a89221892261881a1771ad15@changeid
 2022-06-25 21:43:03 -05:00
Stephen Boyd
e60414644c arm64: dts: qcom: sc7180: Remove ipa_fw_mem node on trogdor 
We don't use this carveout on trogdor boards, and having it defined in
the sc7180 SoC file causes an overlap message to be printed at boot.

 OF: reserved mem: OVERLAP DETECTED!
 memory@86000000 (0x0000000086000000--0x000000008ec00000) overlaps with memory@8b700000 (0x000000008b700000--0x000000008b710000)

Delete the node in the trogdor dtsi file to fix the overlap problem and
remove the error message.

Cc: Alex Elder <elder@linaro.org>
Cc: Matthias Kaehlcke <mka@chromium.org>
Fixes: 310b266655 ("arm64: dts: qcom: sc7180: define ipa_fw_mem node")
Signed-off-by: Stephen Boyd <swboyd@chromium.org>
Reviewed-by: Alex Elder <elder@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220517193307.3034602-1-swboyd@chromium.org
 2022-06-25 21:43:03 -05:00
Matthias Kaehlcke
2a77ada516 arm64: dts: qcom: sc7280: Enable wifi for Chrome OS boards 
Enable the 'wifi' and 'remoteproc_wpss' nodes for all sc7280
based Chrome OS boards. Delete the corresponding entries from
sc7280-idp.dtsi since this file includes sc7280-chrome-common.dtsi.

Signed-off-by: Matthias Kaehlcke <mka@chromium.org>
Reviewed-by: Douglas Anderson <dianders@chromium.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220518155252.1.I176d4254c79cfaafa38cbe36f066f02f819df9b6@changeid
 2022-06-25 21:43:03 -05:00
Douglas Anderson
5069fe941f dt-bindings: arm: qcom: Add more sc7180 Chromebook board bindings 
This adds board bindings for boards that are downstream but not quite
upstream yet.

Signed-off-by: Douglas Anderson <dianders@chromium.org>
Reviewed-by: Matthias Kaehlcke <mka@chromium.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220520143502.v4.5.Ie8713bc0377672ed8dd71189e66fc0b77226fb85@changeid
 2022-06-25 21:43:02 -05:00
Douglas Anderson
707b9b0878 dt-bindings: arm: qcom: Add / fix sc7280 board bindings 
This copy-pastes compatibles from sc7280-based boards from the device
trees to the yaml file. It also fixes the CRD/IDP bindings which had
gotten stale.

Signed-off-by: Douglas Anderson <dianders@chromium.org>
Reviewed-by: Matthias Kaehlcke <mka@chromium.org>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220520143502.v4.4.I1318c1ae2ce55ade1d092fc21df846360b15c560@changeid
 2022-06-25 21:43:02 -05:00
Douglas Anderson
3b8bfe002c dt-bindings: arm: qcom: Add sc7180 Chromebook board bindings 
This copy-pastes compatibles from sc7180-based boards from the device
trees to the yaml file so that `make dtbs_check` will be happy.

NOTES:
- I make no attempt to try to share an "item" for all sc7180 based
  Chromebooks. Because of the revision matching scheme used by the
  Chromebook bootloader, at times we need a different number of
  revisions listed.
- Some of the odd entries in here (like google,homestar-rev23 or the
  fact that "Google Lazor Limozeen without Touchscreen" changed from
  sku5 to sku6) are not typos but simply reflect reality.
- Many revisions of boards here never actually went to consumers, but
  they are still in use within various companies that were involved in
  Chromebook development. Since Chromebooks are developed with an
  "upstream first" methodology, having these revisions supported with
  upstream Linux is important. Making it easy for Chromebooks to be
  developed with an "upstream first" methodology is valuable to the
  upstream community because it improves the quality of upstream and
  gets Chromebooks supported with vanilla upstream faster.

One other note here is that, though the bootloader effectively treats
the list of compatibles in a given device tree as unordered, some
people would prefer future boards to list higher-numbered revisions
first in the list. Chromebooks here are not changing and typically
list lower revisions first just to avoid churn.

Signed-off-by: Douglas Anderson <dianders@chromium.org>
Reviewed-by: Matthias Kaehlcke <mka@chromium.org>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220520143502.v4.3.I9804fcd5d6c8552ab25f598dd7a3ea71b15b55f0@changeid
 2022-06-25 21:43:02 -05:00
Douglas Anderson
dbbccb3db1 dt-bindings: arm: qcom: Mention that Chromebooks use a different scheme 
The qcom.yaml bindings file has a whole description of what the
top-level compatible should look like for Qualcomm devices. It doesn't
match what Chromebooks do, so add a link to the Chromebook docs.

Reported-by: Stephen Boyd <swboyd@chromium.org>
Signed-off-by: Douglas Anderson <dianders@chromium.org>
Reviewed-by: Matthias Kaehlcke <mka@chromium.org>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220520143502.v4.2.I6418884d8bab6956c7016304f45adc7df808face@changeid
 2022-06-25 21:43:02 -05:00
Douglas Anderson
59228d3b90 dt-bindings: Document how Chromebooks with depthcharge boot 
This documents how many Chromebooks pick the device tree that will be
passed to the OS and can help understand the revisions / SKUs listed
as the top-level "compatible" in many Chromebooks.

Signed-off-by: Douglas Anderson <dianders@chromium.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220520143502.v4.1.I71e42c6174f1cec17da3024c9f73ba373263b9b6@changeid
 2022-06-25 21:43:02 -05:00
Matthias Kaehlcke
1a22eff4b4 arm64: dts: qcom: sc7280: Enable keyboard backlight for villager 
Villager has a backlit keyboard, enable support for the backlight.

Signed-off-by: Matthias Kaehlcke <mka@chromium.org>
Reviewed-by: Douglas Anderson <dianders@chromium.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220523123157.v2.2.I3d1b5a109675a0cc90e66a4e0b45cb823edbdee7@changeid
 2022-06-25 21:43:02 -05:00
Matthias Kaehlcke
426e81c7e6 arm64: dts: qcom: sc7280: herobrine: Don't disable the keyboard backlight node 
On herobrine boards the keyboard backlight is controlled through the
PWM LED driver. Currently both the PWM LED node and the node for the
keyboard backlight are disabled in sc7280-herobrine.dtsi, which
requires boards with a backlit keyboard to enable both nodes. There
are no other PWM LEDs on herobrine boards besides the keyboard
backlight, delete the 'disabled' status from the keyboard backlight
node, with that boards only have to enable the 'pwmleds' node for
keyboard backlight support.

Also add a label to the 'pwmleds' node to allow board files to refer to
it with a phandle.

Signed-off-by: Matthias Kaehlcke <mka@chromium.org>
Reviewed-by: Douglas Anderson <dianders@chromium.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220523123157.v2.1.I47ec78581907f7ef024f10bc085f970abf01ec11@changeid
 2022-06-25 21:43:02 -05:00
Douglas Anderson
e58539532b arm64: dts: qcom: sc7280: Add touchscreen to villager 
This adds the touchscreen to the sc7280-herobrine-villager device
tree. Note that the touchscreen on villager actually uses the reset
line and thus we use the more specific "elan,ekth6915" compatible
which allows us to specify the reset.

The fact that villager's touchscreen uses the reset line can be
contrasted against the touchscreen for CRD/herobrine-r1. On those
boards, even though the touchscreen goes to the display, it's not
hooked up to anything there.

In order to keep the line parked on herobrine/CRD, we'll move the
pullup from the qcard.dtsi file to the specific boards. This allows us
to disable the pullup in the villager device tree since the pin is an
output.

Signed-off-by: Douglas Anderson <dianders@chromium.org>
Reviewed-by: Matthias Kaehlcke <mka@chromium.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220524134840.1.I80072b8815ac08c12af8f379a33cc2d83693dc51@changeid
 2022-06-25 21:43:02 -05:00
Srinivasa Rao Mandadapu
a4c1fc8cff arm64: dts: qcom: sc7280-herobrine: Add lpi pinmux properties for CRD 3.0/3.1 
Add LPASS LPI pinctrl properties, which are required for Audio
functionality on herobrine based platforms of rev5+
(aka CRD 3.0/3.1) boards.

Signed-off-by: Srinivasa Rao Mandadapu <quic_srivasam@quicinc.com>
Co-developed-by: Venkata Prasad Potturu <quic_potturu@quicinc.com>
Signed-off-by: Venkata Prasad Potturu <quic_potturu@quicinc.com>
Reviewed-by: Matthias Kaehlcke <mka@chromium.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/1655108645-1517-5-git-send-email-quic_srivasam@quicinc.com
 2022-06-25 14:47:17 -05:00
Srinivasa Rao Mandadapu
32d4541abe arm64: dts: qcom: sc7280: add lpass lpi pin controller node 
Add LPASS LPI pinctrl node required for Audio functionality on sc7280
based platforms.

Signed-off-by: Srinivasa Rao Mandadapu <quic_srivasam@quicinc.com>
Co-developed-by: Venkata Prasad Potturu <quic_potturu@quicinc.com>
Signed-off-by: Venkata Prasad Potturu <quic_potturu@quicinc.com>
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Reviewed-by: Matthias Kaehlcke <mka@chromium.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/1655108645-1517-4-git-send-email-quic_srivasam@quicinc.com
 2022-06-25 14:47:17 -05:00
Srinivasa Rao Mandadapu
06c73a39c3 arm64: dts: qcom: sc7280: Add secondary MI2S pinmux specifications for CRD 3.0/3.1 
Add drive strength property for secondary MI2S on
sc7280 based platforms of rev5+ (aka CRD 3.0/3.1) boards.

Signed-off-by: Srinivasa Rao Mandadapu <quic_srivasam@quicinc.com>
Co-developed-by: Venkata Prasad Potturu <quic_potturu@quicinc.com>
Signed-off-by: Venkata Prasad Potturu <quic_potturu@quicinc.com>
Reviewed-by: Matthias Kaehlcke <mka@chromium.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/1655108645-1517-3-git-send-email-quic_srivasam@quicinc.com
 2022-06-25 14:47:17 -05:00
Srinivasa Rao Mandadapu
b9e3f65ecf arm64: dts: qcom: sc7280: Add pinmux for I2S speaker and Headset 
Add pinmux nodes for primary and secondary I2S for SC7280 based platforms.

Signed-off-by: Srinivasa Rao Mandadapu <quic_srivasam@quicinc.com>
Co-developed-by: Venkata Prasad Potturu <quic_potturu@quicinc.com>
Signed-off-by: Venkata Prasad Potturu <quic_potturu@quicinc.com>
Reviewed-by: Matthias Kaehlcke <mka@chromium.org>
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/1655108645-1517-2-git-send-email-quic_srivasam@quicinc.com
 2022-06-25 14:47:17 -05:00
Dang Huynh
b74f7b8f17 arm64: dts: qcom: sdm660-xiaomi-lavender: Configure WLED 
WLED is used for controlling display backlight on this phone.

Signed-off-by: Dang Huynh <danct12@riseup.net>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220425032824.211975-1-danct12@riseup.net
 2022-06-25 14:43:17 -05:00
Vinod Polimera
6edb323837 arm64: dts: qcom: sm8250: remove assigned-clock-rate property for mdp clk 
Drop the assigned clock rate property and vote on the mdp clock as per
calculated value during the usecase.

This patch is dependent on the patch ("drm/msm/disp/dpu1: set mdp clk
to the maximum frequency in opp table during probe") [1].

[1] https://lore.kernel.org/r/1647269217-14064-2-git-send-email-quic_vpolimer@quicinc.com/

Signed-off-by: Vinod Polimera <quic_vpolimer@quicinc.com>
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Reviewed-by: Douglas Anderson <dianders@chromium.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/1647919631-14447-6-git-send-email-quic_vpolimer@quicinc.com
 2022-06-24 12:07:31 -05:00
Vinod Polimera
0b24829fd7 arm64: dts: qcom: sdm845: remove assigned-clock-rate property for mdp clk 
Drop the assigned clock rate property and vote on the mdp clock as per
calculated value during the usecase.

This patch is dependent on the patch ("drm/msm/disp/dpu1: set mdp clk
to the maximum frequency in opp table during probe") [1].

[1] https://lore.kernel.org/r/1647269217-14064-2-git-send-email-quic_vpolimer@quicinc.com/

Signed-off-by: Vinod Polimera <quic_vpolimer@quicinc.com>
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Reviewed-by: Douglas Anderson <dianders@chromium.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/1647919631-14447-5-git-send-email-quic_vpolimer@quicinc.com
 2022-06-24 12:07:31 -05:00
Vinod Polimera
aa4ae511a7 arm64: dts: qcom: sm7180: remove assigned-clock-rate property for mdp clk 
Drop the assigned clock rate property and vote on the mdp clock as per
calculated value during the usecase.

This patch is dependent on the patch ("drm/msm/disp/dpu1: set mdp clk
to the maximum frequency in opp table during probe") [1].

[1] https://lore.kernel.org/r/1647269217-14064-2-git-send-email-quic_vpolimer@quicinc.com/

Signed-off-by: Vinod Polimera <quic_vpolimer@quicinc.com>
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Reviewed-by: Douglas Anderson <dianders@chromium.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/1647919631-14447-4-git-send-email-quic_vpolimer@quicinc.com
 2022-06-24 12:07:31 -05:00
Vinod Polimera
5241fd7fee arm64: dts: qcom: sm7280: remove assigned-clock-rate property for mdp clk 
Drop the assigned clock rate property and vote on the mdp clock as per
calculated value during the usecase.

This patch is dependent on the patch ("drm/msm/disp/dpu1: set mdp clk
to the maximum frequency in opp table during probe") [1].

[1] https://lore.kernel.org/r/1647269217-14064-2-git-send-email-quic_vpolimer@quicinc.com/

Signed-off-by: Vinod Polimera <quic_vpolimer@quicinc.com>
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Reviewed-by: Douglas Anderson <dianders@chromium.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/1647919631-14447-3-git-send-email-quic_vpolimer@quicinc.com
 2022-06-24 12:07:31 -05:00
Linus Torvalds
f2906aa863 Linux 5.19-rc1 v5.19-rc1 2022-06-05 17:18:54 -07:00