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Author SHA1 Message Date
Vladimir Zapolskiy
fccf8e31ac arm64: dts: qcom: sm8450: Add thermal zones 
Add thermal zones handled by tsens sensors. The definitions and the trip
points were taken from the downstream dts. For the CPU core thermal
sensors, the trip points were changed to follow the example of other
Qualcomm platforms.

Signed-off-by: Vladimir Zapolskiy <vladimir.zapolskiy@linaro.org>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220410234458.1739279-3-dmitry.baryshkov@linaro.org
 2022-04-19 12:17:00 -05:00
Vladimir Zapolskiy
48995e8633 arm64: dts: qcom: sm8450: Add thermal sensor controllers 
The change adds description of two thermal sensor controllers found
on SM8450.

Signed-off-by: Vladimir Zapolskiy <vladimir.zapolskiy@linaro.org>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220410234458.1739279-2-dmitry.baryshkov@linaro.org
 2022-04-19 12:16:59 -05:00
Michael Srba
1ed29355df arm64: dts: qcom: msm8998: reserve potentially inaccessible clocks 
With the gcc driver now being more complete and describing clocks which
might not always be write-accessible to the OS, conservatively specify
all such clocks as protected in the SoC dts.
The board dts - or even user-supplied dts - can override this property
to reflect the actual configuration.

Signed-off-by: Michael Srba <michael.srba@seznam.cz>
Reviewed-by: Jeffrey Hugo <jeffrey.l.hugo@gmail.com>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220411072156.24451-6-michael.srba@seznam.cz
 2022-04-19 12:07:24 -05:00
Bjorn Andersson
0fb9ddbc63 Merge branch '20220411072156.24451-2-michael.srba@seznam.cz' into arm64-for-5.19 2022-04-19 12:05:00 -05:00
Michael Srba
368cfcbaa3 dt-bindings: clock: gcc-msm8998: Add definitions of SSC-related clocks 
Add definitions of four clocks which need to be manipulated in order to
initialize the AHB bus which exposes the SCC block in the global address
space.

Signed-off-by: Michael Srba <Michael.Srba@seznam.cz>
Acked-by: Rob Herring <robh@kernel.org>
Reviewed-by: Stephen Boyd <sboyd@kernel.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220411072156.24451-2-michael.srba@seznam.cz
 2022-04-19 12:04:02 -05:00
Krzysztof Kozlowski
812b0b61ee arm64: dts: qcom: add RPM clock controller fallback compatible 
The bindings require a fallback compatible to RPM clock controller.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220401201035.189106-4-krzysztof.kozlowski@linaro.org
 2022-04-12 22:13:57 -05:00
Krzysztof Kozlowski
0e324e9f49 arm64: dts: qcom: msm8994: remove SMD qcom,local-pid property 
The Qualcomm SMD does not use qcom,local-pid property.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220401201035.189106-3-krzysztof.kozlowski@linaro.org
 2022-04-12 22:13:36 -05:00
Krzysztof Kozlowski
b3d26821d9 arm64: dts: qcom: msm8953: do not use underscore in node name 
Align RPM requests node with DT schema by using hyphen instead of
underscore.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220401201035.189106-2-krzysztof.kozlowski@linaro.org
 2022-04-12 22:13:25 -05:00
Luca Weiss
22437c436c arm64: dts: qcom: sm7225-fairphone-fp4: Enable wifi 
Configure regulators used by the wifi hardware and enable it.

Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220325101841.172304-2-luca.weiss@fairphone.com
 2022-04-12 22:10:13 -05:00
Luca Weiss
48cc9bb1d3 arm64: dts: qcom: sm6350: Add wifi node 
Add a node describing the wifi hardware found on sm6350.

Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220325101841.172304-1-luca.weiss@fairphone.com
 2022-04-12 22:10:11 -05:00
Konrad Dybcio
d8023f3a8e arm64: dts: qcom: msm8994: Add mmc aliases 
Set the aliases for both SDHCI controllers.

Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Reviewed-by: Petr Vorel <petr.vorel@gmail.com>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220319174645.340379-16-konrad.dybcio@somainline.org
 2022-04-12 22:09:17 -05:00
Konrad Dybcio
e0be93fb38 arm64: dts: qcom: msm8994: Add watchdog timer node 
Add and configure the watchdog node.

Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220319174645.340379-15-konrad.dybcio@somainline.org
 2022-04-12 22:09:01 -05:00
Konrad Dybcio
1ae438d26b arm64: dts: qcom: msm8994: Fix BLSP[12]_DMA channels count 
MSM8994 actually features 24 DMA channels for each BLSP,
fix it!

Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220319174645.340379-14-konrad.dybcio@somainline.org
 2022-04-12 22:09:00 -05:00
Konrad Dybcio
9d511d0a79 arm64: dts: qcom: msm8994: Add OCMEM node 
Add OCMEM node to allow for GPU SRAM access.

Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220319174645.340379-13-konrad.dybcio@somainline.org
 2022-04-12 22:08:58 -05:00
Konrad Dybcio
410e1619d5 arm64: dts: qcom: msm8994-kitakami: Update regulator configuration 
Remove regulator-always-on property where not necessary and mark regulators
that are not supposed to be voted active on boot with regulator-boot-on.
While at it, reorder the load properties to make it look more decent.

Reorder PMICs to fix a probe defer caused by messy dependencies and Linux's
inability to handle them (at least for now).

Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220319174645.340379-12-konrad.dybcio@somainline.org
 2022-04-12 22:08:56 -05:00
Konrad Dybcio
7d9379bf1e arm64: dts: qcom: msm8994-kitakami: Disable a mistakengly enabled I2C host 
I2C4 turns out not to be used on Kitakami after all and it only blocks a
GPIO used by camera hardware.

Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220319174645.340379-11-konrad.dybcio@somainline.org
 2022-04-12 22:08:54 -05:00
Konrad Dybcio
9e398b4c4e arm64: dts: qcom: msm8992-libra: Fix up the framebuffer 
Make sure the necessary clocks are kept on after clk_cleanup (until MDSS
is properly handled by its own driver) and touch up the fb address to
prevent some weird shifting. It's still not perfect, but at least the
kernel log doesn't start a third deep into your screen..

Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
[bjorn: Folded in change of framebuffer base address, from Konrad]
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220319174645.340379-10-konrad.dybcio@somainline.org
 2022-04-12 22:08:33 -05:00
Konrad Dybcio
049c46f31a arm64: dts: qcom: msm8994: Fix the cont_splash_mem address 
The default memory map places cont_splash_mem at 3401000, which was
overlooked.. Fix it!

Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220319174645.340379-9-konrad.dybcio@somainline.org
 2022-04-12 22:07:26 -05:00
Konrad Dybcio
b0b5687a2c arm64: dts: qcom: msm8992: Use the correct MMCC compatible 
Now that proper msm8992 support is in the driver, switch to
the new compatible.

Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220319174645.340379-8-konrad.dybcio@somainline.org
 2022-04-12 22:07:24 -05:00
Konrad Dybcio
355ea704c8 arm64: dts: qcom: msm8992: Use the correct GCC compatible 
Now that proper msm8992 support is in the driver, switch to
the new compatible.

Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Reviewed-by: Petr Vorel <petr.vorel@gmail.com>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220319174645.340379-7-konrad.dybcio@somainline.org
 2022-04-12 22:07:21 -05:00
Konrad Dybcio
e9b0eb5420 arm64: dts: qcom: msm8994: Add MMCC node 
Describe the Multimedia Clock Controller block in the DT.

Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220319174645.340379-6-konrad.dybcio@somainline.org
 2022-04-12 22:07:18 -05:00
Konrad Dybcio
2d0f45f760 arm64: dts: qcom: msm8992-libra: Remove superfluous status = "okay" 
The framebuffer is already enabled by default.

Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220319174645.340379-5-konrad.dybcio@somainline.org
 2022-04-12 22:07:17 -05:00
Konrad Dybcio
ed288ae94a arm64: dts: qcom: msm8992-libra: Temporarily restrict CPU count to 1 
The phone seems to randomly crash when more than 1 CPU is enabled, which
is probably related to lack of some driver.

Restrict the device to only use a single core until this is solved.

Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220319174645.340379-4-konrad.dybcio@somainline.org
 2022-04-12 22:07:16 -05:00
Konrad Dybcio
13cff03303 arm64: dts: qcom: msm8992-libra: Add CPU regulators 
Specify CPU regulator voltages for both VDD_APC rails.

Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220319174645.340379-3-konrad.dybcio@somainline.org
 2022-04-12 22:07:12 -05:00
Konrad Dybcio
5827e28304 arm64: dts: qcom: msm8994: Fix sleep clock name 
The sleep clock name expected by GCC is actually "sleep" and not
"sleep_clk". Fix the clock-names value for it to make sure it is
provided.

Fixes: 9204da57cd65 ("arm64: dts: qcom: msm8994: Provide missing "xo_board" and "sleep_clk" to GCC")

Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Reviewed-by: Petr Vorel <petr.vorel@gmail.com>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220319174645.340379-2-konrad.dybcio@somainline.org
 2022-04-12 22:07:04 -05:00
Akhil P Oommen
3bfef00d76 arm64: dts: qcom: sc7280: Support gpu speedbin 
Add speedbin fuse and additional OPPs for gpu to support sc7280 SKUs.

Signed-off-by: Akhil P Oommen <quic_akhilpo@quicinc.com>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220226005021.v2.5.I4c2cb95f06f0c37038c80cc1ad20563fdf0618e2@changeid
 2022-04-12 21:54:08 -05:00
Kathiravan T
f607dd767f arm64: dts: qcom: ipq8074: fix the sleep clock frequency 
Sleep clock frequency should be 32768Hz. Lets fix it.

Cc: stable@vger.kernel.org
Fixes: 41dac73e24 ("arm64: dts: Add ipq8074 SoC and HK01 board support")
Link: https://lore.kernel.org/all/e2a447f8-6024-0369-f698-2027b6edcf9e@codeaurora.org/
Signed-off-by: Kathiravan T <quic_kathirav@quicinc.com>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/1644581655-11568-1-git-send-email-quic_kathirav@quicinc.com
 2022-04-12 21:35:10 -05:00
Dmitry Baryshkov
be63332992 arm64: dts: qcom: sm8250: Drop flags for mdss irqs 
The number of interrupt cells for the mdss interrupt controller is 1,
meaning there should only be one cell for the interrupt number, not two.
Drop the second cell containing (unused) irq flags.

Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Fixes: 7c1dffd471 ("arm64: dts: qcom: sm8250.dtsi: add display system nodes")
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Marijn Suijten <marijn.suijten@somainline.org>
Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220302225411.2456001-5-dmitry.baryshkov@linaro.org
 2022-04-12 21:34:13 -05:00
Dmitry Baryshkov
0316da6bbc arm64: dts: qcom: sdm845: Drop flags for mdss irqs 
The number of interrupt cells for the mdss interrupt controller is 1,
meaning there should only be one cell for the interrupt number, not two.
Drop the second cell containing (unused) irq flags.

Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Fixes: 08c2a076d1 ("arm64: dts: qcom: sdm845: Add dpu to sdm845 dts file")
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Marijn Suijten <marijn.suijten@somainline.org>
Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220302225411.2456001-4-dmitry.baryshkov@linaro.org
 2022-04-12 21:34:11 -05:00
Dmitry Baryshkov
63ddd8a54d arm64: dts: qcom: sdm660: Drop flags for mdss irqs 
The number of interrupt cells for the mdss interrupt controller is 1,
meaning there should only be one cell for the interrupt number, not two.
Drop the second cell containing (unused) irq flags.

Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Fixes: ab29028439 ("arm64: dts: qcom: sdm660: Add required nodes for DSI1")
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Marijn Suijten <marijn.suijten@somainline.org>
Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220302225411.2456001-3-dmitry.baryshkov@linaro.org
 2022-04-12 21:34:10 -05:00
Dmitry Baryshkov
2a11b3bfc5 arm64: dts: qcom: sdm630: Drop flags for mdss irqs 
The number of interrupt cells for the mdss interrupt controller is 1,
meaning there should only be one cell for the interrupt number, not two.
Drop the second cell containing (unused) irq flags.

Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Fixes: b52555d590 ("arm64: dts: qcom: sdm630: Add MDSS nodes")
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Marijn Suijten <marijn.suijten@somainline.org>
Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220302225411.2456001-2-dmitry.baryshkov@linaro.org
 2022-04-12 21:34:07 -05:00
Dmitry Baryshkov
7b36ab2673 arm64: dts: qcom: msm8996: Drop flags for mdss irqs 
The number of interrupt cells for the mdss interrupt controller is 1,
meaning there should only be one cell for the interrupt number, not two.
Drop the second cell containing (unused) irq flags.

Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Fixes: 12d5403757 ("arm64: dts: qcom: msm8996: Add DSI0 nodes")
Fixes: 3a4547c1fc ("arm64: qcom: msm8996.dtsi: Add Display nodes")
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Marijn Suijten <marijn.suijten@somainline.org>
Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220302225411.2456001-1-dmitry.baryshkov@linaro.org
 2022-04-12 21:34:06 -05:00
Dmitry Baryshkov
37ebe34fc0 arm64: dts: qcom: sm8450-hdk: add pcie nodes 
Add device tree nodes for PCIe0/PCIe1 controllers and corresponding
PHYs.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220301061500.2110569-8-dmitry.baryshkov@linaro.org
 2022-04-12 21:24:56 -05:00
Dmitry Baryshkov
bce9887e0f arm64: dts: qcom: sm8450-qrd: enable PCIe0 host 
Enable PCIe0 host on SM8450 QRD device.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220301061500.2110569-7-dmitry.baryshkov@linaro.org
 2022-04-12 21:24:15 -05:00
Dmitry Baryshkov
3795221250 arm64: dts: qcom: sm8450-qrd: enable PCIe0 PHY device 
Enable PCIe0 PHY on the SM8450 QRD device.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220301061500.2110569-6-dmitry.baryshkov@linaro.org
 2022-04-12 21:24:14 -05:00
Dmitry Baryshkov
bc6588bc25 arm64: dts: qcom: sm8450: add PCIe1 root device 
Add device tree node for the second PCIe host found on the Qualcomm
SM8450 platform.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220301061500.2110569-5-dmitry.baryshkov@linaro.org
 2022-04-12 21:24:13 -05:00
Dmitry Baryshkov
334d91d241 arm64: dts: qcom: sm8450: add PCIe1 PHY node 
Add device tree node for the second PCIe PHY device found on the Qualcomm
SM8450 platform.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220301061500.2110569-4-dmitry.baryshkov@linaro.org
 2022-04-12 21:24:12 -05:00
Dmitry Baryshkov
7b09b1b473 arm64: dts: qcom: sm8450: add PCIe0 RC device 
Add device tree node for the first PCIe host found on the Qualcomm
SM8450 platform.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Acked-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220301061500.2110569-3-dmitry.baryshkov@linaro.org
 2022-04-12 21:24:11 -05:00
Dmitry Baryshkov
d41a72c24c arm64: dts: qcom: sm8450: add PCIe0 PHY node 
Add device tree node for the first PCIe PHY device found on the Qualcomm
SM8450 platform.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220301061500.2110569-2-dmitry.baryshkov@linaro.org
 2022-04-12 21:24:10 -05:00
Taniya Das
9499240d15 arm64: dts: qcom: sc7280: Add lpasscore & lpassaudio clock controllers 
Add the low pass audio clock controller device nodes.

Signed-off-by: Taniya Das <tdas@codeaurora.org>
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220202053207.14256-1-tdas@codeaurora.org
 2022-04-12 21:19:31 -05:00
Bjorn Andersson
ef043b0dbf Merge branch '20220223172248.18877-1-tdas@codeaurora.org' into arm64-for-5.19 2022-04-12 21:18:13 -05:00
Taniya Das
4185b27b3b dt-bindings: clock: Add YAML schemas for LPASS clocks on SC7280 
The LPASS(Low Power Audio Subsystem) clock provider have a bunch of generic
properties that are needed in a device tree. Also add clock ids for
LPASS core clocks and audio clock IDs for LPASS client to request for
the clocks.

Reviewed-by: Rob Herring <robh@kernel.org>
Reviewed-by: Stephen Boyd <sboyd@kernel.org>
Signed-off-by: Taniya Das <tdas@codeaurora.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220223172248.18877-1-tdas@codeaurora.org
 2022-04-12 21:16:48 -05:00
Kuldeep Singh
095a7137ba arm64: dts: qcom: msm8996: User generic node name for DMA 
Qcom BAM DT spec expects generic DMA controller node name as
"dma-controller" to enable validations.

Signed-off-by: Kuldeep Singh <singh.kuldeep87k@gmail.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220410175056.79330-4-singh.kuldeep87k@gmail.com
 2022-04-12 19:36:01 -05:00
Stephan Gerhold
372c1c3dd7 arm64: dts: qcom: msm8916-huawei-g7: Add sound card 
The huawei-g7 uses the msm8916-wcd-digital/analog audio codecs similar
to apq8016-sbc, so we can mostly copy paste it from there to make audio
work correctly. The main difference is the hphl-jack-type-normally-open
property, which is needed to avoid inverted audio jack detection.

Note that at least on my device the jack detection is not fully
reliable: sometimes headphones are detected as headsets (with
microphone). However, this is not a big problem for typical usage.

Signed-off-by: Stephan Gerhold <stephan@gerhold.net>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220410195113.13646-3-stephan@gerhold.net
 2022-04-12 14:28:22 -05:00
Stephan Gerhold
d317344d6e arm64: dts: qcom: msm8916-huawei-g7: Clarify installation instructions 
The comment with installation instructions in the huawei-g7 device tree
is a bit misleading and does not describe the recommended installation
steps very well. The bootloader is actually not patched; to avoid all
trouble with the vendor bootloader it is easier to bypass it completely
by jumping to a custom bootloader (e.g. based on the open-source LK
released by Qualcomm).

To avoid confusion, simplify the comment to state only the problem
and then refer to the wiki article which contains detailed suggested
installation instructions. This will also make it easier to keep it
up to date with new developments in the future.

Fixes: 55056b2291 ("arm64: dts: qcom: msm8916: Add device tree for Huawei Ascend G7")
Signed-off-by: Stephan Gerhold <stephan@gerhold.net>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220410195113.13646-2-stephan@gerhold.net
 2022-04-12 14:28:20 -05:00
Konrad Dybcio
551b614e23 arm64: dts: qcom: sm8250-edo: Add dual CS35L41 amps 
Add nodes for dual Cirrus Logic CS35L41 audio amps connected via I2C.

Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220222014806.22446-1-konrad.dybcio@somainline.org
 2022-04-12 14:22:05 -05:00
Shaik Sajida Bhanu
959cb51307 arm64: dts: qcom: sc7280: Add reset entries for SDCC controllers 
Add gcc hardware reset entries for eMMC and SD card.

Signed-off-by: Shaik Sajida Bhanu <quic_c_sbhanu@quicinc.com>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/1649759528-15125-3-git-send-email-quic_c_sbhanu@quicinc.com
 2022-04-12 13:53:38 -05:00
Douglas Anderson
5a026558d2 arm64: dts: qcom: sc7280-herobrine: Audio codec wants 1.8V, not 1.62V 
The L2C rail on herobrine boards is intended to go to the audio
codec. Let's override the 1.62V specified in the qcard.dtsi file to be
1.8V.

Signed-off-by: Douglas Anderson <dianders@chromium.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220411141332.v2.1.I9f06fec63b978699fe62591fec9e5ac31bb3a69d@changeid
 2022-04-12 09:21:17 -05:00
Bhupesh Sharma
7011db96f6 arm64: dts: qcom: ipq6018: Fix qmp usb3 phy node 
Fix the following 'make dtbs_check' warning(s) by
using phy@ instead of lanes@ and by moving '#clock-cells' to
sub-node:

arch/arm64/boot/dts/qcom/ipq6018-cp01-c1.dt.yaml: ssphy@78000:
 'lane@78200' does not match any of the regexes: '^phy@[0-9a-f]+$', 'pinctrl-[0-9]+'

Cc: Bjorn Andersson <bjorn.andersson@linaro.org>
Cc: Rob Herring <robh@kernel.org>
Signed-off-by: Bhupesh Sharma <bhupesh.sharma@linaro.org>
Reviewed-by: Shawn Guo <shawn.guo@linaro.org>
[bjorn: s/clock-names/clock-cells/ per Shawn's feedback]
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220228123019.382037-7-bhupesh.sharma@linaro.org
 2022-04-12 09:21:17 -05:00
Bhupesh Sharma
c769a3521d arm64: dts: qcom: sm8450: Fix qmp ufs phy node (use phy@ instead of lanes@) 
Fix the 'make dtbs_check' warning:

arch/arm64/boot/dts/qcom/sm8450-qrd.dt.yaml: phy@1d87000:
 'lanes@1d87400' does not match any of the regexes: '^phy@[0-9a-f]+$', 'pinctrl-[0-9]+'

Cc: Bjorn Andersson <bjorn.andersson@linaro.org>
Cc: Rob Herring <robh@kernel.org>
Signed-off-by: Bhupesh Sharma <bhupesh.sharma@linaro.org>
Reviewed-by: Shawn Guo <shawn.guo@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220228123019.382037-6-bhupesh.sharma@linaro.org
 2022-04-12 09:21:17 -05:00