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arm64: dts: qcom: sm8250: Drop flags for mdss irqs

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The number of interrupt cells for the mdss interrupt controller is 1,
meaning there should only be one cell for the interrupt number, not two.
Drop the second cell containing (unused) irq flags.

Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Fixes: 7c1dffd471 ("arm64: dts: qcom: sm8250.dtsi: add display system nodes")
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Marijn Suijten <marijn.suijten@somainline.org>
Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220302225411.2456001-5-dmitry.baryshkov@linaro.org
This commit is contained in:
Dmitry Baryshkov
2022-03-03 01:54:10 +03:00
committed by Bjorn Andersson
parent 0316da6bbc
commit be63332992
1 changed files with 3 additions and 3 deletions
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6
arch/arm64/boot/dts/qcom/sm8250.dtsi
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@@ -3202,7 +3202,7 @@ mdss_mdp: mdp@ae01000 {
power-domains = <&rpmhpd SM8250_MMCX>;
interrupt-parent = <&mdss>;
interrupts = <0 IRQ_TYPE_LEVEL_HIGH>;
interrupts = <0>;
ports {
#address-cells = <1>;
@@ -3254,7 +3254,7 @@ dsi0: dsi@ae94000 {
reg-names = "dsi_ctrl";
interrupt-parent = <&mdss>;
interrupts = <4 IRQ_TYPE_LEVEL_HIGH>;
interrupts = <4>;
clocks = <&dispcc DISP_CC_MDSS_BYTE0_CLK>,
<&dispcc DISP_CC_MDSS_BYTE0_INTF_CLK>,
@@ -3327,7 +3327,7 @@ dsi1: dsi@ae96000 {
reg-names = "dsi_ctrl";
interrupt-parent = <&mdss>;
interrupts = <5 IRQ_TYPE_LEVEL_HIGH>;
interrupts = <5>;
clocks = <&dispcc DISP_CC_MDSS_BYTE1_CLK>,
<&dispcc DISP_CC_MDSS_BYTE1_INTF_CLK>,