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Arnd Bergmann
fafb0343aa Merge tag 'renesas-dt-bindings-for-v5.19-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel into arm/dt 
Renesas DT binding updates for v5.19

  - Document support for the new RZ/G2UL SoC and the RZ/G2UL SMARC EVK
    development board.

* tag 'renesas-dt-bindings-for-v5.19-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel:
  dt-bindings: arm: renesas: Document Renesas RZ/G2UL SMARC EVK
  dt-bindings: power: renesas,rzg2l-sysc: Document RZ/G2UL SoC

Link: https://lore.kernel.org/r/cover.1650638516.git.geert+renesas@glider.be
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
 2022-05-03 15:25:04 +02:00
Arnd Bergmann
70a89009f7 Merge tag 'renesas-arm-dt-for-v5.19-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel into arm/dt 
Renesas ARM DT updates for v5.19

  - ADC, SDHI, CAN-FD, I2C, QSPI, timer, watchdog, sound, USB, SPI, GPU,
    cpufreq, and thermal support for the RZ/V2L SoC, and the RZ/V2L
    SMARC EVK development board,
  - USB, I2C, Audio, NOR Flash, timer, SPI support for RZ/G2LC SMARC EVK
    development board,
  - Can-FD support for the R-Car M30W+ and V3U SoCs, and the Falcon
    development board,
  - I2C and GPIO support for the R-Car S4-8 SoC,
  - I2C EEPROM support for the Falcon development board,
  - SPI Multi I/O Bus Controller (RPC-IF) support for the R-Car H3,
    M3-W(+), M3-N, E3, and D3 SoCs,
  - RPC HyperFlash support for the Draak, Ebisu, Salvator-X(S), and ULCB
    development boards,
  - Initial support (UART, DMAC, pin control, SDHI, eMMC, Ethernet) for
    the RZ/G2UL SoC, and the RZ/G2UL SMARC EVK development board,
  - Miscellaneous fixes and improvements.

* tag 'renesas-arm-dt-for-v5.19-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel: (55 commits)
  ARM: dts: r9a06g032: Drop "arm,cortex-a7-timer" from timer node
  arm64: dts: renesas: r8a779f0: Add GPIO nodes
  arm64: dts: renesas: rzg2ul-smarc-som: Enable Ethernet on SMARC platform
  arm64: dts: renesas: rzg2ul-smarc-som: Enable eMMC on SMARC platform
  arm64: dts: renesas: rzg2ul-smarc: Enable microSD on SMARC platform
  arm64: dts: renesas: r9a07g043: Add GbEthernet nodes
  arm64: dts: renesas: r9a07g043: Add SDHI nodes
  arm64: dts: renesas: rzg2ul-smarc: Add scif0 and audio clk pins
  arm64: dts: renesas: r9a07g043: Fillup the pinctrl stub node
  arm64: dts: renesas: Add initial device tree for RZ/G2UL Type-1 SMARC EVK
  arm64: dts: renesas: Add initial DTSI for RZ/G2UL SoC
  arm64: dts: renesas: rzg2l-smarc: Move gpios property of vccq_sdhi1 from common dtsi
  arm64: dts: renesas: rzg2lc-smarc: Enable RSPI1 on carrier board
  arm64: dts: renesas: ulcb: Add RPC HyperFlash device node
  arm64: dts: renesas: salvator-common: Add RPC HyperFlash device node
  arm64: dts: renesas: ebisu: Add RPC HyperFlash device node
  arm64: dts: renesas: draak: Add RPC HyperFlash device node
  arm64: dts: renesas: rcar-gen3: Add RPC device nodes
  arm64: dts: renesas: rcar-gen4: Add interrupt properties to watchdog nodes
  arm64: dts: renesas: rzg2: Add interrupt properties to watchdog nodes
  ...

Link: https://lore.kernel.org/r/cover.1650638505.git.geert+renesas@glider.be
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
 2022-05-03 15:24:09 +02:00
Arnd Bergmann
9c099a379c Merge tag 'samsung-dt64-5.19' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into arm/dt 
Samsung DTS ARM64 changes for v5.19

1. Cleanup: move aliases of board-related features to board in
   Exynos850.
2. Add specific compatibles to Multi Core Timer to allow stricter DT
   schema matching.

* tag 'samsung-dt64-5.19' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux:
  arm64: dts: tesla: add a specific compatible to MCT on FSD
  arm64: dts: exynos: add a specific compatible to MCT
  arm64: dts: exynos: move aliases to board in Exynos850

Link: https://lore.kernel.org/r/20220420072152.11696-3-krzysztof.kozlowski@linaro.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
 2022-04-21 17:14:52 +02:00
Arnd Bergmann
9423c823e5 Merge tag 'samsung-dt-5.19' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into arm/dt 
Samsung DTS ARM changes for v5.19

1. Several DT schema related changes to make DTBs passing schema checks:
   EHCI/OHCI/DMA/Ethernet node names, DMA channels order, USB-like
   compatibles.
2. Add specific compatibles to Multi Core Timer to allow stricter DT
   schema matching.
3. Cleanup from deprecated bindings:
   - Remove deprecated unit-address workaround for Exynos5422 Odroid XU3
     LPDDR3 memory timings.
   - Do not use unit-address (and SFR region) in Exynos5250 MIPI phy in
     favor of syscon node (unit-address deprecated in 2016).
   - Use standard generic PHYs for EHCI/OHCI device in S5PV210.
4. Fix inverted SPI CS (thus blank panel) on S5PV210 Aries boards.
5. Correct Bluetooth interupt name on S5PV210 Aries boards.

* tag 'samsung-dt-5.19' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux:
  ARM: dts: s5pv210: align DMA channels with dtschema
  ARM: dts: s5pv210: Adjust DMA node names to match spec
  ARM: dts: s5pv210: Adjust memory reg entries to match spec
  ARM: dts: s5pv210: Correct interrupt name for bluetooth in Aries
  ARM: dts: s5pv210: Remove spi-cs-high on panel in Aries
  ARM: dts: s5pv210: Use standard arrays of generic PHYs for EHCI/OHCI device
  ARM: dts: s5pv210: align EHCI/OHCI nodes with dtschema
  ARM: dts: exynos: align EHCI/OHCI nodes with dtschema on Exynos4
  ARM: dts: exynos: drop deprecated SFR region from MIPI phy
  ARM: dts: exynos: add a specific compatible to MCT
  ARM: dts: exynos: remove deprecated unit address for LPDDR3 timings on Odroid
  ARM: dts: exynos: fix compatible strings for Ethernet USB devices
  ARM: dts: exynos: fix ethernet node name for different odroid boards

Link: https://lore.kernel.org/r/20220420072152.11696-2-krzysztof.kozlowski@linaro.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
 2022-04-21 17:10:01 +02:00
Arnd Bergmann
75e64de871 Merge tag 'dt-cleanup-5.19' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into arm/dt 
Minor cleanup of ARM DTS for v5.19

Align node names and unit addresses to DT schema and DT coding style in
nspire, ox820 and socfpga.

* tag 'dt-cleanup-5.19' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux:
  ARM: dts: socfpga: align interrupt controller node name with dtschema
  ARM: dts: ox820: align interrupt controller node name with dtschema
  ARM: dts: nspire: use lower case hex addresses in node unit addresses

Link: https://lore.kernel.org/r/20220420072152.11696-1-krzysztof.kozlowski@linaro.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
 2022-04-21 17:08:54 +02:00
Geert Uytterhoeven
aa70cbda74 ARM: dts: r9a06g032: Drop "arm,cortex-a7-timer" from timer node 
"make dtbs_check":

    arch/arm/boot/dts/r9a06g032-rzn1d400-db.dt.yaml: timer: compatible: 'oneOf' conditional failed, one must be fixed:
	    ['arm,cortex-a7-timer', 'arm,armv7-timer'] is too long
	    'arm,cortex-a7-timer' is not one of ['arm,cortex-a15-timer']
	    'arm,cortex-a7-timer' is not one of ['arm,armv7-timer']
	    'arm,cortex-a7-timer' is not one of ['arm,armv8-timer']
	    From schema: Documentation/devicetree/bindings/timer/arm,arch_timer.yaml

The Cortex-A7 timer should just declare compatibility with
"arm,armv7-timer".

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/a8e0cf00a983b4c539cdb1cfad5cc6b10b423c5b.1649680220.git.geert+renesas@glider.be
 2022-04-19 10:27:36 +02:00
Geert Uytterhoeven
8ba8560d4f arm64: dts: renesas: r8a779f0: Add GPIO nodes 
Add device nodes for the General Purpose Input/Output (GPIO) blocks on
the Renesas R-Car S4-8 (R8A779F0) SoC.

Note that GPIO blocks 4-7 are not added, as they can only be accessed
from the Control Domain.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/7fb68561026fa8bb5d9baf0596560c5c719a38cc.1649086225.git.geert+renesas@glider.be
 2022-04-19 10:27:36 +02:00
Biju Das
6494e4f905 arm64: dts: renesas: rzg2ul-smarc-som: Enable Ethernet on SMARC platform 
Enable Ethernet{0,1} interfaces on RZ/G2UL SMARC EVK.

Ethernet0 pins are muxed with CAN0, CAN1, SSI1 and RSPI1 pins and Ethernet0
device selection is based on the SW1[3] switch position.

Set SW1[3] to position OFF for selecting CAN0, CAN1, SSI1 and RSPI1.
Set SW1[3] to position ON for selecting Ethernet0.

This patch disables Ethernet0 on RZ/G2UL SMARC platform by default.

Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Link: https://lore.kernel.org/r/20220402081328.26292-8-biju.das.jz@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
 2022-04-13 13:56:09 +02:00
Biju Das
ed8efe50b7 arm64: dts: renesas: rzg2ul-smarc-som: Enable eMMC on SMARC platform 
RZ/G2UL SoM has both 64GB eMMC and microSD connected to SDHI0.

Both these interfaces are mutually exclusive and the SD0 device
selection is based on SW1[2] on SoM module.

Set SW1[2] to position OFF for selecting eMMC
Set SW1[2] to position ON for selecting microSD

This patch enables eMMC on RZ/G2UL SMARC platform by default.

Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Link: https://lore.kernel.org/r/20220402081328.26292-7-biju.das.jz@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
 2022-04-13 13:56:09 +02:00
Biju Das
a74a0bf3f3 arm64: dts: renesas: rzg2ul-smarc: Enable microSD on SMARC platform 
Enable the microSD card slot connected to SDHI1 on the RZ/G2UL SMARC
platform by removing the sdhi1 override which disabled it, and by adding
the necessary pinmux required for SDHI1.

This patch also adds gpios property to vccq_sdhi1 regulator.

Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Link: https://lore.kernel.org/r/20220402081328.26292-6-biju.das.jz@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
 2022-04-13 13:56:09 +02:00
Biju Das
13ea8b3584 arm64: dts: renesas: r9a07g043: Add GbEthernet nodes 
Add Gigabit Ethernet{0,1} nodes to SoC DTSI.

Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Link: https://lore.kernel.org/r/20220402081328.26292-5-biju.das.jz@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
 2022-04-13 13:56:09 +02:00
Biju Das
20e63d3948 arm64: dts: renesas: r9a07g043: Add SDHI nodes 
Add SDHI{0, 1} nodes to RZ/G2UL SoC DTSI.

Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Link: https://lore.kernel.org/r/20220402081328.26292-4-biju.das.jz@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
 2022-04-13 13:56:09 +02:00
Biju Das
4e44055440 arm64: dts: renesas: rzg2ul-smarc: Add scif0 and audio clk pins 
Add scif0 and audio clk pins to soc pinctrl dtsi and drop deleting
the pinctrl-0 and pinctrl-names properties for scif0 node so that
we now actually make use of these properties for scif0.

Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Link: https://lore.kernel.org/r/20220402081328.26292-3-biju.das.jz@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
 2022-04-13 13:56:09 +02:00
Biju Das
2d10555298 arm64: dts: renesas: r9a07g043: Fillup the pinctrl stub node 
Fillup the pinctrl(GPIO) stub node in RZ/G2UL SoC DTSI.

Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Link: https://lore.kernel.org/r/20220402081328.26292-2-biju.das.jz@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
 2022-04-13 13:56:09 +02:00
Biju Das
895199bc4e arm64: dts: renesas: Add initial device tree for RZ/G2UL Type-1 SMARC EVK 
Add basic support for RZ/G2UL SMARC EVK (based on R9A07G043U11):
- memory
- External input clock
- CPG
- DMA
- SCIF

It shares the same carrier board with RZ/G2L, but the pin mapping is
different. Disable the device nodes which are not tested and delete the
corresponding pinctrl definitions.

Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Link: https://lore.kernel.org/r/20220412161314.13800-4-biju.das.jz@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
 2022-04-13 13:56:09 +02:00
Biju Das
cf40c9689e arm64: dts: renesas: Add initial DTSI for RZ/G2UL SoC 
Add initial DTSI for RZ/G2UL SoC.

Both RZ/G2L and RZ/G2UL uses the same SMARC EVK. Therefore they share
the common dtsi (rz-smarc.dtsi) file. Place holders are added in
device nodes to avoid compilation errors for the devices which have
not been enabled yet on RZ/G2UL SoC.

Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Link: https://lore.kernel.org/r/20220412161314.13800-3-biju.das.jz@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
 2022-04-13 13:56:09 +02:00
Geert Uytterhoeven
0faf567d6d Merge tag 'renesas-r9a07g043-dt-binding-defs-tag' into HEAD 
Renesas RZ/G2UL DT Binding Definitions

Clock and reset definitions for the Renesas RZ/G2UL (R9A07G043) SoC,
shared by driver and DT source files.
 2022-04-13 13:56:04 +02:00
Biju Das
f40846e7c9 arm64: dts: renesas: rzg2l-smarc: Move gpios property of vccq_sdhi1 from common dtsi 
On RZ/G2{L,LC} SoM module, gpio for power selection is connected to
P39_1 whereas on RZ/G2UL it is connected to P6_1. So move gpios property
of vccq_sdhi1 regulator from common dtsi to soc specific dtsi.

Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Link: https://lore.kernel.org/r/20220401175427.19078-1-biju.das.jz@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
 2022-04-13 13:54:32 +02:00
Biju Das
061ba41c74 arm64: dts: renesas: rzg2lc-smarc: Enable RSPI1 on carrier board 
RSPI1 (SPI1) interface is available on PMOD0 connector (J1) on the
carrier board.  This patch adds pinmux and spi1 nodes to the carrier
board dtsi file and drops deleting pinctl* properties from DTS file.

RSPI1 interface is tested by setting the macro SW_RSPI_CAN to 0.

Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Link: https://lore.kernel.org/r/20220401145702.17954-1-biju.das.jz@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
 2022-04-13 13:53:42 +02:00
Geert Uytterhoeven
79e903fbf4 arm64: dts: renesas: ulcb: Add RPC HyperFlash device node 
Add the RPC HyperFlash device node along with its partitions to the
common ULCB board DTS file.

Based on a patch in the BSP by Valentine Barshak.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/61a63e819d4296760ca7ae83ef5226a2c4d7bd93.1648548339.git.geert+renesas@glider.be
 2022-04-13 13:53:42 +02:00
Geert Uytterhoeven
1ee6674bbe arm64: dts: renesas: salvator-common: Add RPC HyperFlash device node 
Add the RPC HyperFlash device node along with its partitions to the
common Salvator-X(S) board DTS file.

Based on a patch in the BSP by Valentine Barshak.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/cfc6af8a4c42febcc405b7356c38448eec8e29b0.1648548339.git.geert+renesas@glider.be
 2022-04-13 13:53:42 +02:00
Geert Uytterhoeven
5f300a7f39 arm64: dts: renesas: ebisu: Add RPC HyperFlash device node 
Add the RPC HyperFlash device node along with its partitions to the
common Ebisu board DTS file.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/b14c769f62211b67d90dbd2f127357756e6cb4fa.1648548339.git.geert+renesas@glider.be
 2022-04-13 13:53:42 +02:00
Geert Uytterhoeven
a1de91f0ac arm64: dts: renesas: draak: Add RPC HyperFlash device node 
Add the RPC HyperFlash device node along with its partitions to the
common Draak board DTS file.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/0f3d3018ecfcdce1bce67708708a6d3a98368b10.1648548339.git.geert+renesas@glider.be
 2022-04-13 13:53:42 +02:00
Geert Uytterhoeven
f191fba769 arm64: dts: renesas: rcar-gen3: Add RPC device nodes 
Add device nodes for the SPI Multi I/O Bus Controllers (RPC-IF) on the
various R-Car Gen3 SoCs that do not have support for them yet in their
device trees (R-Car H3, M3-W, M3-W+, M3-N, E3, and D3).

Based on patches in the BSP by Valentine Barshak.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Link: https://lore.kernel.org/r/3231749c7b63df1a2134daabe66446a3e0e5515b.1648548339.git.geert+renesas@glider.be
 2022-04-13 13:53:42 +02:00
Wolfram Sang
ccc0dd722e arm64: dts: renesas: rcar-gen4: Add interrupt properties to watchdog nodes 
Driver doesn't use it yet, but let's describe the HW properly.

Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Link: https://lore.kernel.org/r/20220322095512.4707-6-wsa+renesas@sang-engineering.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
 2022-04-13 13:43:04 +02:00
Wolfram Sang
7ac8afba22 arm64: dts: renesas: rzg2: Add interrupt properties to watchdog nodes 
Driver doesn't use it yet, but let's describe the HW properly.

Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Link: https://lore.kernel.org/r/20220322095512.4707-5-wsa+renesas@sang-engineering.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
 2022-04-13 13:43:04 +02:00
Wolfram Sang
2bc0aa18ee arm64: dts: renesas: rcar-gen3: Add interrupt properties to watchdog nodes 
Driver doesn't use it yet, but let's describe the HW properly.

Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Link: https://lore.kernel.org/r/20220322095512.4707-4-wsa+renesas@sang-engineering.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
 2022-04-13 13:43:04 +02:00
Wolfram Sang
cb97d48555 ARM: dts: rzg1: Add interrupt properties to watchdog nodes 
Driver doesn't use it yet, but let's describe the HW properly.

Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Link: https://lore.kernel.org/r/20220322095512.4707-3-wsa+renesas@sang-engineering.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
 2022-04-13 13:43:03 +02:00
Wolfram Sang
2e4d5fd6f5 ARM: dts: rcar-gen2: Add interrupt properties to watchdog nodes 
Driver doesn't use it yet, but let's describe the HW properly.

Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Link: https://lore.kernel.org/r/20220322095512.4707-2-wsa+renesas@sang-engineering.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
 2022-04-13 13:43:03 +02:00
Biju Das
eb27897854 dt-bindings: clock: Add R9A07G043 CPG Clock and Reset Definitions 
Define RZ/G2UL (R9A07G043U) Clock Pulse Generator Core Clock and module
clock outputs, as listed in Table 7.1.4.2 ("Clock List r0.51") and also
add Reset definitions referring to registers CPG_RST_* in Section 7.2.3
("Register configuration") of the RZ/G2UL Hardware User's Manual (Rev.
0.51, Nov. 2021).

Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Acked-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20220402073037.23947-3-biju.das.jz@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
 2022-04-13 12:21:04 +02:00
Biju Das
05d39fc06c dt-bindings: arm: renesas: Document Renesas RZ/G2UL SMARC EVK 
Document the Renesas SMARC EVK board which is based on the Renesas
RZ/G2UL Type-1 (R9A07G043U11) SoC.  The SMARC EVK consists of an
RZ/G2UL Type-1 SoM module and a SMARC carrier board.  The SoM module
sits on top of the carrier board.

Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Link: https://lore.kernel.org/r/20220402073234.24625-1-biju.das.jz@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
 2022-04-13 12:19:31 +02:00
Geert Uytterhoeven
599fdfddc8 arm64: dts: renesas: spider: Add Ethernet sub-board 
Add a DTS file for the Spider Ether TSN sub-board (RTP8A779F0ASKB0ST0S),
and include it from the main r8a779f0-spider.dts.

For now its contents are limited to the Board ID EEPROM.

Extracted from a larger patch in the BSP by LUU HOAI.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Link: https://lore.kernel.org/r/5aa58816182b34d9e5795bc1e22784f4e4879d13.1643898884.git.geert+renesas@glider.be
 2022-04-11 12:00:33 +02:00
Geert Uytterhoeven
b74d5d65af arm64: dts: renesas: spider-cpu: Add I2C4 and EEPROMs 
Enable the I2C4 bus on the Falcon CPU board, and describe the I2C EEPROMs
present on the Spider CPU and BreakOut boards.

Extracted from a larger patch in the BSP by LUU HOAI.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Link: https://lore.kernel.org/r/6d8917e49f83b6a932970ca169100eb086d11f16.1643898884.git.geert+renesas@glider.be
 2022-04-11 12:00:32 +02:00
Geert Uytterhoeven
bd04437341 arm64: dts: renesas: r8a779f0: Add I2C nodes 
Add device nodes for the I2C Bus Interfaces on the Renesas R-Car S4-8
(R8A779F0) SoC.

Based on a larger patch in the BSP by LUU HOAI.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/e1c7fb17801bc82a74aa5364212d02ba51535dd2.1643898884.git.geert+renesas@glider.be
 2022-04-11 12:00:32 +02:00
Krzysztof Kozlowski
9e916fb9bc ARM: dts: s5pv210: align DMA channels with dtschema 
dtschema expects DMA channels in specific order (tx, rx and tx-sec).
The order actually should not matter because dma-names is used however
let's make it aligned with dtschema to suppress warnings like:

  i2s@eee30000: dma-names: ['rx', 'tx', 'tx-sec'] is not valid under any of the given schemas

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Co-developed-by: Jonathan Bakker <xc-racer2@live.ca>
Signed-off-by: Jonathan Bakker <xc-racer2@live.ca>
Link: https://lore.kernel.org/r/CY4PR04MB056779A9C50DC95987C5272ACB1C9@CY4PR04MB0567.namprd04.prod.outlook.com
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
 2022-04-09 18:50:05 +02:00
Jonathan Bakker
21e4b7d151 ARM: dts: s5pv210: Adjust DMA node names to match spec 
DMA node names should be dma-controller according to the DT spec,
so rename them from pdma/mdma.  Prevents warnings when running
make dtbs_check

Signed-off-by: Jonathan Bakker <xc-racer2@live.ca>
Link: https://lore.kernel.org/r/CY4PR04MB0567F52ABAE0A3CCD3C7CE59CB1C9@CY4PR04MB0567.namprd04.prod.outlook.com
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
 2022-04-09 18:50:05 +02:00
Jonathan Bakker
9576ec1226 ARM: dts: s5pv210: Adjust memory reg entries to match spec 
The reg property of memory nodes should have pairs of offset, size;
not all memory banks lumped in as one.

Signed-off-by: Jonathan Bakker <xc-racer2@live.ca>
Link: https://lore.kernel.org/r/CY4PR04MB05677849A13F41BF603906DFCB1C9@CY4PR04MB0567.namprd04.prod.outlook.com
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
 2022-04-09 18:50:05 +02:00
Jonathan Bakker
3f5e3d3a8b ARM: dts: s5pv210: Correct interrupt name for bluetooth in Aries 
Correct the name of the bluetooth interrupt from host-wake to
host-wakeup.

Fixes: 1c65b61844 ("ARM: dts: s5pv210: Correct BCM4329 bluetooth node")
Cc: <stable@vger.kernel.org>
Signed-off-by: Jonathan Bakker <xc-racer2@live.ca>
Link: https://lore.kernel.org/r/CY4PR04MB0567495CFCBDC8D408D44199CB1C9@CY4PR04MB0567.namprd04.prod.outlook.com
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
 2022-04-09 18:49:51 +02:00
Jonathan Bakker
096f585073 ARM: dts: s5pv210: Remove spi-cs-high on panel in Aries 
Since commit 766c6b63aa ("spi: fix client driver breakages when using
GPIO descriptors"), the panel has been blank due to an inverted CS GPIO.
In order to correct this, drop the spi-cs-high from the panel SPI device.

Fixes: 766c6b63aa ("spi: fix client driver breakages when using GPIO descriptors")
Cc: <stable@vger.kernel.org>
Signed-off-by: Jonathan Bakker <xc-racer2@live.ca>
Link: https://lore.kernel.org/r/CY4PR04MB05670C771062570E911AF3B4CB1C9@CY4PR04MB0567.namprd04.prod.outlook.com
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
 2022-04-09 18:49:47 +02:00
Krzysztof Kozlowski
1ceaccf2b2 arm64: dts: synaptics: remove unused DTSI for AS370 
The as370.dtsi for Synaptics AS370 SoC does not have a user (DTS board
file), is uncompilable and untestable.  It was added back in 2018.  No
user appeared since that time, so assume it won't be added.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
 2022-04-08 18:18:48 +02:00
Krzysztof Kozlowski
c9bdd50d20 ARM: dts: socfpga: align interrupt controller node name with dtschema 
Fixes dtbs_check warnings like:

  $nodename:0: 'intc@fffed000' does not match '^interrupt-controller(@[0-9a-f,]+)*$'

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Acked-by: Dinh Nguyen <dinguyen@kernel.org>
Link: https://lore.kernel.org/r/20220317115705.450427-2-krzysztof.kozlowski@canonical.com
 2022-04-07 21:30:22 +02:00
Krzysztof Kozlowski
fbcd5ad7a4 ARM: dts: ox820: align interrupt controller node name with dtschema 
Fixes dtbs_check warnings like:

  gic@1000: $nodename:0: 'gic@1000' does not match '^interrupt-controller(@[0-9a-f,]+)*$'

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Acked-by: Neil Armstrong <narmstrong@baylibre.com>
Link: https://lore.kernel.org/r/20220317115705.450427-1-krzysztof.kozlowski@canonical.com
 2022-04-07 21:29:59 +02:00
Krzysztof Kozlowski
fa04ccac61 ARM: dts: nspire: use lower case hex addresses in node unit addresses 
Convert all hex addresses in node unit addresses to lower case to fix
dt_binding_check and dtc W=1 warnings.

Conversion was done using sed:

  $ sed -e 's/@\([a-zA-Z0-9_-]*\) {/@\L\1 {/' -i arch/arm/boot/dts/nspire*
  $ sed -e 's/<0x\([a-zA-Z0-9_-]*\) /<0x\L\1 /g' -i arch/arm/boot/dts/nspire*

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20220317115542.450032-2-krzysztof.kozlowski@canonical.com
 2022-04-07 21:29:38 +02:00
Krzysztof Kozlowski
061d09499f ARM: dts: s5pv210: Use standard arrays of generic PHYs for EHCI/OHCI device 
Move USB PHYs to a standard arrays for S5PV210 EHCI/OHCI devices. This
resolves the conflict between S5PV210 EHCI/OHCI sub-nodes and generic USB
device bindings.

Suggested-by: Måns Rullgård <mans@mansr.com>
Suggested-by: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20220314181948.246434-3-krzysztof.kozlowski@canonical.com
 2022-04-04 18:56:11 +02:00
Krzysztof Kozlowski
ab92681ca1 ARM: dts: s5pv210: align EHCI/OHCI nodes with dtschema 
The node names should be generic and USB DT schema expects "usb" names.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Alim Akhtar <alim.akhtar@samsung.com>
Link: https://lore.kernel.org/r/20220314181948.246434-2-krzysztof.kozlowski@canonical.com
 2022-04-04 18:55:46 +02:00
Krzysztof Kozlowski
b412be7d3c ARM: dts: exynos: align EHCI/OHCI nodes with dtschema on Exynos4 
The node names should be generic and USB DT schema expects "usb" names.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Alim Akhtar <alim.akhtar@samsung.com>
Link: https://lore.kernel.org/r/20220314181948.246434-1-krzysztof.kozlowski@canonical.com
 2022-04-04 18:55:19 +02:00
Krzysztof Kozlowski
04398e0417 ARM: dts: exynos: drop deprecated SFR region from MIPI phy 
Commit e4b3d38088 ("phy: exynos-video-mipi: Fix regression by adding
support for PMU regmap") deprecated the usage of unit address in MIPI
phy node, in favor of a syscon phandle.  Deprecating was a correct
approach because that unit address was actually coming from Power
Management Unit SFR range so its usage here caused overlapped memory
mapping.

In 2016 commit 26dbadba49 ("phy: exynos-mipi-video: Drop support for
direct access to PMU") fully removed support for parsing that MIPI phy
unit address (SFR range) but the address stayed in Exynos5250 DTSI for
compatibility reasons.

Remove that deprecated unit address from Exynos5250 MIPI phy, because it
has been almost 6 years since it was deprecated and it causes now DT
schema validation warnings:

  video-phy@10040710: 'reg' does not match any of the regexes: 'pinctrl-[0-9]+'

Any out-of-tree users of Exynos5250 DTSI, should update their code to
use newer syscon property.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Alim Akhtar<alim.akhtar@samsung.com>
Link: https://lore.kernel.org/r/20220314184113.251013-1-krzysztof.kozlowski@canonical.com
 2022-04-04 18:54:46 +02:00
Krzysztof Kozlowski
22cbcb8f4a arm64: dts: tesla: add a specific compatible to MCT on FSD 
One compatible is used for the Multi-Core Timer on Tesla FSD SoC, which
is correct but not specific enough.  The MCT blocks have different
number of interrupts, so add a second specific compatible to Tesla FSD.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Alim Akhtar <alim.akhtar@samsung.com>
Link: https://lore.kernel.org/r/20220304122424.307885-5-krzysztof.kozlowski@canonical.com
 2022-04-04 18:53:08 +02:00
Krzysztof Kozlowski
2616922241 arm64: dts: exynos: add a specific compatible to MCT 
One compatible is used for the Multi-Core Timer on most of the Samsung
Exynos SoCs, which is correct but not specific enough.  These MCT blocks
have different number of interrupts, so add a second specific
compatible to Exynos5433 and Exynos850.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Alim Akhtar <alim.akhtar@samsung.com>
Link: https://lore.kernel.org/r/20220304122424.307885-4-krzysztof.kozlowski@canonical.com
 2022-04-04 18:52:55 +02:00
Krzysztof Kozlowski
cca50a59f6 ARM: dts: exynos: add a specific compatible to MCT 
One compatible is used for the Multi-Core Timer on most of the Samsung
Exynos SoCs, which is correct but not specific enough.  These MCT blocks
have different number of interrupts, so add a second specific
compatible to Exynos3250 and all Exynos5 SoCs.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Alim Akhtar <alim.akhtar@samsung.com>
Link: https://lore.kernel.org/r/20220304122424.307885-3-krzysztof.kozlowski@canonical.com
 2022-04-04 18:51:36 +02:00