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Merge tag 'dt-cleanup-5.19' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into arm/dt

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Minor cleanup of ARM DTS for v5.19

Align node names and unit addresses to DT schema and DT coding style in
nspire, ox820 and socfpga.

* tag 'dt-cleanup-5.19' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux:
  ARM: dts: socfpga: align interrupt controller node name with dtschema
  ARM: dts: ox820: align interrupt controller node name with dtschema
  ARM: dts: nspire: use lower case hex addresses in node unit addresses

Link: https://lore.kernel.org/r/20220420072152.11696-1-krzysztof.kozlowski@linaro.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This commit is contained in:
Arnd Bergmann
2022-04-21 17:08:54 +02:00
parent 1ceaccf2b2 c9bdd50d20
commit 75e64de871
6 changed files with 40 additions and 40 deletions
Download Patch File Download Diff File Expand all files Collapse all files

10
arch/arm/boot/dts/nspire-classic.dtsi
View File

@@ -17,7 +17,7 @@ clcd_pads: endpoint {
&fast_timer {
/* compatible = "lsi,zevio-timer"; */
reg = <0x90010000 0x1000>, <0x900A0010 0x8>;
reg = <0x90010000 0x1000>, <0x900a0010 0x8>;
};
&uart {
@@ -30,12 +30,12 @@ &uart {
&timer0 {
/* compatible = "lsi,zevio-timer"; */
reg = <0x900C0000 0x1000>, <0x900A0018 0x8>;
reg = <0x900c0000 0x1000>, <0x900a0018 0x8>;
};
&timer1 {
compatible = "lsi,zevio-timer";
reg = <0x900D0000 0x1000>, <0x900A0020 0x8>;
reg = <0x900d0000 0x1000>, <0x900a0020 0x8>;
};
&keypad {
@@ -66,10 +66,10 @@ ahb {
#address-cells = <1>;
#size-cells = <1>;
intc: interrupt-controller@DC000000 {
intc: interrupt-controller@dc000000 {
compatible = "lsi,zevio-intc";
interrupt-controller;
reg = <0xDC000000 0x1000>;
reg = <0xdc000000 0x1000>;
#interrupt-cells = <1>;
};
};

4
arch/arm/boot/dts/nspire-cx.dts
View File

@@ -92,10 +92,10 @@ ahb {
#address-cells = <1>;
#size-cells = <1>;
intc: interrupt-controller@DC000000 {
intc: interrupt-controller@dc000000 {
compatible = "arm,pl190-vic";
interrupt-controller;
reg = <0xDC000000 0x1000>;
reg = <0xdc000000 0x1000>;
#interrupt-cells = <1>;
};

60
arch/arm/boot/dts/nspire.dtsi
View File

@@ -20,9 +20,9 @@ bootrom: bootrom@0 {
reg = <0x00000000 0x80000>;
};
sram: sram@A4000000 {
sram: sram@a4000000 {
device = "memory";
reg = <0xA4000000 0x20000>;
reg = <0xa4000000 0x20000>;
};
timer_clk: timer_clk {
@@ -33,12 +33,12 @@ timer_clk: timer_clk {
base_clk: base_clk {
#clock-cells = <0>;
reg = <0x900B0024 0x4>;
reg = <0x900b0024 0x4>;
};
ahb_clk: ahb_clk {
#clock-cells = <0>;
reg = <0x900B0024 0x4>;
reg = <0x900b0024 0x4>;
clocks = <&base_clk>;
};
@@ -71,28 +71,28 @@ ahb {
#size-cells = <1>;
ranges;
spi: spi@A9000000 {
reg = <0xA9000000 0x1000>;
spi: spi@a9000000 {
reg = <0xa9000000 0x1000>;
};
usb0: usb@B0000000 {
usb0: usb@b0000000 {
compatible = "lsi,zevio-usb";
reg = <0xB0000000 0x1000>;
reg = <0xb0000000 0x1000>;
interrupts = <8>;
usb-phy = <&usb_phy>;
vbus-supply = <&vbus_reg>;
};
usb1: usb@B4000000 {
reg = <0xB4000000 0x1000>;
usb1: usb@b4000000 {
reg = <0xb4000000 0x1000>;
interrupts = <9>;
status = "disabled";
};
lcd: lcd@C0000000 {
lcd: lcd@c0000000 {
compatible = "arm,pl111", "arm,primecell";
reg = <0xC0000000 0x1000>;
reg = <0xc0000000 0x1000>;
interrupts = <21>;
/*
@@ -105,17 +105,17 @@ lcd: lcd@C0000000 {
clock-names = "clcdclk", "apb_pclk";
};
adc: adc@C4000000 {
reg = <0xC4000000 0x1000>;
adc: adc@c4000000 {
reg = <0xc4000000 0x1000>;
interrupts = <11>;
};
tdes: crypto@C8010000 {
reg = <0xC8010000 0x1000>;
tdes: crypto@c8010000 {
reg = <0xc8010000 0x1000>;
};
sha256: crypto@CC000000 {
reg = <0xCC000000 0x1000>;
sha256: crypto@cc000000 {
reg = <0xcc000000 0x1000>;
};
apb@90000000 {
@@ -143,16 +143,16 @@ uart: serial@90020000 {
interrupts = <1>;
};
timer0: timer@900C0000 {
reg = <0x900C0000 0x1000>;
timer0: timer@900c0000 {
reg = <0x900c0000 0x1000>;
clocks = <&timer_clk>, <&timer_clk>,
<&timer_clk>;
clock-names = "timer0clk", "timer1clk",
"apb_pclk";
};
timer1: timer@900D0000 {
reg = <0x900D0000 0x1000>;
timer1: timer@900d0000 {
reg = <0x900d0000 0x1000>;
interrupts = <19>;
clocks = <&timer_clk>, <&timer_clk>,
<&timer_clk>;
@@ -171,18 +171,18 @@ rtc: rtc@90090000 {
interrupts = <4>;
};
misc: misc@900A0000 {
reg = <0x900A0000 0x1000>;
misc: misc@900a0000 {
reg = <0x900a0000 0x1000>;
};
pwr: pwr@900B0000 {
reg = <0x900B0000 0x1000>;
pwr: pwr@900b0000 {
reg = <0x900b0000 0x1000>;
interrupts = <15>;
};
keypad: input@900E0000 {
keypad: input@900e0000 {
compatible = "ti,nspire-keypad";
reg = <0x900E0000 0x1000>;
reg = <0x900e0000 0x1000>;
interrupts = <16>;
scan-interval = <1000>;
@@ -191,8 +191,8 @@ keypad: input@900E0000 {
clocks = <&apb_pclk>;
};
contrast: contrast@900F0000 {
reg = <0x900F0000 0x1000>;
contrast: contrast@900f0000 {
reg = <0x900f0000 0x1000>;
};
led: led@90110000 {

2
arch/arm/boot/dts/ox820.dtsi
View File

@@ -287,7 +287,7 @@ local-timer@600 {
clocks = <&armclk>;
};
gic: gic@1000 {
gic: interrupt-controller@1000 {
compatible = "arm,arm11mp-gic";
interrupt-controller;
#interrupt-cells = <3>;

2
arch/arm/boot/dts/socfpga.dtsi
View File

@@ -46,7 +46,7 @@ pmu: pmu@ff111000 {
<0xff113000 0x1000>;
};
intc: intc@fffed000 {
intc: interrupt-controller@fffed000 {
compatible = "arm,cortex-a9-gic";
#interrupt-cells = <3>;
interrupt-controller;

2
arch/arm/boot/dts/socfpga_arria10.dtsi
View File

@@ -38,7 +38,7 @@ pmu: pmu@ff111000 {
<0xff113000 0x1000>;
};
intc: intc@ffffd000 {
intc: interrupt-controller@ffffd000 {
compatible = "arm,cortex-a9-gic";
#interrupt-cells = <3>;
interrupt-controller;