Commit Graph

119734 Commits

Author SHA1 Message Date
chong li
f9f3240018 drm/amdgpu: fix mes packet params issue when flush hdp.
v4:
use func "amdgpu_gfx_get_hdp_flush_mask" to get ref_and_mask for
gfx9 through gfx12.

v3:
Unify the get_ref_and_mask function in amdgpu_gfx_funcs,
to support both GFX11 and earlier generations

v2:
place "get_ref_and_mask" in amdgpu_gfx_funcs instead of amdgpu_ring,
since this function only assigns the cp entry.

v1:
both gfx ring and mes ring use cp0 to flush hdp, cause conflict.

use function get_ref_and_mask to assign the cp entry.
reassign mes to use cp8 instead.

Signed-off-by: chong li <chongli2@amd.com>
Acked-by: Lijo Lazar <lijo.lazar@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2025-12-10 17:38:21 -05:00
Alex Deucher
e26e4225ae drm/amdgpu/gfx: add eop size and alignment to shadow info
This is used by firmware for compute user queues.

Reviewed-by: Prike Liang <Prike.Liang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2025-12-10 17:38:15 -05:00
Candice Li
90254524ee drm/amd/ras: Add vram_type to ras_ta_init_flags
Add vram_type to ras_ta_init_flags.

Signed-off-by: Candice Li <candice.li@amd.com>
Reviewed-by: Tao Zhou <tao.zhou1@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2025-12-10 17:38:13 -05:00
Likun Gao
d6e8148328 drm/amdgpu: update sdma configuration for soc v1_0
Update SDMA instances/masks according to xcc num for
multi-xcc models on soc v1.0.

Signed-off-by: Likun Gao <Likun.Gao@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2025-12-10 17:38:10 -05:00
Hawking Zhang
f9ed1d463e drm/amdgpu: Initialize xcp manager for soc v1_0
Initialize xcp manager for soc v1_0

Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Likun Gao <Likun.Gao@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2025-12-10 17:38:07 -05:00
Hawking Zhang
a936896135 drm/amdgpu: Add soc_v1_0_xcp_funcs
Implement xcp mgr callbacks for soc v1_0

Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Likun Gao <Likun.Gao@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2025-12-10 17:38:05 -05:00
Hawking Zhang
e90a43c0c2 drm/amdgpu: Export sdma_v7_1_xcp_funcs
To be used by soc v1_0 xcp manager

Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Likun Gao <Likun.Gao@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2025-12-10 17:38:02 -05:00
Hawking Zhang
4fbc61018b drm/amdgpu: Export gfx_v12_1_xcp_func
To be used by soc v1_0 xcp manager

Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Likun Gao <Likun.Gao@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2025-12-10 17:37:59 -05:00
Candice Li
2e133eda97 drm/amdgpu: Add vram_type to ras init_flags
Add vram_type to ras init_flags.

Signed-off-by: Candice Li <candice.li@amd.com>
Reviewed-by: Tao Zhou <tao.zhou1@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2025-12-10 17:37:56 -05:00
Srinivasan Shanmugam
6ef93f6253 drm/amd/ras: Reduce stack usage in amdgpu_virt_ras_get_cper_records()
amdgpu_virt_ras_get_cper_records() was using a large stack array
of ras_log_info pointers. This contributed to the frame size
warning on this function.

Replace the fixed-size stack array:

    struct ras_log_info *trace[MAX_RECORD_PER_BATCH];

with a heap-allocated array using kcalloc().

We free the trace buffer together with out_buf on all exit paths.
If allocation of trace or out_buf fails, we return a generic RAS
error code.

This reduces stack usage and keeps the runtime behaviour
unchanged.

Fixes:
stack frame size: 1112 bytes (limit: 1024)

Cc: Tao Zhou <tao.zhou1@amd.com>
Cc: Hawking Zhang <Hawking.Zhang@amd.com>
Cc: Christian König <christian.koenig@amd.com>
Cc: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Srinivasan Shanmugam <srinivasan.shanmugam@amd.com>
Reviewed-by: Tao Zhou <tao.zhou1@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2025-12-10 17:37:50 -05:00
Philip Yang
5b57c3c3f2 drm/amdkfd: Handle GPU reset and drain retry fault race
Only check and drain IH1 ring if CAM is not enabled.

If GPU is under reset, don't access IH to drain retry fault.

Signed-off-by: Philip Yang <Philip.Yang@amd.com>
Reviewed-by: Harish Kasiviswanathan <Harish.Kasiviswanathan@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2025-12-10 17:37:45 -05:00
Mario Limonciello
e1c94109c7 Revert "drm/amd/display: Fix pbn to kbps Conversion"
Deeply daisy chained DP/MST displays are no longer able to light
up. This reverts commit e0dec00f3d ("drm/amd/display: Fix pbn
to kbps Conversion")

Cc: Jerry Zuo <jerry.zuo@amd.com>
Reported-by: nat@nullable.se
Closes: https://gitlab.freedesktop.org/drm/amd/-/issues/4756
Signed-off-by: Mario Limonciello <mario.limonciello@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2025-12-10 17:35:26 -05:00
Hawking Zhang
84d8beaf11 drm/amdgpu: Add switch_compute_partition callback for imu v12_1
To enable switching compute partition mode

v2: cleanup (Alex)

Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Likun Gao <Likun.Gao@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2025-12-10 17:35:22 -05:00
Hawking Zhang
7ce7234189 drm/amdgpu: Implement gfx_v12_1_get_xccs_per_xcp
Use gfx v12_1 callback to query the numbers of xccs
per xcp

v2: add todo (Alex)

Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Le Ma <le.ma@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2025-12-10 17:35:17 -05:00
Hawking Zhang
b7cb3669b6 drm/amdgpu: Remove redundant check for async_gfx_ring
Remove the redundant check for async_gfx_ring,
as it is not required for gfx v12_1

Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Likun Gao <Likun.Gao@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2025-12-10 17:35:11 -05:00
Likun Gao
d0b6c5f226 drm/amdgpu: disable graphics doorbell range for gfx v12_1
Disable doorbell range for graphics engine on gfx v12_1.

Signed-off-by: Likun Gao <Likun.Gao@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2025-12-10 17:35:07 -05:00
Likun Gao
77385a2dc1 drm/amdgpu: enable unmap doorbell handle for gfx v12_1
Enable unmapped doorbell handling for gfx v12_1.

Signed-off-by: Likun Gao <Likun.Gao@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2025-12-10 17:35:02 -05:00
Likun Gao
c90ed18114 drm/amdgpu: revision doorbel range for gfx v12_1
Revision doorbell range on muti-XCC mode for gfx v12_1.
Clean up doorbell range set for graphics engine.
V2: Remove doorbell range set from gfx_v12_1_xcc_kiq_init_register.

Signed-off-by: Likun Gao <Likun.Gao@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2025-12-10 17:34:54 -05:00
Jonathan Kim
cf356fe11d drm/amdkfd: disable shader message vgpr deallocation on gc 12.1
Shader messages to deallocate VGPRs prior to shader end can prevent
the trap handler from saving context, making debugging and core dumps
unreliable.

VGPR deallocations for performance gain is negligible.
GC 12.1 will NOP shader VGPR deallocation messages via HW
settings on driver boot.

Signed-off-by: Jonathan Kim <jonathan.kim@amd.com>
Acked-by: Harish Kasiviswanathan <harish.kasiviswanathan@amd.com>
Reviewed-by: Felix Kuehling <felix.kuehling@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2025-12-10 17:34:44 -05:00
Hawking Zhang
8e0187aec6 drm/amdgpu: Remove redundant pmfw backdoor loading
PMFW is integrated into ifwi for gfx 12_1 adapter,
making PMFW backdoor loading unnecessary.

Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Likun Gao <Likun.Gao@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2025-12-10 17:34:35 -05:00
Mario Limonciello (AMD)
d717e62e9b drm/amd: Fix unbind/rebind for VCN 4.0.5
Unbinding amdgpu has no problems, but binding it again leads to an
error of sysfs file already existing.  This is because it wasn't
actually cleaned up on unbind.  Add the missing cleanup step.

Fixes: 547aad32ed ("drm/amdgpu: add VCN4 ip block support")
Signed-off-by: Mario Limonciello (AMD) <superm1@kernel.org>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2025-12-10 17:32:51 -05:00
Srinivasan Shanmugam
495b190480 drm/amdgpu/acpi: Reduce amdgpu_acpi_detect stack usage
amdgpu_acpi_detect() calls some helper functions it calls have large
local structures.  When the compiler inlines these helpers, their local
data adds to the amdgpu_acpi_detect() stack frame.

Mark the helpers with noinline_for_stack:
- amdgpu_atif_verify_interface()
- amdgpu_atif_get_notification_params()
- amdgpu_atif_query_backlight_caps()
- amdgpu_atcs_verify_interface()
- amdgpu_acpi_enumerate_xcc()

This keeps the large temporary objects inside the helper’s own stack
frame instead of being inlined into the caller, preventing the caller
from growing beyond the stack limit.

Fixes the below with gcc W=1:
drivers/gpu/drm/amd/amdgpu/amdgpu_acpi.c:1403:6: warning: stack frame size (1688) exceeds limit (1024) in 'amdgpu_acpi_detect' [-Wframe-larger-than]

Cc: Alex Deucher <alexander.deucher@amd.com>
Cc: Christian König <christian.koenig@amd.com>
Signed-off-by: Srinivasan Shanmugam <srinivasan.shanmugam@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2025-12-10 17:32:39 -05:00
Pierre-Eric Pelloux-Prayer
35bb80e683 drm/amdgpu: pass the entity to use to ttm public functions
This way the caller can select the one it wants to use.

Signed-off-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Acked-by: Felix Kuehling <felix.kuehling@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2025-12-08 14:31:27 -05:00
Pierre-Eric Pelloux-Prayer
e95b41846d drm/amdgpu: pass the entity to use to amdgpu_ttm_map_buffer
This way the caller can select the one it wants to use.

Signed-off-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2025-12-08 14:31:23 -05:00
Pierre-Eric Pelloux-Prayer
bc0515ece3 drm/amdgpu: fix error handling in amdgpu_copy_buffer
drm_sched_job_add_resv_dependencies can fail in amdgpu_ttm_prepare_job.
In this case we need to use amdgpu_job_free to release memory.

---
v4: moved job pointer clearing to a different patchset
---

Signed-off-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2025-12-08 14:31:15 -05:00
Pierre-Eric Pelloux-Prayer
582c65e854 drm/amdgpu: add amdgpu_ttm_job_submit helper
Deduplicate the IB padding code and will also be used
later to check locking.

Signed-off-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2025-12-08 14:30:59 -05:00
Pierre-Eric Pelloux-Prayer
edf47fb3d1 drm/amdgpu: introduce amdgpu_ttm_buffer_entity
No functional change for now, but this struct will have more
fields added in the next commit.

This change would introduce synchronisation issue, because
dependencies between successive jobs are not taken care of
properly. For instance, amdgpu_ttm_clear_buffer uses
amdgpu_ttm_map_buffer then amdgpu_ttm_fill_mem which should
use different entities (default_entity then move/clear entity).
To prevent failures for this commit, we limit ourselves to
2 entities: default_entity (which replaces high_pr usages) and
clear_entity (which replaces low_pr usages).

The next commits will deal with these dependencies correctly,
and then we'll be able to use move_entity.

---
v2: renamed amdgpu_ttm_buffer_entity
v4: don't use move_entity in ttm yet
---

Signed-off-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com> (v3)
Acked-by: Felix Kuehling <felix.kuehling@amd.com> (v3)
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2025-12-08 14:27:25 -05:00
Likun Gao
a0f8297068 drm/amdgpu: add imu support for gc 12_1
Add IMU support for gc version 12.1.0.
Only support imu fw loading for imu 12.1.0.

Signed-off-by: Likun Gao <Likun.Gao@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2025-12-08 14:27:21 -05:00
Likun Gao
a5192fbb2e drm/amdgpu: fix mes code error for muti-xcc
Fix some code error for muti-xcc on mes v12_1.

Signed-off-by: Likun Gao <Likun.Gao@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2025-12-08 14:27:17 -05:00
Likun Gao
1359282bd4 drm/amdgpu/gmc12: set MMHUBs based on aid_mask
Update number of mmhub and mid_mask via reuse aid_mask.

Signed-off-by: Likun Gao <Likun.Gao@amd.com>
Reviewed-by: Le Ma <le.ma@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2025-12-08 14:27:09 -05:00
Likun Gao
6c4c2e2c40 drm/amdgpu: set gfxhub according xcc_mask for gfx 12_1
Set GFXHUB accodring to xcc_mask for gfx version 12_1.

Signed-off-by: Likun Gao <Likun.Gao@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2025-12-08 14:27:03 -05:00
Likun Gao
9827f48289 drm/amdgpu: add xcc info for compute ring name
Add XCC id info for compute ring name on gfx version 12.1.

Signed-off-by: Likun Gao <Likun.Gao@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2025-12-08 14:26:57 -05:00
Jonathan Kim
b42f3bf953 drm/amdkfd: bump minimum vgpr size for gfx1151
GFX1151 has 1.5x the number of available physical VGPRs per SIMD.
Bump total memory availability for acquire checks on queue creation.

Signed-off-by: Jonathan Kim <jonathan.kim@amd.com>
Reviewed-by: Mario Limonciello <mario.limonciello@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2025-12-08 14:26:06 -05:00
Mukul Joshi
127770bcfc drm/amdgpu: Revert retry based thrashing prevention on GFX 12.1.0
Revert the change to enable retry based thrashing prevention on GFX 12.1.0
for now as its causing data mismatch and slowness issues with multiple HIP
tests.

Signed-off-by: Mukul Joshi <mukul.joshi@amd.com>
Reviewed-by: Harish Kasiviswanathan <Harish.Kasiviswanathan@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2025-12-08 14:26:03 -05:00
Hawking Zhang
f364fb3cb4 drm/amdgpu: Init single mes instance if xcc_mask is unset
Configure a single mes instance if the xcc_mask remains
uninitialized.

Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Jack Xiao <Jack.Xiao@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2025-12-08 14:25:58 -05:00
Mukul Joshi
c93f9b7db8 drm/amdgpu: Setup MTYPEs for GFX 12.1.0
For GFX 12.1.0, setup correct MTYPE for a BO depending on
its current location relative to the mapping GPU.

Signed-off-by: Mukul Joshi <mukul.joshi@amd.com>
Reviewed-by:  Alex Sierra <alex.sierra@amd.com>
Reviewed-by: Harish Kasiviswanathan <Harish.Kasiviswanathan@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2025-12-08 14:25:54 -05:00
Alex Sierra
30a4dc6476 drm/amdgpu: update sh mem base offsets for gfx 12.1
Signed-off-by: Alex Sierra <alex.sierra@amd.com>
Reviewed-by: Philip Yang <Philip.Yang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2025-12-08 14:25:51 -05:00
Srinivasan Shanmugam
8b971ce0cb drm/amd/ras: Reduce stack usage in ras_umc_handle_bad_pages()
ras_umc_handle_bad_pages() function used a large local array:
  struct eeprom_umc_record records[MAX_ECC_NUM_PER_RETIREMENT];

Move this array off the stack by allocating it with kcalloc()
and freeing it before return.

This reduces the stack frame size of ras_umc_handle_bad_pages()
and avoids the frame size warning.

Fixes the below:
drivers/gpu/drm/amd/amdgpu/../ras/rascore/ras_umc.c:498:5: warning: stack frame size (1208) exceeds limit (1024) in 'ras_umc_handle_bad_pages' [-Wframe-larger-than]

v2: Removed the duplicate ras_umc_get_new_records() invocation. (Lijo)

Cc: Tao Zhou <tao.zhou1@amd.com>
Cc: Hawking Zhang <Hawking.Zhang@amd.com>
Cc: Christian König <christian.koenig@amd.com>
Cc: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Srinivasan Shanmugam <srinivasan.shanmugam@amd.com>
Reviewed-by: Tao Zhou <tao.zhou1@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2025-12-08 14:25:37 -05:00
Mukul Joshi
e3b8d8cc8c drm/amdgpu: Fix SHMEM alignment mode for GFX 12.1.0
Alignment mode in SHMEM config register is only a single bit
value on GFX 12.1.0 instead of 2 bits in previous asics.
Add a new enum and use the correct value of SHMEM alignment mode
when programming the SHMEM config register.

Signed-off-by: Mukul Joshi <mukul.joshi@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2025-12-08 14:25:34 -05:00
Rosen Penev
3849efdc78 drm/amd/display: shrink struct members
On a 32-bit ARM system, the audio_decoder struct ends up being too large
for dp_retrain_link_dp_test.

link_dp_cts.c:157:1: error: the frame size of 1328 bytes is larger than
1280 bytes [-Werror=frame-larger-than=]

This is mitigated by shrinking the members of the struct and avoids
having to deal with dynamic allocation.

feed_back_divider is assigned but otherwise unused. Remove both.

pixel_repetition looks like it should be a bool since it's only ever
assigned to 1. But there are checks for 2 and 4. Reduce to uint8_t.

Remove ss_percentage_divider. Unused.

Shrink refresh_rate as it gets assigned to at most a 3 digit integer
value.

Signed-off-by: Rosen Penev <rosenp@gmail.com>
Reviewed-by: Alex Hung <alex.hung@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2025-12-08 14:25:12 -05:00
Mario Limonciello
71776e0965 drm/amdkfd: Export the cwsr_size and ctl_stack_size to userspace
This is important for userspace to avoid hardcoding VGPR size.

Reviewed-by: Kent Russell <kent.russell@amd.com>
Signed-off-by: Mario Limonciello <mario.limonciello@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2025-12-08 14:24:25 -05:00
Taimur Hassan
67b032daa2 drm/amd/display: Promote DC to 3.2.362
This version brings along the following updates:

 - Defer transitions from minimal state to final state
 - Remove periodic detection callbacks from dcn35+
 - Fixes for S0i3 exit
 - Refactor dml_core_mode_support to reduce stack frame
 - Add additional info from DML for DMU

Signed-off-by: Taimur Hassan <Syed.Hassan@amd.com>
Signed-off-by: Chenyu Chen <chen-yu.chen@amd.com>
Acked-by: Tom Chung <chiahsuan.chung@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2025-12-08 14:23:18 -05:00
Nevenko Stupar
6a45e909c6 drm/amd/display: Additional info from DML for DMU
[WHAT]
Add additional info from DML for DMU when applicable
on future platforms.

Reviewed-by: Alvin Lee <alvin.lee2@amd.com>
Signed-off-by: Nevenko Stupar <Nevenko.Stupar@amd.com>
Signed-off-by: Chenyu Chen <chen-yu.chen@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2025-12-08 14:23:13 -05:00
Alex Hung
29a4dc4b5d drm/amd/display: Refactor dml_core_mode_support to reduce stack frame
[WHAT]
When compiling Linux kernel with clang, the following warning / error
messages pops up:

drivers/gpu/drm/amd/amdgpu/../dal-dev/dc/dml2_0/display_mode_core.c:6853:12:
error: stack frame size (2120) exceeds limit (2056) in
'dml_core_mode_support' [-Werror,-Wframe-larger-than]
 6853 | dml_bool_t dml_core_mode_support(struct display_mode_lib_st
*mode_lib)

[HOW]
Refactoring CalculateVMRowAndSwath_params assignments to a new function
helps reduce the stack frame size in dml_core_mode_support.

Closes: https://gitlab.freedesktop.org/drm/amd/-/issues/4733
Reviewed-by: Austin Zheng <austin.zheng@amd.com>
Reviewed-by: Aurabindo Pillai <aurabindo.pillai@amd.com>
Signed-off-by: Alex Hung <alex.hung@amd.com>
Signed-off-by: Chenyu Chen <chen-yu.chen@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2025-12-08 14:22:51 -05:00
Ovidiu Bunea
fdcc620b02 drm/amd/display: Fixes for S0i3 exit
[why & how]
Add debug flag "ignore_pg" to dcn32 PG functions.
Update default z10 support status.
Temp disable RFB features for ASIC.
Remove legacy code path.

Reviewed-by: Charlene Liu <charlene.liu@amd.com>
Signed-off-by: Ovidiu Bunea <ovidiu.bunea@amd.com>
Signed-off-by: Chenyu Chen <chen-yu.chen@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2025-12-08 14:22:47 -05:00
Dillon Varone
3f6c060846 drm/amd/display: Remove periodic detection callbacks from dcn35+
[WHY&HOW]
These will not be needed going forward as DMU will communicate to the
driver when detection may be needed after a power saving event.

Reviewed-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Signed-off-by: Dillon Varone <Dillon.Varone@amd.com>
Signed-off-by: Chenyu Chen <chen-yu.chen@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2025-12-08 14:22:42 -05:00
Joshua Aberback
6b2e9b41b7 drm/amd/display: Defer transitions from minimal state to final state
[Why]
In non-seamless pipe transitions, it can take several frames to process
a single flip. One of the reasons is the 2-step transition implementation
where first the minimal transition state is applied, then the final state
is applied, all within the same flip. This delay is noticeable to the user
in some video playback scenarios, which makes for a bad user experience.

[How]
 - in applicable non-seamless cases, complete the flip with the minimal
   state applied, start a counter, and create all new contexts as minimal
 - if another pipe transition occurs while counting, reset the counter
 - when the counter finishes, promote the current flip to a full update
   and restore creation of optimized contexts
 - when creating minimal states from new context, apply stream updates

Reviewed-by: Aric Cyr <aric.cyr@amd.com>
Signed-off-by: Joshua Aberback <joshua.aberback@amd.com>
Signed-off-by: Chenyu Chen <chen-yu.chen@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2025-12-08 14:22:37 -05:00
Alex Deucher
820b3d376e drm/amdgpu: don't attach the tlb fence for SI
SI hardware doesn't support pasids, user mode queues, or
KIQ/MES so there is no need for this.  Doing so results in
a segfault as these callbacks are non-existent for SI.

Closes: https://gitlab.freedesktop.org/drm/amd/-/issues/4744
Fixes: f3854e04b7 ("drm/amdgpu: attach tlb fence to the PTs update")
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2025-12-08 14:20:59 -05:00
Alex Deucher
8acdad9344 drm/amd/display: Use GFP_ATOMIC in dc_create_plane_state()
This can get called from an atomic context.

Closes: https://gitlab.freedesktop.org/drm/amd/-/issues/4470
Reviewed-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2025-12-08 14:20:53 -05:00
Jay Cornwall
4238888794 drm/amdkfd: Trap handler support for expert scheduling mode
The trap may be entered with dependency checking disabled.
Wait for dependency counters and save/restore scheduling mode.

v2:

Use ttmp1 instead of ttmp11. ttmp11 is not zero-initialized.
While the trap handler does zero this field before use, a user-mode
second-level trap handler could not rely on this being zero when
using an older kernel mode driver.

v3:

Use ttmp11 primarily but copy to ttmp1 before jumping to the
second level trap handler. ttmp1 is inspectable by a debugger.
Unexpected bits in the unused space may regress existing software.

Signed-off-by: Jay Cornwall <jay.cornwall@amd.com>
Reviewed-by: Lancelot Six <lancelot.six@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2025-12-08 14:20:46 -05:00