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drm/amd/display: Fixes for S0i3 exit

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[why & how]
Add debug flag "ignore_pg" to dcn32 PG functions.
Update default z10 support status.
Temp disable RFB features for ASIC.
Remove legacy code path.

Reviewed-by: Charlene Liu <charlene.liu@amd.com>
Signed-off-by: Ovidiu Bunea <ovidiu.bunea@amd.com>
Signed-off-by: Chenyu Chen <chen-yu.chen@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Ovidiu Bunea
2025-11-27 18:10:02 -05:00
committed by Alex Deucher
parent 3f6c060846
commit fdcc620b02
2 changed files with 6 additions and 1 deletions
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1
drivers/gpu/drm/amd/display/dc/dio/dcn35/dcn35_dio_link_encoder.c
View File

@@ -120,7 +120,6 @@ void dcn35_link_encoder_setup(
void dcn35_link_encoder_init(struct link_encoder *enc)
{
enc31_hw_init(enc);
dcn35_link_encoder_set_fgcg(enc, enc->ctx->dc->debug.enable_fine_grain_clock_gating.bits.dio);
}
void dcn35_link_encoder_set_fgcg(struct link_encoder *enc, bool enable)

6
drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c
View File

@@ -82,6 +82,9 @@ void dcn32_dsc_pg_control(
if (!dc->debug.enable_double_buffered_dsc_pg_support)
return;
if (dc->debug.ignore_pg)
return;
REG_GET(DC_IP_REQUEST_CNTL, IP_REQUEST_EN, &org_ip_request_cntl);
if (org_ip_request_cntl == 0)
REG_SET(DC_IP_REQUEST_CNTL, 0, IP_REQUEST_EN, 1);
@@ -168,6 +171,9 @@ void dcn32_hubp_pg_control(struct dce_hwseq *hws, unsigned int hubp_inst, bool p
if (hws->ctx->dc->debug.disable_hubp_power_gate)
return;
if (hws->ctx->dc->debug.ignore_pg)
return;
if (REG(DOMAIN0_PG_CONFIG) == 0)
return;