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drm/amdgpu: don't attach the tlb fence for SI

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SI hardware doesn't support pasids, user mode queues, or
KIQ/MES so there is no need for this.  Doing so results in
a segfault as these callbacks are non-existent for SI.

Closes: https://gitlab.freedesktop.org/drm/amd/-/issues/4744
Fixes: f3854e04b7 ("drm/amdgpu: attach tlb fence to the PTs update")
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Alex Deucher
2025-12-02 14:24:03 -05:00
parent 8acdad9344
commit 820b3d376e
1 changed files with 3 additions and 1 deletions
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4
drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
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@@ -1069,7 +1069,9 @@ amdgpu_vm_tlb_flush(struct amdgpu_vm_update_params *params,
}
/* Prepare a TLB flush fence to be attached to PTs */
if (!params->unlocked) {
if (!params->unlocked &&
/* SI doesn't support pasid or KIQ/MES */
params->adev->family > AMDGPU_FAMILY_SI) {
amdgpu_vm_tlb_fence_create(params->adev, vm, fence);
/* Makes sure no PD/PT is freed before the flush */