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Erikas Bitovtas
f757451504 arm64: dts: qcom: msm8939-asus-z00t: add regulators for ambient light and proximity sensor 
VCNL4000 includes support for regulators. Add regulators listed in the
downstream device tree so they can be powered in during initialization.
VLED supply is missing downstream, so it will be powered on by a dummy.

Signed-off-by: Erikas Bitovtas <xerikasxx@gmail.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20260330-z00t-cm36686-regulators-v1-1-03e23b03bd70@gmail.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
 2026-03-30 08:26:41 -05:00
Jingyi Wang
45ac3ced1b arm64: dts: qcom: kaanapali: Duplicate whitespace cleanup 
Exactly one space is expected before '{' characters, clean
up duplicate whitespaces.

Signed-off-by: Jingyi Wang <jingyi.wang@oss.qualcomm.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20260330-knp-space-cleanup-v1-1-0995302f7557@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
 2026-03-30 08:23:54 -05:00
Srinivas Kandagatla
af0d19ea5a arm64: dts: monaco: extend fastrpc compute cb 
For some reason we ended up adding only 4 out of 11 compute cb's for
CDSP, add the missing compute cb. This will also improve the end
user-experience by enabling running multiple AI usecases in parallel.

Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@oss.qualcomm.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20260326154111.2781802-1-srinivas.kandagatla@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
 2026-03-30 08:22:46 -05:00
Bjorn Andersson
cde64269ee arm64: dts: qcom: qcs6490-rb3gen2: Enable uPD720201 and GL3590 
The QCS6490 Rb3Gen2 has a Renesas μPD720201 XHCI controller hanging off
the TC9563 PCIe switch, on this a Genesys Logic GL3590 USB hub provides
two USB Type-A ports and an ASIX AX88179 USB 3.0 Gigabit Ethernet
interface.

The Renesas chip is powered by two regulators controlled through PM7250B
GPIOs 1 and 4, and the power/reset pin is pulled down by PM8350C GPIO 4.
The Genesys chip power is always-on, but the reset pin is controlled
through TLMM GPIO 162.

Describe the Renesas chip on the PCIe bus, with supplies and reset, to
allow it to be brought out of reset and discovered. Then describe the
two peers of the USB hub, with its reset GPIO, to allow this to be
brought out of reset.

The USB Type-A connectors are not described, as they are in no regard
controlled by the operating system.

Signed-off-by: Bjorn Andersson <bjorn.andersson@oss.qualcomm.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20260323-rb3gen2-upd-gl3590-v2-1-073514bf9ed5@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
 2026-03-30 08:10:43 -05:00
Le Qi
20eb0aa76f arm64: dts: qcom: hamoa-evk: Add DP0/DP1 audio playback support 
The hamoa-evk DTS currently lacks DAI links for DP0 and DP1, preventing
the sound card from exposing these playback paths. Add the missing links
to enable audio output on both DP interfaces.

Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com>
Signed-off-by: Le Qi <le.qi@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20260210024037.3719191-1-le.qi@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
 2026-03-26 10:21:13 -05:00
Geert Uytterhoeven
ec6944df7b arm64: dts: qcom: Drop CPU masks from GICv3 PPI interrupts 
Unlike older GIC variants, the GICv3 DT bindings do not support
specifying a CPU mask in PPI interrupt specifiers.  Drop the masks.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Link: https://lore.kernel.org/r/226c5d1005a6e295e0581b2c89e5510dbb7aa9d1.1772643434.git.geert+renesas@glider.be
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
 2026-03-26 09:40:59 -05:00
Abel Vesa
6b25a72aba arm64: dts: qcom: eliza: Add missing msi-parent for UFS 
Wire up the UFS controller to the GIC ITS by specifying the
msi-parent property. The UFS host uses MSI and requires a valid
ITS mapping in order to allocate and receive interrupts.

Add the ITS reference along with the device ID to match the SMMU
stream ID.

Fixes: db7fe6963466 ("arm64: dts: qcom: Introduce Eliza Soc base dtsi")
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Signed-off-by: Abel Vesa <abel.vesa@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20260324-eliza-base-dt-fixes-v3-3-3a4a03e72f8f@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
 2026-03-26 09:40:59 -05:00
Abel Vesa
13aadeca9e arm64: dts: qcom: eliza: Add missing CX power domain to GCC 
Unless CX is declared the power-domain of GCC votes (power and
performance) on the GDSCs provided by GCC will not propagate to the CX,
which might result in under-voltage conditions.

Add the missing power-domains property to associate GCC with RPMHPD_CX.

Fixes: db7fe6963466 ("arm64: dts: qcom: Introduce Eliza Soc base dtsi")
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Signed-off-by: Abel Vesa <abel.vesa@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20260324-eliza-base-dt-fixes-v3-2-3a4a03e72f8f@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
 2026-03-26 09:40:59 -05:00
Abel Vesa
fa095e0b69 arm64: dts: qcom: eliza: Coding style clean-ups 
Some coding style issues were raised during review but the devicetree
was merged meanwhile. Address them here.

These changes are non-functional.

Fixes: db7fe6963466 ("arm64: dts: qcom: Introduce Eliza Soc base dtsi")
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Signed-off-by: Abel Vesa <abel.vesa@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20260324-eliza-base-dt-fixes-v3-1-3a4a03e72f8f@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
 2026-03-26 09:40:58 -05:00
Dmitry Baryshkov
fee828abbd arm64: dts: qcom: patch mahua thermal zones by label 
Updating DT nodes by the full path is fragile and frowned upon, it's
easy to miss the rename of the node in the main tree. Add necessary
labels and patch thermal zones for Mahua using those labels.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Reviewed-by: Abel Vesa <abel.vesa@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20260320-mahua-fix-thermals-v1-1-8957bf976c90@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
 2026-03-26 09:40:58 -05:00
Dmitry Baryshkov
2c098c2bae arm64: dts: qcom: purwa: deduplicate thermal sensors with Hamoa 
Hamoa and Purwa have pretty close thermal zones definitions. The major
difference is that several zones are absent (because of the lack of the
CPU cluster) and several zones use tsens2 instead of tsens3.

Instead of completely duplicating thermal zones for Purwa, reuse themal
zones from Hamoa, patching them where required.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Reviewed-by: Abel Vesa <abel.vesa@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20260320-purwa-drop-thermals-v1-1-2c9fe046cd02@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
 2026-03-26 09:40:58 -05:00
Abel Vesa
eb5fa758f7 arm64: dts: qcom: glymur-crd: Enable WLAN and Bluetooth 
Both Glymur and Mahua CRDs feature a WCN7850 M.2 WLAN and Bluetooth
combo card.

So describe both the 0.9V and the 3.3V regulators, then WCN7850 PMU and
the PCIe WLAN and the UART Bluetooth nodes.

Do this in the Glymur CRD generic dtsi so that both Glymur and Mahua CRDs
benefit from it towards enabling WLAN and Bluetooth functionality.

Signed-off-by: Abel Vesa <abel.vesa@oss.qualcomm.com>
Tested-by: Gopikrishna Garmidi <gopikrishna.garmidi@oss.qualcomm.com>
Reviewed-by: Zijun Hu <zijun.hu@oss.qualcomm.com>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20260324-glymur-dts-crd-enable-bt-wlan-v2-1-6afcf1ac277a@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
 2026-03-26 09:40:58 -05:00
Val Packett
c88d3aa52a arm64: dts: qcom: kodiak: Add LPASS I2S2 pinctrl definitions 
Add the pinctrl definitions to configure gpio10-gpio13 of the lpass_tlmm
for I2S output.

Signed-off-by: Val Packett <val@packett.cool>
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20260323095247.92890-1-val@packett.cool
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
 2026-03-26 09:40:58 -05:00
Kathiravan Thirumoorthy
4073cf900e arm64: dts: qcom: add IPQ5210 SoC and rdp504 board support 
Add initial device tree support for the Qualcomm IPQ5210 SoC and
rdp504 board.

Signed-off-by: Kathiravan Thirumoorthy <kathiravan.thirumoorthy@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20260325-ipq5210_boot_to_shell-v3-2-9c7360d19d10@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
 2026-03-26 09:40:57 -05:00
Kathiravan Thirumoorthy
703d08de53 dt-bindings: qcom: add ipq5210 boards 
Document the new ipq5210 SoC/board device tree bindings.

Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com>
Signed-off-by: Kathiravan Thirumoorthy <kathiravan.thirumoorthy@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20260325-ipq5210_boot_to_shell-v3-1-9c7360d19d10@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
 2026-03-26 09:40:57 -05:00
Bjorn Andersson
4d059454d3 Merge branch '20260318-ipq5210_boot_to_shell-v2-1-a87e27c37070@oss.qualcomm.com' into HEAD 
Merge the IPQ5210 global clock controller DeviceTree binding, in order
to gain access to the constants.
 2026-03-26 09:40:57 -05:00
Manaf Meethalavalappu Pallikunhi
746ad6b00c arm64: dts: qcom: sm8750: Enable TSENS and thermal zones 
The sm8750 includes four TSENS instances, with a total of 47 thermal
sensors distributed across various locations on the SoC.

The TSENS max/reset threshold is configured to 130°C in the hardware.
Enable all TSENS instances, and define the thermal zones with a hot trip
at 120°C and critical trip at 125°C.

Signed-off-by: Manaf Meethalavalappu Pallikunhi <quic_manafm@quicinc.com>
Signed-off-by: Gaurav Kohli <gaurav.kohli@oss.qualcomm.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20260325-sm8750_tsens-v2-1-8a554e54dc1b@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
 2026-03-26 09:40:57 -05:00
Pragnesh Papaniya
bcd42e405c arm64: dts: qcom: mahua: Fix mahua bwmon 
Delete the bwmon node that corresponds to non-existent cpu cluster 2
on Mahua SoCs.

Fixes: 598eedb21ddd ("arm64: dts: qcom: Add Mahua SoC and CRD")
Tested-by: Gopikrishna Garmidi <gopikrishna.garmidi@oss.qualcomm.com>
Signed-off-by: Pragnesh Papaniya <pragnesh.papaniya@oss.qualcomm.com>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20260325-bwmon_fixes-v1-2-9433f9d4c276@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
 2026-03-26 09:40:57 -05:00
Pragnesh Papaniya
bf2a06f36e arm64: dts: qcom: glymur: Add missing opp entry 
Add missing opp entry that corresponds to highest ddr frequency
for Glymur/Mahua SoCs.

Fixes: e4945894c1cb ("arm64: dts: qcom: glymur: Add glymur BWMONs")
Signed-off-by: Pragnesh Papaniya <pragnesh.papaniya@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20260325-bwmon_fixes-v1-1-9433f9d4c276@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
 2026-03-26 09:40:57 -05:00
Viken Dadhaniya
c5b22c88cc arm64: dts: qcom: lemans: Correct QUP interrupt numbers 
Fix GIC_SPI interrupt numbers for QUPv3 SE6 nodes on Lemans SoC.
Using incorrect interrupt lines can prevent IRQs from triggering
and break I2C, SPI, and UART operation.

Fixes: 34a407316b ("arm64: dts: qcom: sa8775p: Populate additional UART DT nodes")
Fixes: 1b2d7ad5ac ("arm64: dts: qcom: sa8775p: add missing spi nodes")
Fixes: ee2f5f906d ("arm64: dts: qcom: sa8775p: add missing i2c nodes")
Cc: stable@vger.kernel.org
Signed-off-by: Viken Dadhaniya <viken.dadhaniya@oss.qualcomm.com>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20260325-lemans-irq-num-v1-1-a470d544966a@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
 2026-03-26 09:40:56 -05:00
Krzysztof Kozlowski
aad054ab20 arm64: dts: qcom: qrb5165-rb5: Drop redundant non-controllable supplies 
Drop completely redundant non-controllable chain of "regulator-fixed"
supplies, which serve no purpose except growing DTS and kernel boot
time.  They represent no added value and because of being completely
transparent for any users of DTS (except the bloat), they should not be
represented in DTS, just like we do not represent every transistor
there.

For the few regulators being actively used and supplied by removed
dummies, change the supply to match the actual final source without
these dummy intermediaries.

Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20260310-qcom-dts-supplies-v1-5-5071a7052ea9@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
 2026-03-26 09:40:56 -05:00
Krzysztof Kozlowski
d568df4fde arm64: dts: qcom: qrb4210-rb2: Drop redundant non-controllable supplies 
Drop completely redundant non-controllable chain of "regulator-fixed"
supplies, which serve no purpose except growing DTS and kernel boot
time.  They represent no added value and because of being completely
transparent for any users of DTS (except the bloat), they should not be
represented in DTS, just like we do not represent every transistor
there.

Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20260310-qcom-dts-supplies-v1-4-5071a7052ea9@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
 2026-03-26 09:40:56 -05:00
Krzysztof Kozlowski
657317a580 arm64: dts: qcom: qrb2210-rb1: Drop redundant non-controllable supplies 
Drop completely redundant non-controllable chain of "regulator-fixed"
supplies, which serve no purpose except growing DTS and kernel boot
time.  They represent no added value and because of being completely
transparent for any users of DTS (except the bloat), they should not be
represented in DTS, just like we do not represent every transistor
there.

Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20260310-qcom-dts-supplies-v1-3-5071a7052ea9@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
 2026-03-26 09:40:56 -05:00
Krzysztof Kozlowski
733a768eb8 arm64: dts: qcom: qcs615-ride: Drop redundant non-controllable supplies 
Drop completely redundant non-controllable chain of "regulator-fixed"
supplies, which serve no purpose except growing DTS and kernel boot
time.  They represent no added value and because of being completely
transparent for any users of DTS (except the bloat), they should not be
represented in DTS, just like we do not represent every transistor
there.

Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20260310-qcom-dts-supplies-v1-2-5071a7052ea9@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
 2026-03-26 09:40:56 -05:00
Krzysztof Kozlowski
02e92424f6 arm64: dts: qcom: lemans-ride: Drop redundant non-controllable supplies 
Drop completely redundant non-controllable chain of "regulator-fixed"
supplies, which serve no purpose except growing DTS and kernel boot
time.  They represent no added value and because of being completely
transparent for any users of DTS (except the bloat), they should not be
represented in DTS, just like we do not represent every transistor
there.

Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20260310-qcom-dts-supplies-v1-1-5071a7052ea9@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
 2026-03-26 09:40:56 -05:00
Krzysztof Kozlowski
1328665d28 arm64: dts: qcom: sm8650: Drop redundant VSYNC pin state 
The active and suspend pin state of VSYNC is exactly the same, so just
use one node for both states.

Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20260310-qcom-dts-redundant-pins-v1-5-98e2ef430717@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
 2026-03-26 09:40:56 -05:00
Krzysztof Kozlowski
0401183642 arm64: dts: qcom: sm8550: Drop redundant VSYNC pin state 
The active and suspend pin state of VSYNC is exactly the same, so just
use one node for both states.

Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20260310-qcom-dts-redundant-pins-v1-4-98e2ef430717@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
 2026-03-26 09:40:55 -05:00
Krzysztof Kozlowski
6143662888 arm64: dts: qcom: sdm845-axolotl: Drop redundant VSYNC pin state 
The active and suspend pin state of VSYNC is exactly the same, so just
use one node for both states.

Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20260310-qcom-dts-redundant-pins-v1-3-98e2ef430717@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
 2026-03-26 09:40:55 -05:00
Krzysztof Kozlowski
c0f7cd7b14 arm64: dts: qcom: msm8998: Drop redundant VSYNC pin state 
The active and suspend pin state of VSYNC is exactly the same, so just
use one node for both states.

Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20260310-qcom-dts-redundant-pins-v1-2-98e2ef430717@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
 2026-03-26 09:40:55 -05:00
Krzysztof Kozlowski
778b5aa8a2 arm64: dts: qcom: msm8996: Drop redundant VSYNC pin state 
The active and suspend pin state of VSYNC is exactly the same, so just
use one node for both states.

Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20260310-qcom-dts-redundant-pins-v1-1-98e2ef430717@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
 2026-03-26 09:40:55 -05:00
Md Sadre Alam
34219ea599 arm64: dts: qcom: pq5332-rdp-common: Enable QPIC SPI NAND support 
Enable QPIC SPI NAND flash controller support on the IPQ5332 reference
design platform.

Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Signed-off-by: Md Sadre Alam <quic_mdalam@quicinc.com>
Link: https://lore.kernel.org/r/20260306113940.1654304-5-quic_mdalam@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
 2026-03-26 09:40:55 -05:00
Md Sadre Alam
f879314bff arm64: dts: qcom: ipq5424-rdp466: Enable QPIC SPI NAND support 
Enable QPIC SPI NAND flash controller support on the IPQ5424 RDP466
reference design platform.

The RDP466 board features a SPI NAND flash device connected to the QPIC
controller for primary storage. This patch enables the QPIC BAM DMA
controller and SPI NAND interface of QPIC, and configures the necessary
pin control settings for proper operation.

Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Signed-off-by: Md Sadre Alam <quic_mdalam@quicinc.com>
Link: https://lore.kernel.org/r/20260306113940.1654304-4-quic_mdalam@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
 2026-03-26 09:40:55 -05:00
Md Sadre Alam
2a3cd909b8 arm64: dts: qcom: ipq5332: Add QPIC SPI NAND controller support 
Add device tree nodes for QPIC SPI NAND flash controller support
on IPQ5332 SoC.

The IPQ5332 SoC includes a QPIC controller that supports SPI NAND flash
devices with hardware ECC capabilities and DMA support through BAM
(Bus Access Manager).

Signed-off-by: Md Sadre Alam <quic_mdalam@quicinc.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20260306113940.1654304-3-quic_mdalam@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
 2026-03-26 09:40:54 -05:00
Md Sadre Alam
0f4990c868 arm64: dts: qcom: ipq5424: Add QPIC SPI NAND controller support 
Add device tree nodes for QPIC SPI NAND flash controller support
on IPQ5424 SoC.

The IPQ5424 SoC includes a QPIC controller that supports SPI NAND flash
devices with hardware ECC capabilities and DMA support through BAM
(Bus Access Manager).

Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Signed-off-by: Md Sadre Alam <quic_mdalam@quicinc.com>
Link: https://lore.kernel.org/r/20260306113940.1654304-2-quic_mdalam@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
 2026-03-26 09:40:54 -05:00
Swati Agarwal
766617011b arm64: dts: qcom: lemans-evk: Enable the tertiary USB controller 
Enable the tertiary usb controller connected to micro usb port in OTG mode
on Lemans EVK platform.

Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Signed-off-by: Swati Agarwal <swati.agarwal@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20260306091355.1178333-5-swati.agarwal@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
 2026-03-26 09:40:54 -05:00
Swati Agarwal
0e2e381840 arm64: dts: qcom: lemans: Add role-switch support and HS endpoint for tertiary USB controller 
Enable usb-role-switch for the tertiary USB controller on Lemans.

Additionally, add a port node with an HS endpoint so the controller can be
linked through the DT graph to the corresponding connector.

Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Signed-off-by: Swati Agarwal <swati.agarwal@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20260306091355.1178333-4-swati.agarwal@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
 2026-03-26 09:40:54 -05:00
Swati Agarwal
f87af8fe83 arm64: dts: qcom: lemans-evk: Rename vbus regulator for Primary USB controller 
Rename vbus regulator for Primary USB controller as per Lemans EVK
schematics.

Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Signed-off-by: Swati Agarwal <swati.agarwal@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20260306091355.1178333-3-swati.agarwal@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
 2026-03-26 09:40:54 -05:00
Swati Agarwal
845ea0fca6 arm64: dts: qcom: lemans-evk: Enable GPIO expander interrupt for Lemans EVK 
Enable PCA9538 expander as interrupt controller on Lemans EVK and configure
the corresponding TLMM pins via pinctrl to operate as GPIO inputs with
internal pull-ups.

Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Signed-off-by: Swati Agarwal <swati.agarwal@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20260306091355.1178333-2-swati.agarwal@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
 2026-03-26 09:40:54 -05:00
Konrad Dybcio
581fc5d5ad arm64: dts: qcom: sm8650: Explicitly describe the IPA IMEM slice 
As part of stepping away from crazy hardcoding in the driver, move
define the slice explicitly and pass it to the IPA node.

Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Signed-off-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20260305-topic-ipa_mem_dts-v2-7-5cb5b90902bf@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
 2026-03-26 09:40:53 -05:00
Konrad Dybcio
c864afc8e9 arm64: dts: qcom: sm8550: Explicitly describe the IPA IMEM slice 
As part of stepping away from crazy hardcoding in the driver, move
define the slice explicitly and pass it to the IPA node.

Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Signed-off-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20260305-topic-ipa_mem_dts-v2-6-5cb5b90902bf@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
 2026-03-26 09:40:53 -05:00
Konrad Dybcio
d168d147d7 arm64: dts: qcom: sm8350: Explicitly describe the IPA IMEM slice 
As part of stepping away from crazy hardcoding in the driver, move
define the slice explicitly and pass it to the IPA node.

Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Signed-off-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20260305-topic-ipa_mem_dts-v2-5-5cb5b90902bf@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
 2026-03-26 09:40:53 -05:00
Konrad Dybcio
bf8abf362b arm64: dts: qcom: sm6350: Explicitly describe the IPA IMEM slice 
As part of stepping away from crazy hardcoding in the driver, move
define the slice explicitly and pass it to the IPA node.

Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Signed-off-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20260305-topic-ipa_mem_dts-v2-4-5cb5b90902bf@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
 2026-03-26 09:40:53 -05:00
Konrad Dybcio
a418e4f8b7 arm64: dts: qcom: sdm845: Explicitly describe the IPA IMEM slice 
As part of stepping away from crazy hardcoding in the driver, move
define the slice explicitly and pass it to the IPA node.

Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Signed-off-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20260305-topic-ipa_mem_dts-v2-3-5cb5b90902bf@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
 2026-03-26 09:40:53 -05:00
Konrad Dybcio
fdef6bddf7 arm64: dts: qcom: sc7280: Explicitly describe the IPA IMEM slice 
As part of stepping away from crazy hardcoding in the driver, move
define the slice explicitly and pass it to the IPA node.

Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Signed-off-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20260305-topic-ipa_mem_dts-v2-2-5cb5b90902bf@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
 2026-03-26 09:40:53 -05:00
Konrad Dybcio
67eb573301 arm64: dts: qcom: sc7180: Explicitly describe the IPA IMEM slice 
As part of stepping away from crazy hardcoding in the driver, move
define the slice explicitly and pass it to the IPA node.

Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Signed-off-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20260305-topic-ipa_mem_dts-v2-1-5cb5b90902bf@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
 2026-03-26 09:40:53 -05:00
Umang Chheda
b64abb26a2 arm64: dts: qcom: lemans-evk: Add IFP Mezzanine 
The Interface Plus [IFP] Mezzanine is an hardware expansion add-on
board designed to be stacked on top of Lemans EVK.

It has following peripherals :

- 4x Type A USB ports in host mode.
- TC9563 PCIe switch, which has following three downstream ports (DSP) :
   - 1st DSP is routed to an M.2 E-key connector, intended for
     WLAN modules.
   - 2nd DSP is routed to an M.2 B-key connector, intended for
     cellular modems.
   - 3rd DSP with support for Dual Ethernet ports.
- eMMC.
- Additional 2.5GbE Ethernet PHY connected to native EMAC with support for
  MAC Address configuration via NVMEM.
- EEPROM.
- LVDS Display.
- 2*mini DP.

Add support for following peripherals :
- TC9563 PCIe Switch.
- Additional 2.5GbE Ethernet Port.
- EEPROM.

Enable support for USB hub, LVDS display and mini-DP later once
dependent changes are available in lemans-evk core-kit.

Written with inputs from :
    Mohd Ayaan Anwar <mohd.anwar@oss.qualcomm.com> - Ethernet.
    Krishna Chaitanya Chundru <krishna.chundru@oss.qualcomm.com> - PCIe
    Monish Chunara <monish.chunara@oss.qualcomm.com> - EEPROM.

Signed-off-by: Umang Chheda <umang.chheda@oss.qualcomm.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20260304165925.1535938-2-umang.chheda@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
 2026-03-26 09:40:52 -05:00
Umang Chheda
5a67924d2f arm64: dts: qcom: monaco-evk: Add IFP Mezzanine 
The IFP Mezzanine is an hardware expansion add-on board designed
to be stacked on top of Monaco EVK.

It has following peripherals :
- 4x Type A USB ports in host mode.
- TC9563 PCIe switch, which has following three downstream ports (DSP) :
   - 1st DSP is routed to an M.2 E-Key connector, intended for
     WLAN modules.
   - 2nd DSP is routed to an M.2 B-key connector, intended for
     cellular modems.
   - 3rd DSP with support for Dual Ethernet ports.
- EEPROM.
- LVDS Display.
- 2*mini DP.

Add support for following peripherals :
- TC9563 PCIe Switch.
- EEPROM.

Enable support for USB hub, LVDS display and mini-DP later once dependent
changes are available in monaco-evk core-kit.

Written with inputs from :
    Krishna Chaitanya Chundru <krishna.chundru@oss.qualcomm.com> - PCIe
    Monish Chunara <monish.chunara@oss.qualcomm.com> - EEPROM.

Signed-off-by: Umang Chheda <umang.chheda@oss.qualcomm.com>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20260303164314.886733-2-umang.chheda@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
 2026-03-26 09:40:52 -05:00
Dmitry Baryshkov
01022af2d2 arm64: dts: qcom: sc7280-chrome-common: disable Venus 
Iris driver doesn't support non-PAS/TZ setup for setting up the Iris
core. It's expected that the ABI that is going to be used in a long-term
would be different from the defined venus-firmware subnode.

Granted that the SC7280 Chromebooks were cancelled before reaching wide
audience and granted the feature ABI changes, drop venus configuration
for SC7280 ChromeOS devices.

Suggested-by: Stephan Gerhold <stephan.gerhold@linaro.org>
Cc: Douglas Anderson <dianders@chromium.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Acked-by: Douglas Anderson <dianders@chromium.org>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20260131-venus-iris-flip-switch-v4-1-e10b886771e1@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
 2026-03-26 09:40:52 -05:00
Dmitry Baryshkov
8cec14e690 arm64: dts: qcom: sm8150-hdk: describe WiFi/BT properly 
Properly describe the PMU present as a part of the onboard WCN3998
WiFi/BT chip. Enable Bluetooth part of the chip too.

[    5.479978] Bluetooth: hci0: setting up wcn399x
[    5.633763] Bluetooth: hci0: QCA Product ID   :0x0000000a
[    5.645350] Bluetooth: hci0: QCA SOC Version  :0x40010224
[    5.650906] Bluetooth: hci0: QCA ROM Version  :0x00001001
[    5.665173] Bluetooth: hci0: QCA Patch Version:0x00006699
[    5.679356] Bluetooth: hci0: QCA controller version 0x02241001
[    5.691109] Bluetooth: hci0: QCA Downloading qca/crbtfw21.tlv
[    6.680102] Bluetooth: hci0: QCA Downloading qca/crnv21.bin
[    6.842948] Bluetooth: hci0: QCA setup on UART is completed

[   81.510709] ath10k_snoc 18800000.wifi: qmi chip_id 0x30224 chip_family 0x4001 board_id 0x55 soc_id 0x40060000
[   81.521713] ath10k_snoc 18800000.wifi: qmi fw_version 0x32040163 fw_build_timestamp 2019-10-08 05:42 fw_build_id QC_IMAGE_VERSION_STRING=WLAN.HL.3.2.0-00355-QCAHLSWMTPLZ-1
[   81.554143] ath10k_snoc 18800000.wifi: failed to fetch board data for bus=snoc,qmi-board-id=55,qmi-chip-id=30224,variant=Qualcomm_sm8150hdk from ath10k/WCN3990/hw1.0/board-2.bin
[   85.467464] ath10k_snoc 18800000.wifi: wcn3990 hw1.0 target 0x00000008 chip_id 0x00000000 sub 0000:0000
[   85.478132] ath10k_snoc 18800000.wifi: kconfig debug 0 debugfs 0 tracing 0 dfs 0 testmode 0
[   85.487223] ath10k_snoc 18800000.wifi: firmware ver  api 5 features wowlan,mgmt-tx-by-reference,non-bmi crc32 b3d4b790
[   85.758168] ath10k_snoc 18800000.wifi: htt-ver 3.73 wmi-op 4 htt-op 3 cal file max-sta 32 raw 0 hwcrypto 1
[   85.901630] ath10k_snoc 18800000.wifi: invalid MAC address; choosing random

Reviewed-by: Bartosz Golaszewski <bartosz.golaszewski@oss.qualcomm.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20260106-wcn3990-pwrctl-v2-14-0386204328be@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
 2026-03-26 09:40:52 -05:00
Dmitry Baryshkov
a8aef26417 arm64: dts: qcom: sdm845-db845c: describe WiFi/BT properly 
The onboard WiFi / BT device, WCN3990, has a simple on-chip PMU, which
further spreads generated voltage. Describe the PMU in the device tree.

Reviewed-by: Bartosz Golaszewski <bartosz.golaszewski@oss.qualcomm.com>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20260106-wcn3990-pwrctl-v2-13-0386204328be@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
 2026-03-26 09:40:52 -05:00