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Sibi Sankar
cb0eaae8e8 arm64: dts: qcom: sc7180: Add a carveout for modem metadata 
Add a new carveout for modem metadata on SC7180 SoCs.

Signed-off-by: Sibi Sankar <quic_sibis@quicinc.com>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230117085840.32356-11-quic_sibis@quicinc.com
 2023-01-18 21:35:25 -06:00
Sibi Sankar
44c89ef3d1 arm64: dts: qcom: sdm845: Add a carveout for modem metadata 
Add a new carveout for modem metadata on SDM845 SoCs.

Tested-by: Amit Pundir <amit.pundir@linaro.org>
Signed-off-by: Sibi Sankar <quic_sibis@quicinc.com>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230117085840.32356-10-quic_sibis@quicinc.com
 2023-01-18 21:35:25 -06:00
Sibi Sankar
264f6a8dff arm64: dts: qcom: msm8998: Add a carveout for modem metadata 
Add a new carveout for modem metadata on MSM8998 SoCs.

Signed-off-by: Sibi Sankar <quic_sibis@quicinc.com>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230117085840.32356-9-quic_sibis@quicinc.com
 2023-01-18 21:35:25 -06:00
Sibi Sankar
3c118d1b0d arm64: dts: qcom: msm8996: Add a carveout for modem metadata 
Add a new carveout for modem metadata on MSM8996 SoCs.

Signed-off-by: Sibi Sankar <quic_sibis@quicinc.com>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230117085840.32356-8-quic_sibis@quicinc.com
 2023-01-18 21:35:25 -06:00
Robert Marko
0e8b90c025 arm64: dts: qcom: ipq8074: correct PCIe QMP PHY output clock names 
Current PCIe QMP PHY output name were changed in ("arm64: dts: qcom: Fix
IPQ8074 PCIe PHY nodes") however it did not account for the fact that GCC
driver is relying on the old names to match them as they are being used as
the parent for the gcc_pcie0_pipe_clk and gcc_pcie1_pipe_clk.

This broke parenting as GCC could not find the parent clock, so fix it by
changing to the names that driver is expecting.

Fixes: 942bcd33ed ("arm64: dts: qcom: Fix IPQ8074 PCIe PHY nodes")
Signed-off-by: Robert Marko <robimarko@gmail.com>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230113164449.906002-9-robimarko@gmail.com
 2023-01-18 21:15:06 -06:00
Robert Marko
3e83a9c41a arm64: dts: qcom: ipq8074: fix Gen3 PCIe node 
IPQ8074 comes in 2 silicon versions:
* v1 with 2x Gen2 PCIe ports and QMP PHY-s
* v2 with 1x Gen3 and 1x Gen2 PCIe ports and QMP PHY-s

v2 is the final and production version that is actually supported by the
kernel, however it looks like PCIe related nodes were added for the v1 SoC.

Finish the PCIe fixup by using the correct compatible, adding missing ATU
register space, declaring max-link-speed, use correct ranges, add missing
clocks and resets.

Fixes: 33057e1672 ("ARM: dts: ipq8074: Add pcie nodes")
Signed-off-by: Robert Marko <robimarko@gmail.com>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230113164449.906002-8-robimarko@gmail.com
 2023-01-18 21:15:06 -06:00
Robert Marko
b605903148 arm64: dts: qcom: ipq8074: set Gen2 PCIe pcie max-link-speed 
Add the generic 'max-link-speed' property to describe the Gen2 PCIe link
generation limit.
This allows the generic DWC code to configure the link speed correctly.

Signed-off-by: Robert Marko <robimarko@gmail.com>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230113164449.906002-4-robimarko@gmail.com
 2023-01-18 21:15:06 -06:00
Robert Marko
2055cb7dcc arm64: dts: qcom: ipq8074: correct Gen2 PCIe ranges 
Current ranges property set in Gen2 PCIe node is incorrect, replace it
with the downstream 5.4 QCA kernel value.

Fixes: 33057e1672 ("ARM: dts: ipq8074: Add pcie nodes")
Signed-off-by: Robert Marko <robimarko@gmail.com>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230113164449.906002-3-robimarko@gmail.com
 2023-01-18 21:15:06 -06:00
Robert Marko
7ba33591b4 arm64: dts: qcom: ipq8074: fix Gen3 PCIe QMP PHY 
IPQ8074 comes in 2 silicon versions:
* v1 with 2x Gen2 PCIe ports and QMP PHY-s
* v2 with 1x Gen3 and 1x Gen2 PCIe ports and QMP PHY-s

v2 is the final and production version that is actually supported by the
kernel, however it looks like PCIe related nodes were added for the v1 SoC.

Now that we have Gen3 QMP PHY support, we can start fixing the PCIe support
by fixing the Gen3 QMP PHY node first.

Change the compatible to the Gen3 QMP PHY, correct the register space start
and size, add the missing misc PCS register space.

Fixes: 33057e1672 ("ARM: dts: ipq8074: Add pcie nodes")
Signed-off-by: Robert Marko <robimarko@gmail.com>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230113164449.906002-2-robimarko@gmail.com
 2023-01-18 21:15:06 -06:00
Robert Marko
100d9c94cc arm64: dts: qcom: ipq8074: fix Gen2 PCIe QMP PHY 
Serdes register space sizes are incorrect, update them to match the
actual sizes from downstream QCA 5.4 kernel.

Fixes: 942bcd33ed ("arm64: dts: qcom: Fix IPQ8074 PCIe PHY nodes")
Signed-off-by: Robert Marko <robimarko@gmail.com>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230113164449.906002-1-robimarko@gmail.com
 2023-01-18 21:15:06 -06:00
Krzysztof Kozlowski
3e7a2e8bd9 arm64: dts: qcom: sdm845-db845c: drop label from I2C controllers 
Geni I2C Controller node does not allow a "label" property and Linux
driver does not parse it:

  sdm845-db845c.dtb: i2c@a8c000: Unevaluated properties are not allowed ('label' was unexpected)

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230113145231.79280-1-krzysztof.kozlowski@linaro.org
 2023-01-18 21:08:02 -06:00
Dmitry Baryshkov
ac0d84d455 arm64: dts: qcom: msm8996: support using GPLL0 as kryocc input 
In some cases the driver might need using GPLL0 to drive CPU clocks.
Bring it in through the sys_apcs_aux clock.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230113120544.59320-15-dmitry.baryshkov@linaro.org
 2023-01-18 21:07:04 -06:00
Manivannan Sadhasivam
0da2eff44e arm64: dts: qcom: sm8450: Allow both GIC-ITS and internal MSI controller 
The devicetree should specify both MSI implementations and the OS/driver
should choose the one based on the platform requirements. Currently, Linux
DWC driver will choose GIC-ITS over the internal MSI controller.

Fixes: a11bbf6adef4 ("arm64: dts: qcom: sm8450: Use GIC-ITS for PCIe0 and PCIe1")
Suggested-by: Rob Herring <robh@kernel.org>
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230111123004.21048-2-manivannan.sadhasivam@linaro.org
 2023-01-18 20:36:15 -06:00
Abel Vesa
772e6bc4a0 arm64: dts: qcom: sm8550-mtp: Add USB PHYs and HC nodes 
Enable USB HC and PHYs nodes on SM8550 MTP board.

Signed-off-by: Abel Vesa <abel.vesa@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230119004533.1869870-3-abel.vesa@linaro.org
 2023-01-18 20:18:53 -06:00
Abel Vesa
7f7e5c1b03 arm64: dts: qcom: sm8550: Add USB PHYs and controller nodes 
Add USB host controller and PHY nodes.

Signed-off-by: Abel Vesa <abel.vesa@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230119004533.1869870-2-abel.vesa@linaro.org
 2023-01-18 20:18:53 -06:00
Krzysztof Kozlowski
e5988fd600 arm64: dts: qcom: sm8250: drop unused properties from tx-macro 
Neither qcom,sm8250-lpass-tx-macro bindings nor the driver use
"clock-frequency" and address/size cells properties.

  sm8250-mtp.dtb: txmacro@3220000: Unevaluated properties are not allowed ('clock-frequency', '#address-cells', '#size-cells' were unexpected)

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230109112221.102473-4-krzysztof.kozlowski@linaro.org
 2023-01-18 18:12:09 -06:00
Krzysztof Kozlowski
a496f7decf arm64: dts: qcom: sm8250: drop unused clock-frequency from wsa-macro 
Neither qcom,sm8250-lpass-wsa-macro bindings nor the driver use
"clock-frequency" property.

  sm8250-hdk.dtb: codec@3240000: Unevaluated properties are not allowed ('clock-frequency' was unexpected)

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230109112221.102473-3-krzysztof.kozlowski@linaro.org
 2023-01-18 18:12:09 -06:00
Krzysztof Kozlowski
8a220a62eb arm64: dts: qcom: align OPP table node name with DT schema 
Bindings expect OPP tables to start with "opp-table".

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230109112221.102473-2-krzysztof.kozlowski@linaro.org
 2023-01-18 18:12:09 -06:00
Dmitry Baryshkov
0aab1b9b75 arm64: dts: qcom: rename mdp nodes to display-controller 
Follow the schema change and rename mdp nodes to generic name
'display-controller'.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230109051402.317577-6-dmitry.baryshkov@linaro.org
 2023-01-18 18:10:27 -06:00
Dmitry Baryshkov
ecf0f5ff15 arm64: dts: qcom: rename mdss nodes to display-subsystem 
Follow the schema change and rename mdss nodes to generic name
'display-subsystem'.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230109051402.317577-4-dmitry.baryshkov@linaro.org
 2023-01-18 18:10:27 -06:00
Dmitry Baryshkov
d46fbd4579 arm64: dts: qcom: add SoC specific compat strings to mdp5 nodes 
Add SoC-specific compat string to the MDP5 device nodes to ease
distinguishing between various platforms.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230109050152.316606-5-dmitry.baryshkov@linaro.org
 2023-01-18 18:09:17 -06:00
Robert Marko
877cff3568 arm64: dts: qcom: ipq8074: correct USB3 QMP PHY-s clock output names 
It seems that clock-output-names for the USB3 QMP PHY-s where set without
actually checking what is the GCC clock driver expecting, so clock core
could never actually find the parents for usb0_pipe_clk_src and
usb1_pipe_clk_src clocks in the GCC driver.

So, correct the names to be what the driver expects so that parenting
works.

Before:
gcc_usb0_pipe_clk_src                0        0        0   125000000          0     0  50000         Y
gcc_usb1_pipe_clk_src                0        0        0   125000000          0     0  50000         Y

After:
 usb3phy_0_cc_pipe_clk                1        1        0   125000000          0     0  50000         Y
    usb0_pipe_clk_src                 1        1        0   125000000          0     0  50000         Y
       gcc_usb0_pipe_clk              1        1        0   125000000          0     0  50000         Y
 usb3phy_1_cc_pipe_clk                1        1        0   125000000          0     0  50000         Y
    usb1_pipe_clk_src                 1        1        0   125000000          0     0  50000         Y
       gcc_usb1_pipe_clk              1        1        0   125000000          0     0  50000         Y

Fixes: 5e09bc51d0 ("arm64: dts: ipq8074: enable USB support")
Signed-off-by: Robert Marko <robimarko@gmail.com>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230108130440.670181-2-robimarko@gmail.com
 2023-01-18 18:08:18 -06:00
Siddharth Manthan
41adc65ca5 arm64: dts: qcom: Add device tree for Samsung Galaxy Tab A 8.0 (2015) 
Galaxy Tab A 8.0 is a tablet, very similar to Tab A 9.7 with major
differences being the display and touchscreen.

Add it's devicetree reusing a common dtsi from gt510.

Signed-off-by: Siddharth Manthan <siddharth.manthan@gmail.com>
[Squashed multiple commits]
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Nikita Travkin <nikita@trvn.ru>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230107141911.47229-4-nikita@trvn.ru
 2023-01-18 18:07:05 -06:00
Jasper Korten
7cc406151a arm64: dts: qcom: Add device tree for Samsung Galaxy Tab A 9.7 (2015) 
The Galaxy Tab A 9.7 (2015) is a Snapdragon 410 based tablet.

This commit introduces basic support for the tablet including the
following features:
- SDHCI (internal and external storage)
- USB Device Mode
- UART
- Regulators
- WCNSS (WiFi/BT)
- GPIO keys
- Fuel gauge
- Touchscreen
- Accelerometer

Part of the DT is split out into a common dtsi since the tablet shares
majority of the design with another variant having a different screen
size.

Signed-off-by: Jasper Korten <jja2000@gmail.com>
Co-developed-by: Siddharth Manthan <siddharth_manthan@outlook.com>
Signed-off-by: Siddharth Manthan <siddharth_manthan@outlook.com>
Co-developed-by: Nikita Travkin <nikita@trvn.ru>
Signed-off-by: Nikita Travkin <nikita@trvn.ru>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230107141911.47229-3-nikita@trvn.ru
 2023-01-18 18:06:47 -06:00
Brian Masney
fa5573edd0 arm64: dts: qcom: sc8280xp: add rng device tree node 
Add the necessary device tree node for qcom,prng-ee so we can use the
hardware random number generator. This functionality was tested on a
SA8540p automotive development board using kcapi-rng from libkcapi.

Signed-off-by: Brian Masney <bmasney@redhat.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230103182229.37169-11-bmasney@redhat.com
 2023-01-18 18:03:15 -06:00
Brian Masney
1db9c1d127 arm64: dts: qcom: sc8280xp: add aliases for i2c4 and i2c21 
Add aliases for i2c4 and i2c21 to the crd and x13s DTS files so that
what's exposed to userspace doesn't change in the future if additional
i2c buses are enabled on these platforms.

Signed-off-by: Brian Masney <bmasney@redhat.com>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230103182229.37169-10-bmasney@redhat.com
 2023-01-18 18:03:14 -06:00
Brian Masney
e073899ec3 arm64: dts: qcom: sa8540p-ride: add i2c nodes 
Add the necessary nodes in order to get i2c0, i2c1, i2c12, i2c15, and
i2c18 functioning on the automotive board and exposed to userspace.

This work was derived from various patches that Qualcomm delivered
to Red Hat in a downstream kernel. This change was validated by using
i2c-tools 4.3.3 on CentOS Stream 9:

[root@localhost ~]# i2cdetect -l
i2c-0  i2c             Geni-I2C                                I2C adapter
i2c-1  i2c             Geni-I2C                                I2C adapter
i2c-12 i2c             Geni-I2C                                I2C adapter
i2c-15 i2c             Geni-I2C                                I2C adapter
i2c-18 i2c             Geni-I2C                                I2C adapter

[root@localhost ~]# i2cdetect -a -y 15
Warning: Can't use SMBus Quick Write command, will skip some addresses
     0  1  2  3  4  5  6  7  8  9  a  b  c  d  e  f
00:
10:
20:
30: -- -- -- -- -- -- -- --
40:
50: -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- --
60:
70:

Signed-off-by: Brian Masney <bmasney@redhat.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Tested-by: Shazad Hussain <quic_shazhuss@quicinc.com>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230103182229.37169-9-bmasney@redhat.com
 2023-01-18 18:02:51 -06:00
Brian Masney
3d256a90b3 arm64: dts: qcom: sc8280xp: add missing spi nodes 
Add the missing nodes for the spi buses that's present on this SoC.

This work was derived from various patches that Qualcomm delivered
to Red Hat in a downstream kernel.

Signed-off-by: Brian Masney <bmasney@redhat.com>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230103182229.37169-8-bmasney@redhat.com
 2023-01-18 18:02:51 -06:00
Brian Masney
645aaf0a38 arm64: dts: qcom: sc8280xp: add missing i2c nodes 
Add the missing nodes for the i2c buses that's present on this SoC.

This work was derived from various patches that Qualcomm delivered
to Red Hat in a downstream kernel.

Signed-off-by: Brian Masney <bmasney@redhat.com>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230103182229.37169-7-bmasney@redhat.com
 2023-01-18 18:02:51 -06:00
Brian Masney
31e62e862a arm64: dts: qcom: sc8280xp: rename qup0_i2c4 to i2c4 
In preparation for adding the missing SPI and I2C nodes to
sc8280xp.dtsi, it was decided to rename all of the existing qupX_
uart, spi, and i2c nodes to drop the qupX_ prefix. Let's go ahead
and rename qup0_i2c4 to i2c4.

Note that some nodes are moved in the file by this patch to preserve
the expected sort order in the file. Additionally, the properties
within the pinctrl state node are sorted to match the expected order
that's typically done in other DTs.

Signed-off-by: Brian Masney <bmasney@redhat.com>
Link: https://lore.kernel.org/lkml/20221212182314.1902632-1-bmasney@redhat.com/
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Reviewed-by: Johan Hovold <johan+linaro@kernel.org>
Tested-by: Steev Klimaszewski <steev@kali.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230103182229.37169-6-bmasney@redhat.com
 2023-01-18 18:02:51 -06:00
Brian Masney
6e1569ddfa arm64: dts: qcom: sc8280xp: rename qup2_i2c5 to i2c21 
In preparation for adding the missing SPI and I2C nodes to
sc8280xp.dtsi, it was decided to rename all of the existing qupX_
uart, spi, and i2c nodes to drop the qupX_ prefix. Let's go ahead
and rename qup2_i2c5 to i2c21. Under the old name, this was the 5th
index under qup2, which starts at index 16.

Note that some nodes are moved in the file by this patch to preserve
the expected sort order in the file. Additionally, the properties
within the pinctrl state node are sorted to match the expected order
that's typically done in other DTs.

Signed-off-by: Brian Masney <bmasney@redhat.com>
Link: https://lore.kernel.org/lkml/20221212182314.1902632-1-bmasney@redhat.com/
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Reviewed-by: Johan Hovold <johan+linaro@kernel.org>
Tested-by: Steev Klimaszewski <steev@kali.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230103182229.37169-5-bmasney@redhat.com
 2023-01-18 18:02:27 -06:00
Brian Masney
71bc1b4284 arm64: dts: qcom: sc8280xp: rename qup2_uart17 to uart17 
In preparation for adding the missing SPI and I2C nodes to
sc8280xp.dtsi, it was decided to rename all of the existing qupX_
uart, spi, and i2c nodes to drop the qupX_ prefix. Let's go ahead
and rename qup2_uart17 to uart17. Note that some nodes are moved in the
file by this patch to preserve the expected sort order in the file.

Signed-off-by: Brian Masney <bmasney@redhat.com>
Link: https://lore.kernel.org/lkml/20221212182314.1902632-1-bmasney@redhat.com/
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Reviewed-by: Johan Hovold <johan+linaro@kernel.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230103182229.37169-4-bmasney@redhat.com
 2023-01-18 18:01:33 -06:00
Konrad Dybcio
1d09705a64 arm64: dts: qcom: sm6115: Pad addresses to 8 hex digits 
Some addresses were 7-hex-digits long, or less. Fix that.

Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230102094642.74254-18-konrad.dybcio@linaro.org
 2023-01-18 17:59:02 -06:00
Konrad Dybcio
690e8993cc arm64: dts: qcom: msm8994-kitakami: Pad addresses to 8 hex digits 
Some addresses were 7-hex-digits long, or less. Fix that.

Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230102094642.74254-17-konrad.dybcio@linaro.org
 2023-01-18 17:58:27 -06:00
Konrad Dybcio
a58cde4d66 arm64: dts: qcom: sm8450: Pad addresses to 8 hex digits 
Some addresses were 7-hex-digits long, or less. Fix that.

Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230102094642.74254-16-konrad.dybcio@linaro.org
 2023-01-18 17:58:27 -06:00
Konrad Dybcio
426900a959 arm64: dts: qcom: msm8994-octagon: Pad addresses to 8 hex digits 
Some addresses were 7-hex-digits long, or less. Fix that.

Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230102094642.74254-15-konrad.dybcio@linaro.org
 2023-01-18 17:58:10 -06:00
Konrad Dybcio
94ca994d7e arm64: dts: qcom: sc7280: Pad addresses to 8 hex digits 
Some addresses were 7-hex-digits long, or less. Fix that.

Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230102094642.74254-14-konrad.dybcio@linaro.org
 2023-01-18 17:58:10 -06:00
Konrad Dybcio
26c471991d arm64: dts: qcom: sc7180: Pad addresses to 8 hex digits 
Some addresses were 7-hex-digits long, or less. Fix that.

Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230102094642.74254-13-konrad.dybcio@linaro.org
 2023-01-18 17:58:10 -06:00
Konrad Dybcio
f3c08ae6fe arm64: dts: qcom: sm8350: Pad addresses to 8 hex digits 
Some addresses were 7-hex-digits long, or less. Fix that.

Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230102094642.74254-12-konrad.dybcio@linaro.org
 2023-01-18 17:58:10 -06:00
Konrad Dybcio
81f43efce4 arm64: dts: qcom: sm8250: Pad addresses to 8 hex digits 
Some addresses were 7-hex-digits long, or less. Fix that.

Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230102094642.74254-11-konrad.dybcio@linaro.org
 2023-01-18 17:58:10 -06:00
Konrad Dybcio
524ac48fcc arm64: dts: qcom: sdm845: Pad addresses to 8 hex digits 
Some addresses were 7-hex-digits long, or less. Fix that.

Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230102094642.74254-10-konrad.dybcio@linaro.org
 2023-01-18 17:58:10 -06:00
Konrad Dybcio
f48dbb34e4 arm64: dts: qcom: sm6350: Pad addresses to 8 hex digits 
Some addresses were 7-hex-digits long, or less. Fix that.

Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230102094642.74254-9-konrad.dybcio@linaro.org
 2023-01-18 17:58:10 -06:00
Konrad Dybcio
f69732296a arm64: dts: qcom: sm8150: Pad addresses to 8 hex digits 
Some addresses were 7-hex-digits long, or less. Fix that.

Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230102094642.74254-8-konrad.dybcio@linaro.org
 2023-01-18 17:58:10 -06:00
Konrad Dybcio
8d5bf0b2dc arm64: dts: qcom: sc8280xp: Pad addresses to 8 hex digits 
Some addresses were 7-hex-digits long, or less. Fix that.

Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230102094642.74254-7-konrad.dybcio@linaro.org
 2023-01-18 17:58:10 -06:00
Konrad Dybcio
7356ae3e10 arm64: dts: qcom: ipq6018: Use lowercase hex 
One value escaped my previous lowercase hexification. Take care of it.

Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230102094642.74254-6-konrad.dybcio@linaro.org
 2023-01-18 17:58:10 -06:00
Konrad Dybcio
6db9ed9a12 arm64: dts: qcom: ipq6018: Add/remove some newlines 
Some lines were broken very aggresively, presumably to fit under 80 chars
and some places could have used a newline, particularly between subsequent
nodes. Address all that and remove redundant comments near PCIe ranges
while at it so as not to exceed 100 chars needlessly.

Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230102094642.74254-5-konrad.dybcio@linaro.org
 2023-01-18 17:58:10 -06:00
Konrad Dybcio
2c6e322a41 arm64: dts: qcom: ipq6018: Sort nodes properly 
Order nodes by unit address if one exists and alphabetically otherwise.

Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230102094642.74254-4-konrad.dybcio@linaro.org
 2023-01-18 17:58:09 -06:00
Konrad Dybcio
c2596b717e arm64: dts: qcom: ipq6018: Fix up indentation 
The dwc3 subnode was indented using spaces for some reason and other
properties were not exactly properly indented. Fix it.

Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230102094642.74254-3-konrad.dybcio@linaro.org
 2023-01-18 17:58:09 -06:00
Konrad Dybcio
647380e415 arm64: dts: qcom: ipq6018: Pad addresses to 8 hex digits 
Some addresses were 7-hex-digits long, or less. Fix that.

Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230102094642.74254-2-konrad.dybcio@linaro.org
 2023-01-18 17:58:09 -06:00
Abel Vesa
1eeef306b5 arm64: dts: qcom: sm8550-mtp: Add PCIe PHYs and controllers nodes 
Enable PCIe controllers and PHYs nodes on SM8550 MTP board.

Co-developed-by: Neil Armstrong <neil.armstrong@linaro.org>
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
Signed-off-by: Abel Vesa <abel.vesa@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230118230526.1499328-3-abel.vesa@linaro.org
 2023-01-18 17:54:04 -06:00