mirror of
https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
synced 2026-04-27 05:48:09 -04:00
arm64: dts: qcom: ipq6018: Sort nodes properly
Order nodes by unit address if one exists and alphabetically otherwise. Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230102094642.74254-4-konrad.dybcio@linaro.org
This commit is contained in:
Konrad Dybcio
committed by
Bjorn Andersson
Bjorn Andersson
parent
c2596b717e
commit
2c6e322a41
@@ -87,6 +87,12 @@ L2_0: l2-cache {
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};
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};
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firmware {
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scm {
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compatible = "qcom,scm-ipq6018", "qcom,scm";
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};
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};
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cpu_opp_table: opp-table-cpu {
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compatible = "operating-points-v2";
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opp-shared;
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@@ -123,12 +129,6 @@ opp-1800000000 {
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};
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};
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firmware {
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scm {
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compatible = "qcom,scm-ipq6018", "qcom,scm";
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};
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};
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pmuv8: pmu {
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compatible = "arm,cortex-a53-pmu";
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interrupts = <GIC_PPI 7 (GIC_CPU_MASK_SIMPLE(4) |
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@@ -166,6 +166,28 @@ q6_region: memory@4ab00000 {
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};
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};
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rpm-glink {
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compatible = "qcom,glink-rpm";
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interrupts = <GIC_SPI 168 IRQ_TYPE_EDGE_RISING>;
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qcom,rpm-msg-ram = <&rpm_msg_ram>;
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mboxes = <&apcs_glb 0>;
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rpm_requests: glink-channel {
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compatible = "qcom,rpm-ipq6018";
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qcom,glink-channels = "rpm_requests";
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regulators {
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compatible = "qcom,rpm-mp5496-regulators";
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ipq6018_s2: s2 {
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regulator-min-microvolt = <725000>;
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regulator-max-microvolt = <1062500>;
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regulator-always-on;
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};
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};
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};
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};
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smem {
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compatible = "qcom,smem";
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memory-region = <&smem_region>;
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@@ -179,6 +201,102 @@ soc: soc {
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dma-ranges;
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compatible = "simple-bus";
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qusb_phy_1: qusb@59000 {
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compatible = "qcom,ipq6018-qusb2-phy";
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reg = <0x0 0x00059000 0x0 0x180>;
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#phy-cells = <0>;
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clocks = <&gcc GCC_USB1_PHY_CFG_AHB_CLK>,
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<&xo>;
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clock-names = "cfg_ahb", "ref";
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resets = <&gcc GCC_QUSB2_1_PHY_BCR>;
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status = "disabled";
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};
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ssphy_0: ssphy@78000 {
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compatible = "qcom,ipq6018-qmp-usb3-phy";
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reg = <0x0 0x00078000 0x0 0x1c4>;
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#address-cells = <2>;
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#size-cells = <2>;
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ranges;
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clocks = <&gcc GCC_USB0_AUX_CLK>,
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<&gcc GCC_USB0_PHY_CFG_AHB_CLK>, <&xo>;
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clock-names = "aux", "cfg_ahb", "ref";
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resets = <&gcc GCC_USB0_PHY_BCR>,
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<&gcc GCC_USB3PHY_0_PHY_BCR>;
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reset-names = "phy","common";
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status = "disabled";
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usb0_ssphy: phy@78200 {
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reg = <0x0 0x00078200 0x0 0x130>, /* Tx */
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<0x0 0x00078400 0x0 0x200>, /* Rx */
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<0x0 0x00078800 0x0 0x1f8>, /* PCS */
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<0x0 0x00078600 0x0 0x044>; /* PCS misc */
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#phy-cells = <0>;
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#clock-cells = <0>;
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clocks = <&gcc GCC_USB0_PIPE_CLK>;
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clock-names = "pipe0";
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clock-output-names = "gcc_usb0_pipe_clk_src";
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};
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};
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qusb_phy_0: qusb@79000 {
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compatible = "qcom,ipq6018-qusb2-phy";
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reg = <0x0 0x00079000 0x0 0x180>;
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#phy-cells = <0>;
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clocks = <&gcc GCC_USB0_PHY_CFG_AHB_CLK>,
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<&xo>;
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clock-names = "cfg_ahb", "ref";
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resets = <&gcc GCC_QUSB2_0_PHY_BCR>;
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status = "disabled";
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};
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pcie_phy: phy@84000 {
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compatible = "qcom,ipq6018-qmp-pcie-phy";
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reg = <0x0 0x00084000 0x0 0x1bc>; /* Serdes PLL */
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status = "disabled";
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#address-cells = <2>;
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#size-cells = <2>;
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ranges;
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clocks = <&gcc GCC_PCIE0_AUX_CLK>,
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<&gcc GCC_PCIE0_AHB_CLK>;
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clock-names = "aux", "cfg_ahb";
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resets = <&gcc GCC_PCIE0_PHY_BCR>,
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<&gcc GCC_PCIE0PHY_PHY_BCR>;
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reset-names = "phy",
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"common";
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pcie_phy0: phy@84200 {
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reg = <0x0 0x00084200 0x0 0x16c>, /* Serdes Tx */
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<0x0 0x00084400 0x0 0x200>, /* Serdes Rx */
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<0x0 0x00084800 0x0 0x1f0>, /* PCS: Lane0, COM, PCIE */
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<0x0 0x00084c00 0x0 0xf4>; /* pcs_misc */
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#phy-cells = <0>;
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clocks = <&gcc GCC_PCIE0_PIPE_CLK>;
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clock-names = "pipe0";
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clock-output-names = "gcc_pcie0_pipe_clk_src";
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#clock-cells = <0>;
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};
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};
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mdio: mdio@90000 {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "qcom,ipq6018-mdio", "qcom,ipq4019-mdio";
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reg = <0x0 0x00090000 0x0 0x64>;
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clocks = <&gcc GCC_MDIO_AHB_CLK>;
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clock-names = "gcc_mdio_ahb_clk";
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status = "disabled";
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};
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prng: qrng@e1000 {
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compatible = "qcom,prng-ee";
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reg = <0x0 0x000e3000 0x0 0x1000>;
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@@ -257,6 +375,41 @@ tcsr: syscon@1937000 {
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reg = <0x0 0x01937000 0x0 0x21000>;
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};
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usb2: usb@70f8800 {
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compatible = "qcom,ipq6018-dwc3", "qcom,dwc3";
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reg = <0x0 0x070F8800 0x0 0x400>;
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#address-cells = <2>;
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#size-cells = <2>;
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ranges;
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clocks = <&gcc GCC_USB1_MASTER_CLK>,
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<&gcc GCC_USB1_SLEEP_CLK>,
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<&gcc GCC_USB1_MOCK_UTMI_CLK>;
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clock-names = "core",
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"sleep",
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"mock_utmi";
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assigned-clocks = <&gcc GCC_USB1_MASTER_CLK>,
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<&gcc GCC_USB1_MOCK_UTMI_CLK>;
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assigned-clock-rates = <133330000>,
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<24000000>;
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resets = <&gcc GCC_USB1_BCR>;
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status = "disabled";
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dwc_1: usb@7000000 {
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compatible = "snps,dwc3";
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reg = <0x0 0x07000000 0x0 0xcd00>;
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interrupts = <GIC_SPI 99 IRQ_TYPE_LEVEL_HIGH>;
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phys = <&qusb_phy_1>;
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phy-names = "usb2-phy";
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tx-fifo-resize;
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snps,is-utmi-l1-suspend;
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snps,hird-threshold = /bits/ 8 <0x0>;
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snps,dis_u2_susphy_quirk;
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snps,dis_u3_susphy_quirk;
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dr_mode = "host";
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};
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};
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blsp_dma: dma-controller@7884000 {
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compatible = "qcom,bam-v1.7.0";
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reg = <0x0 0x07884000 0x0 0x2b000>;
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@@ -366,6 +519,49 @@ qpic_nand: nand-controller@79b0000 {
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status = "disabled";
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};
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usb3: usb@8af8800 {
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compatible = "qcom,ipq6018-dwc3", "qcom,dwc3";
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reg = <0x0 0x08af8800 0x0 0x400>;
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#address-cells = <2>;
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#size-cells = <2>;
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ranges;
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clocks = <&gcc GCC_SYS_NOC_USB0_AXI_CLK>,
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<&gcc GCC_USB0_MASTER_CLK>,
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<&gcc GCC_USB0_SLEEP_CLK>,
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<&gcc GCC_USB0_MOCK_UTMI_CLK>;
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clock-names = "cfg_noc",
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"core",
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"sleep",
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"mock_utmi";
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assigned-clocks = <&gcc GCC_SYS_NOC_USB0_AXI_CLK>,
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<&gcc GCC_USB0_MASTER_CLK>,
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<&gcc GCC_USB0_MOCK_UTMI_CLK>;
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assigned-clock-rates = <133330000>,
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<133330000>,
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<20000000>;
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resets = <&gcc GCC_USB0_BCR>;
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status = "disabled";
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dwc_0: usb@8a00000 {
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compatible = "snps,dwc3";
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reg = <0x0 0x08a00000 0x0 0xcd00>;
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interrupts = <GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>;
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phys = <&qusb_phy_0>, <&usb0_ssphy>;
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phy-names = "usb2-phy", "usb3-phy";
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clocks = <&xo>;
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clock-names = "ref";
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tx-fifo-resize;
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snps,is-utmi-l1-suspend;
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snps,hird-threshold = /bits/ 8 <0x0>;
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snps,dis_u2_susphy_quirk;
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snps,dis_u3_susphy_quirk;
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dr_mode = "host";
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};
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};
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intc: interrupt-controller@b000000 {
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compatible = "qcom,msm-qgic2";
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#address-cells = <2>;
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@@ -386,107 +582,6 @@ v2m@0 {
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};
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};
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pcie_phy: phy@84000 {
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compatible = "qcom,ipq6018-qmp-pcie-phy";
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reg = <0x0 0x00084000 0x0 0x1bc>; /* Serdes PLL */
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status = "disabled";
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#address-cells = <2>;
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#size-cells = <2>;
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ranges;
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clocks = <&gcc GCC_PCIE0_AUX_CLK>,
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<&gcc GCC_PCIE0_AHB_CLK>;
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clock-names = "aux", "cfg_ahb";
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resets = <&gcc GCC_PCIE0_PHY_BCR>,
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<&gcc GCC_PCIE0PHY_PHY_BCR>;
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reset-names = "phy",
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"common";
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pcie_phy0: phy@84200 {
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reg = <0x0 0x00084200 0x0 0x16c>, /* Serdes Tx */
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<0x0 0x00084400 0x0 0x200>, /* Serdes Rx */
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<0x0 0x00084800 0x0 0x1f0>, /* PCS: Lane0, COM, PCIE */
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<0x0 0x00084c00 0x0 0xf4>; /* pcs_misc */
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#phy-cells = <0>;
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clocks = <&gcc GCC_PCIE0_PIPE_CLK>;
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clock-names = "pipe0";
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clock-output-names = "gcc_pcie0_pipe_clk_src";
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#clock-cells = <0>;
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};
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};
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pcie0: pci@20000000 {
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compatible = "qcom,pcie-ipq6018";
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reg = <0x0 0x20000000 0x0 0xf1d>,
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<0x0 0x20000f20 0x0 0xa8>,
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<0x0 0x20001000 0x0 0x1000>,
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<0x0 0x80000 0x0 0x4000>,
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<0x0 0x20100000 0x0 0x1000>;
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reg-names = "dbi", "elbi", "atu", "parf", "config";
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device_type = "pci";
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linux,pci-domain = <0>;
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bus-range = <0x00 0xff>;
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num-lanes = <1>;
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max-link-speed = <3>;
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#address-cells = <3>;
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#size-cells = <2>;
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phys = <&pcie_phy0>;
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phy-names = "pciephy";
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ranges = <0x81000000 0 0x20200000 0 0x20200000
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0 0x10000>, /* downstream I/O */
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<0x82000000 0 0x20220000 0 0x20220000
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0 0xfde0000>; /* non-prefetchable memory */
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interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-names = "msi";
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#interrupt-cells = <1>;
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interrupt-map-mask = <0 0 0 0x7>;
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interrupt-map = <0 0 0 1 &intc 0 75
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IRQ_TYPE_LEVEL_HIGH>, /* int_a */
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<0 0 0 2 &intc 0 78
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IRQ_TYPE_LEVEL_HIGH>, /* int_b */
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<0 0 0 3 &intc 0 79
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IRQ_TYPE_LEVEL_HIGH>, /* int_c */
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<0 0 0 4 &intc 0 83
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IRQ_TYPE_LEVEL_HIGH>; /* int_d */
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clocks = <&gcc GCC_SYS_NOC_PCIE0_AXI_CLK>,
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<&gcc GCC_PCIE0_AXI_M_CLK>,
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<&gcc GCC_PCIE0_AXI_S_CLK>,
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<&gcc GCC_PCIE0_AXI_S_BRIDGE_CLK>,
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<&gcc PCIE0_RCHNG_CLK>;
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clock-names = "iface",
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"axi_m",
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"axi_s",
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"axi_bridge",
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"rchng";
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resets = <&gcc GCC_PCIE0_PIPE_ARES>,
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<&gcc GCC_PCIE0_SLEEP_ARES>,
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<&gcc GCC_PCIE0_CORE_STICKY_ARES>,
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<&gcc GCC_PCIE0_AXI_MASTER_ARES>,
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<&gcc GCC_PCIE0_AXI_SLAVE_ARES>,
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<&gcc GCC_PCIE0_AHB_ARES>,
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<&gcc GCC_PCIE0_AXI_MASTER_STICKY_ARES>,
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<&gcc GCC_PCIE0_AXI_SLAVE_STICKY_ARES>;
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reset-names = "pipe",
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"sleep",
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"sticky",
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"axi_m",
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"axi_s",
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"ahb",
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"axi_m_sticky",
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"axi_s_sticky";
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status = "disabled";
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};
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watchdog@b017000 {
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compatible = "qcom,kpss-wdt";
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interrupts = <GIC_SPI 3 IRQ_TYPE_EDGE_RISING>;
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@@ -619,147 +714,74 @@ qrtr_requests {
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};
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};
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mdio: mdio@90000 {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "qcom,ipq6018-mdio", "qcom,ipq4019-mdio";
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reg = <0x0 0x00090000 0x0 0x64>;
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clocks = <&gcc GCC_MDIO_AHB_CLK>;
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clock-names = "gcc_mdio_ahb_clk";
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status = "disabled";
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};
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pcie0: pci@20000000 {
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compatible = "qcom,pcie-ipq6018";
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reg = <0x0 0x20000000 0x0 0xf1d>,
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<0x0 0x20000f20 0x0 0xa8>,
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<0x0 0x20001000 0x0 0x1000>,
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<0x0 0x80000 0x0 0x4000>,
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<0x0 0x20100000 0x0 0x1000>;
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reg-names = "dbi", "elbi", "atu", "parf", "config";
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|
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qusb_phy_1: qusb@59000 {
|
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compatible = "qcom,ipq6018-qusb2-phy";
|
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reg = <0x0 0x00059000 0x0 0x180>;
|
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#phy-cells = <0>;
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||||
|
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clocks = <&gcc GCC_USB1_PHY_CFG_AHB_CLK>,
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<&xo>;
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clock-names = "cfg_ahb", "ref";
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||||
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resets = <&gcc GCC_QUSB2_1_PHY_BCR>;
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status = "disabled";
|
||||
};
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usb2: usb@70f8800 {
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compatible = "qcom,ipq6018-dwc3", "qcom,dwc3";
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reg = <0x0 0x070F8800 0x0 0x400>;
|
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#address-cells = <2>;
|
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device_type = "pci";
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||||
linux,pci-domain = <0>;
|
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bus-range = <0x00 0xff>;
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num-lanes = <1>;
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max-link-speed = <3>;
|
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#address-cells = <3>;
|
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#size-cells = <2>;
|
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ranges;
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clocks = <&gcc GCC_USB1_MASTER_CLK>,
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<&gcc GCC_USB1_SLEEP_CLK>,
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<&gcc GCC_USB1_MOCK_UTMI_CLK>;
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clock-names = "core",
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phys = <&pcie_phy0>;
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phy-names = "pciephy";
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ranges = <0x81000000 0 0x20200000 0 0x20200000
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0 0x10000>, /* downstream I/O */
|
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<0x82000000 0 0x20220000 0 0x20220000
|
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0 0xfde0000>; /* non-prefetchable memory */
|
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interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-names = "msi";
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#interrupt-cells = <1>;
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interrupt-map-mask = <0 0 0 0x7>;
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interrupt-map = <0 0 0 1 &intc 0 75
|
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IRQ_TYPE_LEVEL_HIGH>, /* int_a */
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<0 0 0 2 &intc 0 78
|
||||
IRQ_TYPE_LEVEL_HIGH>, /* int_b */
|
||||
<0 0 0 3 &intc 0 79
|
||||
IRQ_TYPE_LEVEL_HIGH>, /* int_c */
|
||||
<0 0 0 4 &intc 0 83
|
||||
IRQ_TYPE_LEVEL_HIGH>; /* int_d */
|
||||
|
||||
clocks = <&gcc GCC_SYS_NOC_PCIE0_AXI_CLK>,
|
||||
<&gcc GCC_PCIE0_AXI_M_CLK>,
|
||||
<&gcc GCC_PCIE0_AXI_S_CLK>,
|
||||
<&gcc GCC_PCIE0_AXI_S_BRIDGE_CLK>,
|
||||
<&gcc PCIE0_RCHNG_CLK>;
|
||||
clock-names = "iface",
|
||||
"axi_m",
|
||||
"axi_s",
|
||||
"axi_bridge",
|
||||
"rchng";
|
||||
|
||||
resets = <&gcc GCC_PCIE0_PIPE_ARES>,
|
||||
<&gcc GCC_PCIE0_SLEEP_ARES>,
|
||||
<&gcc GCC_PCIE0_CORE_STICKY_ARES>,
|
||||
<&gcc GCC_PCIE0_AXI_MASTER_ARES>,
|
||||
<&gcc GCC_PCIE0_AXI_SLAVE_ARES>,
|
||||
<&gcc GCC_PCIE0_AHB_ARES>,
|
||||
<&gcc GCC_PCIE0_AXI_MASTER_STICKY_ARES>,
|
||||
<&gcc GCC_PCIE0_AXI_SLAVE_STICKY_ARES>;
|
||||
reset-names = "pipe",
|
||||
"sleep",
|
||||
"mock_utmi";
|
||||
"sticky",
|
||||
"axi_m",
|
||||
"axi_s",
|
||||
"ahb",
|
||||
"axi_m_sticky",
|
||||
"axi_s_sticky";
|
||||
|
||||
assigned-clocks = <&gcc GCC_USB1_MASTER_CLK>,
|
||||
<&gcc GCC_USB1_MOCK_UTMI_CLK>;
|
||||
assigned-clock-rates = <133330000>,
|
||||
<24000000>;
|
||||
resets = <&gcc GCC_USB1_BCR>;
|
||||
status = "disabled";
|
||||
|
||||
dwc_1: usb@7000000 {
|
||||
compatible = "snps,dwc3";
|
||||
reg = <0x0 0x07000000 0x0 0xcd00>;
|
||||
interrupts = <GIC_SPI 99 IRQ_TYPE_LEVEL_HIGH>;
|
||||
phys = <&qusb_phy_1>;
|
||||
phy-names = "usb2-phy";
|
||||
tx-fifo-resize;
|
||||
snps,is-utmi-l1-suspend;
|
||||
snps,hird-threshold = /bits/ 8 <0x0>;
|
||||
snps,dis_u2_susphy_quirk;
|
||||
snps,dis_u3_susphy_quirk;
|
||||
dr_mode = "host";
|
||||
};
|
||||
};
|
||||
|
||||
ssphy_0: ssphy@78000 {
|
||||
compatible = "qcom,ipq6018-qmp-usb3-phy";
|
||||
reg = <0x0 0x00078000 0x0 0x1c4>;
|
||||
#address-cells = <2>;
|
||||
#size-cells = <2>;
|
||||
ranges;
|
||||
|
||||
clocks = <&gcc GCC_USB0_AUX_CLK>,
|
||||
<&gcc GCC_USB0_PHY_CFG_AHB_CLK>, <&xo>;
|
||||
clock-names = "aux", "cfg_ahb", "ref";
|
||||
|
||||
resets = <&gcc GCC_USB0_PHY_BCR>,
|
||||
<&gcc GCC_USB3PHY_0_PHY_BCR>;
|
||||
reset-names = "phy","common";
|
||||
status = "disabled";
|
||||
|
||||
usb0_ssphy: phy@78200 {
|
||||
reg = <0x0 0x00078200 0x0 0x130>, /* Tx */
|
||||
<0x0 0x00078400 0x0 0x200>, /* Rx */
|
||||
<0x0 0x00078800 0x0 0x1f8>, /* PCS */
|
||||
<0x0 0x00078600 0x0 0x044>; /* PCS misc */
|
||||
#phy-cells = <0>;
|
||||
#clock-cells = <0>;
|
||||
clocks = <&gcc GCC_USB0_PIPE_CLK>;
|
||||
clock-names = "pipe0";
|
||||
clock-output-names = "gcc_usb0_pipe_clk_src";
|
||||
};
|
||||
};
|
||||
|
||||
qusb_phy_0: qusb@79000 {
|
||||
compatible = "qcom,ipq6018-qusb2-phy";
|
||||
reg = <0x0 0x00079000 0x0 0x180>;
|
||||
#phy-cells = <0>;
|
||||
|
||||
clocks = <&gcc GCC_USB0_PHY_CFG_AHB_CLK>,
|
||||
<&xo>;
|
||||
clock-names = "cfg_ahb", "ref";
|
||||
|
||||
resets = <&gcc GCC_QUSB2_0_PHY_BCR>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
usb3: usb@8af8800 {
|
||||
compatible = "qcom,ipq6018-dwc3", "qcom,dwc3";
|
||||
reg = <0x0 0x8af8800 0x0 0x400>;
|
||||
#address-cells = <2>;
|
||||
#size-cells = <2>;
|
||||
ranges;
|
||||
|
||||
clocks = <&gcc GCC_SYS_NOC_USB0_AXI_CLK>,
|
||||
<&gcc GCC_USB0_MASTER_CLK>,
|
||||
<&gcc GCC_USB0_SLEEP_CLK>,
|
||||
<&gcc GCC_USB0_MOCK_UTMI_CLK>;
|
||||
clock-names = "cfg_noc",
|
||||
"core",
|
||||
"sleep",
|
||||
"mock_utmi";
|
||||
|
||||
assigned-clocks = <&gcc GCC_SYS_NOC_USB0_AXI_CLK>,
|
||||
<&gcc GCC_USB0_MASTER_CLK>,
|
||||
<&gcc GCC_USB0_MOCK_UTMI_CLK>;
|
||||
assigned-clock-rates = <133330000>,
|
||||
<133330000>,
|
||||
<20000000>;
|
||||
|
||||
resets = <&gcc GCC_USB0_BCR>;
|
||||
status = "disabled";
|
||||
|
||||
dwc_0: usb@8a00000 {
|
||||
compatible = "snps,dwc3";
|
||||
reg = <0x0 0x8a00000 0x0 0xcd00>;
|
||||
interrupts = <GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>;
|
||||
phys = <&qusb_phy_0>, <&usb0_ssphy>;
|
||||
phy-names = "usb2-phy", "usb3-phy";
|
||||
clocks = <&xo>;
|
||||
clock-names = "ref";
|
||||
tx-fifo-resize;
|
||||
snps,is-utmi-l1-suspend;
|
||||
snps,hird-threshold = /bits/ 8 <0x0>;
|
||||
snps,dis_u2_susphy_quirk;
|
||||
snps,dis_u3_susphy_quirk;
|
||||
dr_mode = "host";
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
@@ -794,26 +816,4 @@ wcss_smp2p_in: slave-kernel {
|
||||
#interrupt-cells = <2>;
|
||||
};
|
||||
};
|
||||
|
||||
rpm-glink {
|
||||
compatible = "qcom,glink-rpm";
|
||||
interrupts = <GIC_SPI 168 IRQ_TYPE_EDGE_RISING>;
|
||||
qcom,rpm-msg-ram = <&rpm_msg_ram>;
|
||||
mboxes = <&apcs_glb 0>;
|
||||
|
||||
rpm_requests: glink-channel {
|
||||
compatible = "qcom,rpm-ipq6018";
|
||||
qcom,glink-channels = "rpm_requests";
|
||||
|
||||
regulators {
|
||||
compatible = "qcom,rpm-mp5496-regulators";
|
||||
|
||||
ipq6018_s2: s2 {
|
||||
regulator-min-microvolt = <725000>;
|
||||
regulator-max-microvolt = <1062500>;
|
||||
regulator-always-on;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
Reference in New Issue
Block a user