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Vinod Koul
ba640cd313 arm64: dts: qcom: sm8450: Add qup nodes for qup2 
qup2 has 7 SEs, so add the SEs (i2c and spi) along with pinconf for
these SEs

Signed-off-by: Vinod Koul <vkoul@kernel.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220414101630.1189052-6-vkoul@kernel.org
 2022-04-19 12:56:21 -05:00
Vinod Koul
1a380216fd arm64: dts: qcom: sm8450: Add qup nodes for qup1 
qup1 has 7 SEs, I2C13 and I2C14 were already added so added the
remaining SEs (i2c and spi) along with pinconf for these SEs
Also add interconnect properties for I2C13 and I2C14

Signed-off-by: Vinod Koul <vkoul@kernel.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220414101630.1189052-5-vkoul@kernel.org
 2022-04-19 12:56:21 -05:00
Vinod Koul
a84e88e9a0 arm64: dts: qcom: sm8450: Add qup nodes for qup0 
qup0 has 7 SEs, with SE7 as uart and already added, so add the
remaining 6 SEs (i2c and spi) along with pinconf for these SEs

Signed-off-by: Vinod Koul <vkoul@kernel.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220414101630.1189052-4-vkoul@kernel.org
 2022-04-19 12:56:21 -05:00
Vinod Koul
488922c1a3 arm64: dts: qcom: sm8450: Fix missing iommus for qup 
qupv3_id_0 was missing iommus property which cause any dma transaction
to fail and board crash. So add the missing iommus.

While at it also add interconnect nodes for qup

Fixes: 5188049c9b ("arm64: dts: qcom: Add base SM8450 DTSI")
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220414101630.1189052-3-vkoul@kernel.org
 2022-04-19 12:55:56 -05:00
Vinod Koul
b9c8433083 arm64: dts: qcom: sm8450: Add gpi_dma nodes 
GPI DMA can be used for DMA operations for QUP devices, so add the three
gpi_dma insances found in this SoC

Signed-off-by: Vinod Koul <vkoul@kernel.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220414101630.1189052-2-vkoul@kernel.org
 2022-04-19 12:55:55 -05:00
Bjorn Andersson
83b8347a85 arm64: dts: qcom: sm8350-hdk: Enable &gpi_dma1 
Some versions of the firmware for the SM8350 Hardware Development Kit
(HDK) has FIFO mode disabled for i2c13 and must thus use GPI DMA. Enable
&gpi_dma1 to allow this.

Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Reviewed-by: Vinod Koul <vkoul@kernel.org>
Link: https://lore.kernel.org/r/20220412215137.2385831-3-bjorn.andersson@linaro.org
 2022-04-19 12:53:51 -05:00
Bjorn Andersson
ddc97e7d17 arm64: dts: qcom: sm8350: Add GENI I2C/SPI DMA channels 
The GENI I2C and SPI controllers may use the GPI DMA engine, define the
rx and tx channels for these controllers to enable this.

Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Reviewed-by: Vinod Koul <vkoul@kernel.org>
Link: https://lore.kernel.org/r/20220412215137.2385831-2-bjorn.andersson@linaro.org
 2022-04-19 12:53:12 -05:00
Bjorn Andersson
bc08fbf49b arm64: dts: qcom: sm8350: Define GPI DMA engines 
The Qualcomm SM8350 has three GPI DMA engines, add definitions for
these.

Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Reviewed-by: Vinod Koul <vkoul@kernel.org>
Link: https://lore.kernel.org/r/20220412215137.2385831-1-bjorn.andersson@linaro.org
 2022-04-19 12:53:12 -05:00
Sandeep Maheswaram
97276cbfb4 arm64: dts: qcom: sc7280: Add wakeup-source property for USB node 
Adding wakeup-source property for USB controller in SC7280.
This property is added to inform that the USB controller is
wake up capable and to conditionally power down the phy during
system suspend.

Signed-off-by: Sandeep Maheswaram <quic_c_sanm@quicinc.com>
Reviewed-by: Matthias Kaehlcke <mka@chromium.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/1649704614-31518-7-git-send-email-quic_c_sanm@quicinc.com
 2022-04-19 12:51:25 -05:00
Krzysztof Kozlowski
2a80a66f68 arm64: dts: qcom: msm8996: override nodes by label 
Using node paths to extend or override a device tree node is error
prone.  If there was a typo error, a new node will be created instead of
extending the existing node.  This will lead to run-time errors that
could be hard to detect.

A mistyped label on the other hand, will cause a dtc compile error
(during build time).  This also reduces the indentation making the code
easier to read.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220402192859.154977-2-krzysztof.kozlowski@linaro.org
 2022-04-19 12:41:53 -05:00
Krzysztof Kozlowski
c46e3c4bdf arm64: dts: qcom: msm8994: override nodes by label 
Using node paths to extend or override a device tree node is error
prone.  If there was a typo error, a new node will be created instead of
extending the existing node.  This will lead to run-time errors that
could be hard to detect.

A mistyped label on the other hand, will cause a dtc compile error
(during build time).  This also reduces the indentation making the code
easier to read.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220402192859.154977-1-krzysztof.kozlowski@linaro.org
 2022-04-19 12:41:52 -05:00
Joel Selvaraj
8956188619 arm64: dts: qcom: sdm845-xiaomi-beryllium: enable qcom wled backlight and link to panel 
Xiaomi Poco F1 uses the QCOM WLED driver for backlight control.
Enable and link it to the panel to use it.

Signed-off-by: Joel Selvaraj <jo@jsfamily.in>
Reviewed-by: Marijn Suijten <marijn.suijten@somainline.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/BY5PR02MB70092607CD7CDD8CF8BCD464D9E09@BY5PR02MB7009.namprd02.prod.outlook.com
 2022-04-19 12:38:36 -05:00
Joel Selvaraj
3213b3741a arm64: dts: qcom: sdm845-xiaomi-beryllium: enable second wifi channel 
Like the c630, the Poco F1 is also capable of using both antenna
channels for 2.4 and 5ghz wifi, however unlike the c630 only the first
channel is used for bluetooth. Similar to Oneplus 6.

Signed-off-by: Joel Selvaraj <jo@jsfamily.in>
Reviewed-by: Caleb Connolly <caleb@connolly.tech>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/BY5PR02MB7009E2566F9000F338432761D91F9@BY5PR02MB7009.namprd02.prod.outlook.com
 2022-04-19 12:38:14 -05:00
Joel Selvaraj
1f1c494082 arm64: dts: qcom: sdm845-xiaomi-beryllium: fix typo in panel's vddio-supply property 
vddio is misspelled with a "0" instead of "o". Fix it.

Signed-off-by: Joel Selvaraj <jo@jsfamily.in>
Reviewed-by: Caleb Connolly <caleb@connolly.tech>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/BY5PR02MB7009901651E6A8D5ACB0425ED91F9@BY5PR02MB7009.namprd02.prod.outlook.com
 2022-04-19 12:38:14 -05:00
Joel Selvaraj
84b6c24204 arm64: dts: qcom: sdm845-xiaomi-beryllium: enable qcom ipa driver 
Enable Qualcomm IP Accelerator (IPA) driver for mobile data functionality
which works by using ModemManager.

Signed-off-by: Joel Selvaraj <jo@jsfamily.in>
Reviewed-by: Caleb Connolly <caleb@connolly.tech>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/BY5PR02MB7009405D7C06C0B480974063D91F9@BY5PR02MB7009.namprd02.prod.outlook.com
 2022-04-19 12:38:14 -05:00
Joel Selvaraj
efbd359915 arm64: dts: qcom: sdm845-xiaomi-beryllium: change firmware path and use mbn format 
The "qcom/sdm845/" path conflicts with db845c's firmware that are
present in the linux-firmware package. Xiaomi uses their own signed
firmware for Poco F1 and can't use the db845c's firmware. So let's
use "qcom/sdm845/beryllium/" to distinguish Poco F1's firmware files.

For easier handling and packaging, the mdt+bXX files are squashed
using Bjorn Andersson's pil-squasher tool from this link:
https://github.com/andersson/pil-squasher

Signed-off-by: Joel Selvaraj <jo@jsfamily.in>
Reviewed-by: Caleb Connolly <caleb@connolly.tech>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/BY5PR02MB700966DEE6F6044EBEB5B892D91F9@BY5PR02MB7009.namprd02.prod.outlook.com
 2022-04-19 12:38:14 -05:00
Krzysztof Kozlowski
fc0e7dd6d2 arm64: dts: qcom: do not use underscore in BCM node name 
Align BCM voter node with DT schema by using hyphen instead of
underscore.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220411085935.130072-3-krzysztof.kozlowski@linaro.org
 2022-04-19 12:25:19 -05:00
Vladimir Zapolskiy
fccf8e31ac arm64: dts: qcom: sm8450: Add thermal zones 
Add thermal zones handled by tsens sensors. The definitions and the trip
points were taken from the downstream dts. For the CPU core thermal
sensors, the trip points were changed to follow the example of other
Qualcomm platforms.

Signed-off-by: Vladimir Zapolskiy <vladimir.zapolskiy@linaro.org>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220410234458.1739279-3-dmitry.baryshkov@linaro.org
 2022-04-19 12:17:00 -05:00
Vladimir Zapolskiy
48995e8633 arm64: dts: qcom: sm8450: Add thermal sensor controllers 
The change adds description of two thermal sensor controllers found
on SM8450.

Signed-off-by: Vladimir Zapolskiy <vladimir.zapolskiy@linaro.org>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220410234458.1739279-2-dmitry.baryshkov@linaro.org
 2022-04-19 12:16:59 -05:00
Michael Srba
1ed29355df arm64: dts: qcom: msm8998: reserve potentially inaccessible clocks 
With the gcc driver now being more complete and describing clocks which
might not always be write-accessible to the OS, conservatively specify
all such clocks as protected in the SoC dts.
The board dts - or even user-supplied dts - can override this property
to reflect the actual configuration.

Signed-off-by: Michael Srba <michael.srba@seznam.cz>
Reviewed-by: Jeffrey Hugo <jeffrey.l.hugo@gmail.com>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220411072156.24451-6-michael.srba@seznam.cz
 2022-04-19 12:07:24 -05:00
Bjorn Andersson
0fb9ddbc63 Merge branch '20220411072156.24451-2-michael.srba@seznam.cz' into arm64-for-5.19 2022-04-19 12:05:00 -05:00
Michael Srba
368cfcbaa3 dt-bindings: clock: gcc-msm8998: Add definitions of SSC-related clocks 
Add definitions of four clocks which need to be manipulated in order to
initialize the AHB bus which exposes the SCC block in the global address
space.

Signed-off-by: Michael Srba <Michael.Srba@seznam.cz>
Acked-by: Rob Herring <robh@kernel.org>
Reviewed-by: Stephen Boyd <sboyd@kernel.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220411072156.24451-2-michael.srba@seznam.cz
 2022-04-19 12:04:02 -05:00
Krzysztof Kozlowski
812b0b61ee arm64: dts: qcom: add RPM clock controller fallback compatible 
The bindings require a fallback compatible to RPM clock controller.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220401201035.189106-4-krzysztof.kozlowski@linaro.org
 2022-04-12 22:13:57 -05:00
Krzysztof Kozlowski
0e324e9f49 arm64: dts: qcom: msm8994: remove SMD qcom,local-pid property 
The Qualcomm SMD does not use qcom,local-pid property.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220401201035.189106-3-krzysztof.kozlowski@linaro.org
 2022-04-12 22:13:36 -05:00
Krzysztof Kozlowski
b3d26821d9 arm64: dts: qcom: msm8953: do not use underscore in node name 
Align RPM requests node with DT schema by using hyphen instead of
underscore.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220401201035.189106-2-krzysztof.kozlowski@linaro.org
 2022-04-12 22:13:25 -05:00
Luca Weiss
22437c436c arm64: dts: qcom: sm7225-fairphone-fp4: Enable wifi 
Configure regulators used by the wifi hardware and enable it.

Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220325101841.172304-2-luca.weiss@fairphone.com
 2022-04-12 22:10:13 -05:00
Luca Weiss
48cc9bb1d3 arm64: dts: qcom: sm6350: Add wifi node 
Add a node describing the wifi hardware found on sm6350.

Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220325101841.172304-1-luca.weiss@fairphone.com
 2022-04-12 22:10:11 -05:00
Konrad Dybcio
d8023f3a8e arm64: dts: qcom: msm8994: Add mmc aliases 
Set the aliases for both SDHCI controllers.

Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Reviewed-by: Petr Vorel <petr.vorel@gmail.com>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220319174645.340379-16-konrad.dybcio@somainline.org
 2022-04-12 22:09:17 -05:00
Konrad Dybcio
e0be93fb38 arm64: dts: qcom: msm8994: Add watchdog timer node 
Add and configure the watchdog node.

Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220319174645.340379-15-konrad.dybcio@somainline.org
 2022-04-12 22:09:01 -05:00
Konrad Dybcio
1ae438d26b arm64: dts: qcom: msm8994: Fix BLSP[12]_DMA channels count 
MSM8994 actually features 24 DMA channels for each BLSP,
fix it!

Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220319174645.340379-14-konrad.dybcio@somainline.org
 2022-04-12 22:09:00 -05:00
Konrad Dybcio
9d511d0a79 arm64: dts: qcom: msm8994: Add OCMEM node 
Add OCMEM node to allow for GPU SRAM access.

Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220319174645.340379-13-konrad.dybcio@somainline.org
 2022-04-12 22:08:58 -05:00
Konrad Dybcio
410e1619d5 arm64: dts: qcom: msm8994-kitakami: Update regulator configuration 
Remove regulator-always-on property where not necessary and mark regulators
that are not supposed to be voted active on boot with regulator-boot-on.
While at it, reorder the load properties to make it look more decent.

Reorder PMICs to fix a probe defer caused by messy dependencies and Linux's
inability to handle them (at least for now).

Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220319174645.340379-12-konrad.dybcio@somainline.org
 2022-04-12 22:08:56 -05:00
Konrad Dybcio
7d9379bf1e arm64: dts: qcom: msm8994-kitakami: Disable a mistakengly enabled I2C host 
I2C4 turns out not to be used on Kitakami after all and it only blocks a
GPIO used by camera hardware.

Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220319174645.340379-11-konrad.dybcio@somainline.org
 2022-04-12 22:08:54 -05:00
Konrad Dybcio
9e398b4c4e arm64: dts: qcom: msm8992-libra: Fix up the framebuffer 
Make sure the necessary clocks are kept on after clk_cleanup (until MDSS
is properly handled by its own driver) and touch up the fb address to
prevent some weird shifting. It's still not perfect, but at least the
kernel log doesn't start a third deep into your screen..

Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
[bjorn: Folded in change of framebuffer base address, from Konrad]
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220319174645.340379-10-konrad.dybcio@somainline.org
 2022-04-12 22:08:33 -05:00
Konrad Dybcio
049c46f31a arm64: dts: qcom: msm8994: Fix the cont_splash_mem address 
The default memory map places cont_splash_mem at 3401000, which was
overlooked.. Fix it!

Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220319174645.340379-9-konrad.dybcio@somainline.org
 2022-04-12 22:07:26 -05:00
Konrad Dybcio
b0b5687a2c arm64: dts: qcom: msm8992: Use the correct MMCC compatible 
Now that proper msm8992 support is in the driver, switch to
the new compatible.

Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220319174645.340379-8-konrad.dybcio@somainline.org
 2022-04-12 22:07:24 -05:00
Konrad Dybcio
355ea704c8 arm64: dts: qcom: msm8992: Use the correct GCC compatible 
Now that proper msm8992 support is in the driver, switch to
the new compatible.

Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Reviewed-by: Petr Vorel <petr.vorel@gmail.com>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220319174645.340379-7-konrad.dybcio@somainline.org
 2022-04-12 22:07:21 -05:00
Konrad Dybcio
e9b0eb5420 arm64: dts: qcom: msm8994: Add MMCC node 
Describe the Multimedia Clock Controller block in the DT.

Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220319174645.340379-6-konrad.dybcio@somainline.org
 2022-04-12 22:07:18 -05:00
Konrad Dybcio
2d0f45f760 arm64: dts: qcom: msm8992-libra: Remove superfluous status = "okay" 
The framebuffer is already enabled by default.

Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220319174645.340379-5-konrad.dybcio@somainline.org
 2022-04-12 22:07:17 -05:00
Konrad Dybcio
ed288ae94a arm64: dts: qcom: msm8992-libra: Temporarily restrict CPU count to 1 
The phone seems to randomly crash when more than 1 CPU is enabled, which
is probably related to lack of some driver.

Restrict the device to only use a single core until this is solved.

Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220319174645.340379-4-konrad.dybcio@somainline.org
 2022-04-12 22:07:16 -05:00
Konrad Dybcio
13cff03303 arm64: dts: qcom: msm8992-libra: Add CPU regulators 
Specify CPU regulator voltages for both VDD_APC rails.

Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220319174645.340379-3-konrad.dybcio@somainline.org
 2022-04-12 22:07:12 -05:00
Konrad Dybcio
5827e28304 arm64: dts: qcom: msm8994: Fix sleep clock name 
The sleep clock name expected by GCC is actually "sleep" and not
"sleep_clk". Fix the clock-names value for it to make sure it is
provided.

Fixes: 9204da57cd65 ("arm64: dts: qcom: msm8994: Provide missing "xo_board" and "sleep_clk" to GCC")

Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Reviewed-by: Petr Vorel <petr.vorel@gmail.com>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220319174645.340379-2-konrad.dybcio@somainline.org
 2022-04-12 22:07:04 -05:00
Akhil P Oommen
3bfef00d76 arm64: dts: qcom: sc7280: Support gpu speedbin 
Add speedbin fuse and additional OPPs for gpu to support sc7280 SKUs.

Signed-off-by: Akhil P Oommen <quic_akhilpo@quicinc.com>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220226005021.v2.5.I4c2cb95f06f0c37038c80cc1ad20563fdf0618e2@changeid
 2022-04-12 21:54:08 -05:00
Kathiravan T
f607dd767f arm64: dts: qcom: ipq8074: fix the sleep clock frequency 
Sleep clock frequency should be 32768Hz. Lets fix it.

Cc: stable@vger.kernel.org
Fixes: 41dac73e24 ("arm64: dts: Add ipq8074 SoC and HK01 board support")
Link: https://lore.kernel.org/all/e2a447f8-6024-0369-f698-2027b6edcf9e@codeaurora.org/
Signed-off-by: Kathiravan T <quic_kathirav@quicinc.com>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/1644581655-11568-1-git-send-email-quic_kathirav@quicinc.com
 2022-04-12 21:35:10 -05:00
Dmitry Baryshkov
be63332992 arm64: dts: qcom: sm8250: Drop flags for mdss irqs 
The number of interrupt cells for the mdss interrupt controller is 1,
meaning there should only be one cell for the interrupt number, not two.
Drop the second cell containing (unused) irq flags.

Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Fixes: 7c1dffd471 ("arm64: dts: qcom: sm8250.dtsi: add display system nodes")
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Marijn Suijten <marijn.suijten@somainline.org>
Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220302225411.2456001-5-dmitry.baryshkov@linaro.org
 2022-04-12 21:34:13 -05:00
Dmitry Baryshkov
0316da6bbc arm64: dts: qcom: sdm845: Drop flags for mdss irqs 
The number of interrupt cells for the mdss interrupt controller is 1,
meaning there should only be one cell for the interrupt number, not two.
Drop the second cell containing (unused) irq flags.

Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Fixes: 08c2a076d1 ("arm64: dts: qcom: sdm845: Add dpu to sdm845 dts file")
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Marijn Suijten <marijn.suijten@somainline.org>
Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220302225411.2456001-4-dmitry.baryshkov@linaro.org
 2022-04-12 21:34:11 -05:00
Dmitry Baryshkov
63ddd8a54d arm64: dts: qcom: sdm660: Drop flags for mdss irqs 
The number of interrupt cells for the mdss interrupt controller is 1,
meaning there should only be one cell for the interrupt number, not two.
Drop the second cell containing (unused) irq flags.

Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Fixes: ab29028439 ("arm64: dts: qcom: sdm660: Add required nodes for DSI1")
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Marijn Suijten <marijn.suijten@somainline.org>
Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220302225411.2456001-3-dmitry.baryshkov@linaro.org
 2022-04-12 21:34:10 -05:00
Dmitry Baryshkov
2a11b3bfc5 arm64: dts: qcom: sdm630: Drop flags for mdss irqs 
The number of interrupt cells for the mdss interrupt controller is 1,
meaning there should only be one cell for the interrupt number, not two.
Drop the second cell containing (unused) irq flags.

Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Fixes: b52555d590 ("arm64: dts: qcom: sdm630: Add MDSS nodes")
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Marijn Suijten <marijn.suijten@somainline.org>
Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220302225411.2456001-2-dmitry.baryshkov@linaro.org
 2022-04-12 21:34:07 -05:00
Dmitry Baryshkov
7b36ab2673 arm64: dts: qcom: msm8996: Drop flags for mdss irqs 
The number of interrupt cells for the mdss interrupt controller is 1,
meaning there should only be one cell for the interrupt number, not two.
Drop the second cell containing (unused) irq flags.

Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Fixes: 12d5403757 ("arm64: dts: qcom: msm8996: Add DSI0 nodes")
Fixes: 3a4547c1fc ("arm64: qcom: msm8996.dtsi: Add Display nodes")
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Marijn Suijten <marijn.suijten@somainline.org>
Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220302225411.2456001-1-dmitry.baryshkov@linaro.org
 2022-04-12 21:34:06 -05:00
Dmitry Baryshkov
37ebe34fc0 arm64: dts: qcom: sm8450-hdk: add pcie nodes 
Add device tree nodes for PCIe0/PCIe1 controllers and corresponding
PHYs.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220301061500.2110569-8-dmitry.baryshkov@linaro.org
 2022-04-12 21:24:56 -05:00