Himal Prasad Ghimiray
b5c2ca0372
drm/xe/xe2hpg: Determine flat ccs offset for vram
...
on Xe2 dgfx platform determine the offset using Flat CCS size
bitfield of XE2_FLAT_CCS_BASE_RANGE_[UPPER/LOWER] mcr registers.
v2: function argument tile_size changed from pass by reference to pass
by value
Bspec: 68023
Signed-off-by: Himal Prasad Ghimiray <himal.prasad.ghimiray@intel.com >
Signed-off-by: Akshata Jahagirdar <akshata.jahagirdar@intel.com >
Signed-off-by: Matthew Auld <matthew.auld@intel.com >
Signed-off-by: Balasubramani Vivekanandan <balasubramani.vivekanandan@intel.com >
Reviewed-by: Matt Roper <matthew.d.roper@intel.com >
Signed-off-by: Matt Roper <matthew.d.roper@intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20240408170545.3769566-7-balasubramani.vivekanandan@intel.com
2024-04-09 14:21:52 -07:00
Matt Roper
183620f9ae
drm/xe/bmg: Program an additional discrete-specific PAT setting
...
Discrete Xe2 platforms require programming of one additional row of PAT
settings which controls the access characteristics for PPGTT and LMTT
page tables. Integrated GPUs do not need this programming and will
leave the register at its hardware default value.
Bspec: 71582
Signed-off-by: Matt Roper <matthew.d.roper@intel.com >
Signed-off-by: Balasubramani Vivekanandan <balasubramani.vivekanandan@intel.com >
Reviewed-by: Himal Prasad Ghimiray <himal.prasad.ghimiray@intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20240408170545.3769566-6-balasubramani.vivekanandan@intel.com
2024-04-09 14:18:48 -07:00
Balasubramani Vivekanandan
bdf59bbd9a
drm/xe/bmg: Add BMG mocs table
...
BMG uses the same MOCS table as LNL.
Bpsec: 71582
CC: Matt Roper <matthew.d.roper@intel.com >
Signed-off-by: Balasubramani Vivekanandan <balasubramani.vivekanandan@intel.com >
Reviewed-by: Matt Roper <matthew.d.roper@intel.com >
Signed-off-by: Matt Roper <matthew.d.roper@intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20240408170545.3769566-5-balasubramani.vivekanandan@intel.com
2024-04-09 14:18:48 -07:00
Matt Roper
27cc23111a
drm/xe/bmg: Add BMG platform definition
...
BMG is a discrete GPU based on the Xe2 architecture.
No device ids are bound to the BMG platform descriptor yet.
BMG device ids will be added once we have all the basic required
platform enabling patches landed.
v2: Removed device ids, deferring it to a later patch
v3: Squash in compat header IS_BATTLEMAGE() patch. (Lucas)
Bspec: 68090
Signed-off-by: Matt Roper <matthew.d.roper@intel.com >
Signed-off-by: Balasubramani Vivekanandan <balasubramani.vivekanandan@intel.com >
Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20240408170545.3769566-4-balasubramani.vivekanandan@intel.com
2024-04-09 14:17:39 -07:00
Matt Roper
90d308655e
drm/xe/xe2: Recognize Xe2_HPM IP
...
Xe2_HPM uses the same general feature flags as Xe2_LPM. Xe2_HPM is
identified as version 13.01 in the GMD_ID register.
Bspec: 68090, 67163
Signed-off-by: Matt Roper <matthew.d.roper@intel.com >
Signed-off-by: Balasubramani Vivekanandan <balasubramani.vivekanandan@intel.com >
Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20240408170545.3769566-3-balasubramani.vivekanandan@intel.com
2024-04-09 13:57:11 -07:00
Matt Roper
8d315b803b
drm/xe/xe2: Recognize Xe2_HPG IP
...
Xe2_HPG uses the same general feature flags as Xe2_LPG. Xe2_HPG is
identified as version 20.01 in the GMD_ID register.
Bspec: 68090
Signed-off-by: Matt Roper <matthew.d.roper@intel.com >
Signed-off-by: Balasubramani Vivekanandan <balasubramani.vivekanandan@intel.com >
Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20240408170545.3769566-2-balasubramani.vivekanandan@intel.com
2024-04-09 13:57:03 -07:00
Karthik Poosa
883232b47b
drm/xe/hwmon: Cast result to output precision on left shift of operand
...
Address potential overflow in result of left shift of a
lower precision (u32) operand before assignment to higher
precision (u64) variable.
v2:
- Update commit message. (Himal)
Fixes: 4446fcf220 ("drm/xe/hwmon: Expose power1_max_interval")
Signed-off-by: Karthik Poosa <karthik.poosa@intel.com >
Reviewed-by: Anshuman Gupta <anshuman.gupta@intel.com >
Cc: Badal Nilawar <badal.nilawar@intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20240405130127.1392426-5-karthik.poosa@intel.com
Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com >
2024-04-09 09:57:55 -07:00
Karthik Poosa
a50b794c92
drm/xe/hwmon: Update xe_hwmon_get_reg to return struct xe_reg
...
Return struct xe_reg instead of reg.raw from xe_hwmon_get_reg
to have abstracted usage of struct xe_reg.
v2:
- Use xe_reg_is_valid function instead of XE_REG_IS_VALID macro
as it is removed.
Signed-off-by: Karthik Poosa <karthik.poosa@intel.com >
Suggested-by: Lucas De Marchi <lucas.demarchi@intel.com >
Cc: Badal Nilawar <badal.nilawar@intel.com >
Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20240405130127.1392426-3-karthik.poosa@intel.com
Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com >
2024-04-09 09:57:44 -07:00
Karthik Poosa
b39c7056d0
drm/xe: Define xe_reg_is_valid
...
Add a function to check if struct xe_reg has valid address.
v2:
- Rebase.
- Make xe_reg_is_valid as inline function instead of a macro. (Badal).
- Update commit msg.
Signed-off-by: Karthik Poosa <karthik.poosa@intel.com >
Suggested-by: Lucas De Marchi <lucas.demarchi@intel.com >
Cc: Badal Nilawar <badal.nilawar@intel.com >
Reviewed-by: Badal Nilawar <badal.nilawar@intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20240405130127.1392426-2-karthik.poosa@intel.com
Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com >
2024-04-09 09:57:31 -07:00
Badal Nilawar
c151ff5c90
drm/xe/lnl: Enable GuC Wa_14019882105
...
Enable GuC Wa_14019882105 to block interrupts during C6 flow
when the memory path has been blocked
v2: Make helper function generic and name it as
guc_waklv_enable_simple (John Harrison)
v3: Make warning descriptive (John Harrison)
v4: s/drm_WARN/xe_gt_WARN/ (Michal)
Cc: John Harrison <john.harrison@intel.com >
Signed-off-by: Badal Nilawar <badal.nilawar@intel.com >
Reviewed-by: John Harrison <John.C.Harrison@Intel.com >
Signed-off-by: Michal Wajdeczko <michal.wajdeczko@intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20240405084231.3620848-3-badal.nilawar@intel.com
2024-04-09 12:54:04 +02:00
Badal Nilawar
d6da81a478
drm/xe/guc: Add support for workaround KLVs
...
To prevent running out of bits, new workaround (w/a) enable flags are
being added via a KLV system instead of a 32 bit flags word.
v2: GuC version check > 70.10 is not needed as base line xe doesnot
support anything below < 70.19
v3: Use 64 bit ggtt address for future
compatibility (John Harrison/Daniele)
v4: %s/PAGE_SIZE/SZ_4K/ (Michal)
Cc: John Harrison <John.C.Harrison@intel.com >
Signed-off-by: Badal Nilawar <badal.nilawar@intel.com >
Reviewed-by: John Harrison <John.C.Harrison@Intel.com >
Signed-off-by: Michal Wajdeczko <michal.wajdeczko@intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20240405084231.3620848-2-badal.nilawar@intel.com
2024-04-09 12:54:02 +02:00
Matthew Brost
1db3594c59
drm/xe: Capture GuC CT snapshot when stopped
...
It is useful capture the GuC CT snapshot if the GuC CT has been
forcefully put into the stopped state. Enable snapshot capture when in
this state.
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com >
Signed-off-by: Matthew Brost <matthew.brost@intel.com >
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20240405211632.223568-3-matthew.brost@intel.com
2024-04-08 14:47:39 -07:00
Matthew Brost
0417a5f848
drm/xe: Always capture exec queues on snapshot
...
Always capture exec queues on snapshot regardless if exec queue has
pending jobs or not. Having jobs or not does indicate whether the exec
queue capture is useful.
Example bugs that would not be easily detected by skipping capture when
pending job list is empty:
- Jobs pending on exec queue have dependencies
- Leaking exec queue refs
- GuC protocol issues (i.e. losing G2H)
In addition to above bugs, in general it just useful to see every exec
queue registered with the GuC and its state.
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com >
Signed-off-by: Matthew Brost <matthew.brost@intel.com >
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20240405211632.223568-2-matthew.brost@intel.com
2024-04-08 14:47:37 -07:00
Francois Dugast
31ced035ec
drm/xe/uapi: Restore flags VM_BIND_FLAG_READONLY and VM_BIND_FLAG_IMMEDIATE
...
The commit 84a1ed5e67 ("drm/xe/uapi: Remove unused flags") is partially
reverted. At the time, flags not used by user space were removed during
cleanup. Some flags now needed by the compute runtime are brought back in
this commit:
- DRM_XE_VM_BIND_FLAG_READONLY is used to write protect kernel ISA thus
preventing accidental overwrites.
- DRM_XE_VM_BIND_FLAG_IMMEDIATE is used to trigger mapping at the time of
binding in order to prevent faulting at execution time.
The changes in the compute runtime are ready and approved, see link below.
v2: Include a link to the PR in the commit message (Matthew Brost)
v3: Update kernel doc and improve commit message (Lucas De Marchi)
Cc: Mateusz Jablonski <mateusz.jablonski@intel.com >
Cc: Michal Mrozek <michal.mrozek@intel.com >
Cc: Matthew Brost <matthew.brost@intel.com >
Cc: Lucas De Marchi <lucas.demarchi@intel.com >
Link: https://github.com/intel/compute-runtime/pull/717
Signed-off-by: Francois Dugast <francois.dugast@intel.com >
Reviewed-by: Matthew Brost <matthew.brost@intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20240329124403.7-1-francois.dugast@intel.com
Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com >
2024-04-08 12:05:30 -07:00
Lucas De Marchi
b611dad092
drm/xe: Remove dead clock code
...
xe_gt_clock_cycles_to_ns() is not called from anywhere after PMU
handling was removed in commit 90a8b23f9b ("drm/xe/pmu: Remove PMU
from Xe till uapi is finalized"). Drop it.
Reviewed-by: Jani Nikula <jani.nikula@intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20240408151312.2100304-1-lucas.demarchi@intel.com
Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com >
2024-04-08 12:03:19 -07:00
Ashutosh Dixit
dc30c6e714
drm/xe: Label RING_CONTEXT_CONTROL as masked
...
RING_CONTEXT_CONTROL is a masked register.
v2: Also clean up setting register value (Lucas)
Reviewed-by: Matt Roper <matthew.d.roper@intel.com >
Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com >
Signed-off-by: Ashutosh Dixit <ashutosh.dixit@intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20240404161256.3852502-1-ashutosh.dixit@intel.com
2024-04-08 08:01:00 -07:00
José Roberto de Souza
335ad807d5
drm/xe: Remove debug message from migrate_clear()
...
This messages is printed a lot and from my understanding it do not
bring any value, so here dropping it.
Signed-off-by: José Roberto de Souza <jose.souza@intel.com >
Reviewed-by: Matthew Brost <matthew.brost@intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20240405153849.44906-1-jose.souza@intel.com
2024-04-08 07:11:02 -07:00
Lucas De Marchi
117de185ed
drm/xe/display: Fix double mutex initialization
...
All of these mutexes are already initialized by the display side since
commit 3fef3e6ff8 ("drm/i915: move display mutex inits to display
code"), so the xe shouldn´t initialize them.
Fixes: 44e694958b ("drm/xe/display: Implement display support")
Cc: Jani Nikula <jani.nikula@linux.intel.com >
Cc: Arun R Murthy <arun.r.murthy@intel.com >
Reviewed-by: Jani Nikula <jani.nikula@intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20240405200711.2041428-1-lucas.demarchi@intel.com
Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com >
2024-04-08 06:41:52 -07:00
Michal Wajdeczko
66cb3ca913
drm/xe/vf: Mark supported firmwares as preloaded
...
On current platforms supported firmwares, like GuC and HuC, must
be loaded by the PF driver. Mark those firmwares as 'preloaded'
so we will skip fetching and loading them on the VF drivers but
still correctly report them as 'running'.
Signed-off-by: Michal Wajdeczko <michal.wajdeczko@intel.com >
Reviewed-by: Piotr Piórkowski <piotr.piorkowski@intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20240404173814.715-1-michal.wajdeczko@intel.com
2024-04-08 14:58:52 +02:00
Michal Wajdeczko
f2b81483d3
drm/xe/vf: Don't try to read legacy GuC MMIO notification if VF
...
Legacy SOFT_SCRATCH registers are not accessible from the VF. Any
G2H notification posted there will be handled by the PF driver.
Signed-off-by: Michal Wajdeczko <michal.wajdeczko@intel.com >
Reviewed-by: Himal Prasad Ghimiray <himal.prasad.ghimiray@intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20240405133936.891-4-michal.wajdeczko@intel.com
2024-04-08 14:33:15 +02:00
Michal Wajdeczko
fe4b17c4f7
drm/xe/vf: Don't try to program MOCS if VF
...
VFs drivers don't have access to MOCS registers. It is a PF driver
responsibility to program MOCS according to the HW team guidelines.
Signed-off-by: Michal Wajdeczko <michal.wajdeczko@intel.com >
Reviewed-by: Himal Prasad Ghimiray <himal.prasad.ghimiray@intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20240405133936.891-3-michal.wajdeczko@intel.com
2024-04-08 14:33:14 +02:00
Michal Wajdeczko
97515d0b3e
drm/xe/vf: Don't emit access to Global HWSP if VF
...
VFs can't access Global HWSP, don't emit questionable MI_FLUSH_DW
while processing a migration job.
Bspec: 52398
Signed-off-by: Michal Wajdeczko <michal.wajdeczko@intel.com >
Reviewed-by: Piotr Piórkowski <piotr.piorkowski@intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20240405133936.891-2-michal.wajdeczko@intel.com
2024-04-08 14:33:13 +02:00
Michal Wajdeczko
83787afe06
drm/xe/guc: Initialize GuC ID manager sooner
...
The GuC submission cleanup code may depend on the GuC ID manager,
thus we can't initialize it after registering a submission cleanup
action, as reverse cleanup sequence will destroy GuC ID manager
prior to a call to guc_submit_fini().
Move GuC ID manager initialization up, right after managed mutex
initialization, to have it available during guc_submit_fini().
Signed-off-by: Michal Wajdeczko <michal.wajdeczko@intel.com >
Cc: Matthew Brost <matthew.brost@intel.com >
Reviewed-by: Matthew Brost <matthew.brost@intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20240406143946.979-2-michal.wajdeczko@intel.com
2024-04-08 11:22:18 +02:00
Michal Wajdeczko
104f7519db
drm/xe/guc: Use drm_device-managed version of mutex_init()
...
This is safer approach and will help resolve a cleanup ordering
conflict related to the GuC ID manager.
Signed-off-by: Michal Wajdeczko <michal.wajdeczko@intel.com >
Cc: Matthew Brost <matthew.brost@intel.com >
Reviewed-by: Matthew Brost <matthew.brost@intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20240406143946.979-1-michal.wajdeczko@intel.com
2024-04-08 11:22:17 +02:00
Michal Wajdeczko
1d7d997cd7
drm/xe: Drop xe_vm_assert_held() macro definition from xe_bo.h
...
It is already defined in xe_vm.h and shouldn't be duplicated.
Signed-off-by: Michal Wajdeczko <michal.wajdeczko@intel.com >
Reviewed-by: Himal Prasad Ghimiray <himal.prasad.ghimiray@intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20240405113844.803-1-michal.wajdeczko@intel.com
2024-04-05 20:01:05 +02:00
Michal Wajdeczko
48651e18bb
drm/xe: Move PTE/PDE bit definitions to proper header
...
We already have dedicated header for GGTT/PPGTT definitions.
It's also cleaner to separate them from implementation macros.
Signed-off-by: Michal Wajdeczko <michal.wajdeczko@intel.com >
Cc: Lucas De Marchi <lucas.demarchi@intel.com >
Cc: Matt Roper <matthew.d.roper@intel.com >
Acked-by: Lucas De Marchi <lucas.demarchi@intel.com >
Reviewed-by: Matthew Brost <matthew.brost@intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20240405123520.847-1-michal.wajdeczko@intel.com
2024-04-05 19:58:54 +02:00
Andrzej Hajda
788d2ad60d
drm/xe: fix multicast support for Xe_LP platforms
...
Xe_LP has six sublices per slice.
v2: fixed commit message and subject (Matt)
Bspec: 66696
Fixes: bde5d76785 ("drm/xe: Add helper macro to loop each DSS")
Signed-off-by: Andrzej Hajda <andrzej.hajda@intel.com >
Reviewed-by: Matt Roper <matthew.d.roper@intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20240405-mcr_adlp-v2-1-2fd1e4325ef2@intel.com
Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com >
2024-04-05 06:17:40 -07:00
Michal Wajdeczko
f73155654d
drm/xe/guc: Reuse code while debugging GuC params
...
There is no need to duplicate code to print GuC parameters.
Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com >
Signed-off-by: Michal Wajdeczko <michal.wajdeczko@intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20240404155046.627-2-michal.wajdeczko@intel.com
2024-04-05 12:15:52 +02:00
Michal Wajdeczko
12f95f9900
drm/xe/guc: Prefer GT oriented logs for GuC messages
...
A platform can have more than one GuC, so we should use GT-oriented
logs to correctly identify the source of the message.
Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com >
Signed-off-by: Michal Wajdeczko <michal.wajdeczko@intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20240404155046.627-1-michal.wajdeczko@intel.com
2024-04-05 12:15:50 +02:00
Bommu Krishnaiah
91b93fae17
drm/xe/xe_hw_engine_class_sysfs: use sysfs_emit() for attr's _show()
...
sprintf() is deprecated for sysfs, use preferred sysfs_emit() instead.
v2: used sysfs_emit instand of sprintf
Signed-off-by: Bommu Krishnaiah <krishnaiah.bommu@intel.com >
Cc: Himal Prasad Ghimiray <himal.prasad.ghimiray@intel.com >
Cc: Tejas Upadhyay <tejas.upadhyay@intel.com >
Reviewed-by: Himal Prasad Ghimiray <himal.prasad.ghimiray@intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20231209235949.54524-3-krishnaiah.bommu@intel.com
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com >
2024-04-04 14:54:51 -04:00
Bommu Krishnaiah
a3c86b6d7b
drm/xe: prefer snprintf over sprintf
...
since the sprintf() function lacks built-in protection against buffer
overflows using the snprintf() function.
v2: Removed hard coded values and used sizeof()
Signed-off-by: Bommu Krishnaiah <krishnaiah.bommu@intel.com >
Cc: Himal Prasad Ghimiray <himal.prasad.ghimiray@intel.com >
Cc: Tejas Upadhyay <tejas.upadhyay@intel.com >
Reviewed-by: Himal Prasad Ghimiray <himal.prasad.ghimiray@intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20231209235949.54524-2-krishnaiah.bommu@intel.com
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com >
2024-04-04 14:54:51 -04:00
Rodrigo Vivi
972d01d0e3
drm/xe: Protect devcoredump access after unbind
...
While we don't have the full flow protection when devcoredump
is accessed after device unbind. Let's at least for now
protect against null dereference:
[ 422.766508] KASAN: null-ptr-deref in range [0x0000000000000000-0x0000000000000007]
[ 423.119584] RIP: 0010:xe_vm_snapshot_free+0x30/0x180 [xe]
While at it, I also fixed a non-standard code-declaration block
on the similar function of xe_guc_submit.
v2: - Use IS_ERR_OR_NULL (Nirmoy)
- Expand to other functions
Cc: José Roberto de Souza <jose.souza@intel.com >
Cc: Nirmoy Das <nirmoy.das@intel.com >
Reviewed-by: Nirmoy Das <nirmoy.das@intel.com >
Reviewed-by: José Roberto de Souza <jose.souza@intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20240403195044.239766-1-rodrigo.vivi@intel.com
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com >
2024-04-04 14:53:22 -04:00
Himal Prasad Ghimiray
34820967ae
drm/xe/xe_migrate: Cast to output precision before multiplying operands
...
Addressing potential overflow in result of multiplication of two lower
precision (u32) operands before widening it to higher precision
(u64).
-v2
Fix commit message and description. (Rodrigo)
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com >
Signed-off-by: Himal Prasad Ghimiray <himal.prasad.ghimiray@intel.com >
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20240401175300.3823653-1-himal.prasad.ghimiray@intel.com
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com >
2024-04-03 15:04:56 -04:00
Matthew Brost
37c15c4aae
drm/xe: Use ordered wq for preempt fence waiting
...
Preempt fences can sleep waiting for an exec queue suspend operation to
complete. If the system_unbound_wq is used for waiting and the number of
waiters exceeds max_active this will result in other users of the
system_unbound_wq getting starved. Use a device private work queue for
preempt fences to avoid starvation of the system_unbound_wq.
Even though suspend operations can complete out-of-order, all suspend
operations within a VM need to complete before the preempt rebind worker
can start. With that, use a device private ordered wq for preempt fence
waiting.
v2:
- Add comment about cleanup on failure (Matt R)
- Update commit message (Lucas)
Fixes: dd08ebf6c3 ("drm/xe: Introduce a new DRM driver for Intel GPUs")
Signed-off-by: Matthew Brost <matthew.brost@intel.com >
Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20240401221913.139672-2-matthew.brost@intel.com
Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com >
2024-04-03 07:11:00 -07:00
Himal Prasad Ghimiray
9f18b55b6d
drm/xe/xe2: Add workaround 18033852989
...
This workaround applies to RCS engine's context, hence added as
LRC workaround.
v2
- Fix commit description as lrc workaround instead of engine.(Lucas)
v3
- COMMON_SLICE_CHICKEN1 is a masked register, add XE_REG_OPTION_MASKED
flag. (Matt)
BSPEC: 55899
Cc: Matt Roper <matthew.d.roper@intel.com >
Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com >
Signed-off-by: Himal Prasad Ghimiray <himal.prasad.ghimiray@intel.com >
Reviewed-by: Matt Roper <matthew.d.roper@intel.com >
Signed-off-by: Matt Roper <matthew.d.roper@intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20240401163806.3821128-1-himal.prasad.ghimiray@intel.com
2024-04-02 12:11:41 -07:00
Lucas De Marchi
62742d1266
drm/xe: Normalize bo flags macros
...
The flags stored in the BO grew over time without following
much a naming pattern. First of all, get rid of the _BIT suffix that was
banned from everywhere else due to the guideline in
drivers/gpu/drm/i915/i915_reg.h that xe kind of follows:
Define bits using ``REG_BIT(N)``. Do **not** add ``_BIT`` suffix to the name.
Here the flags aren't for a register, but it's good practice to keep it
consistent.
Second divergence on names is the use or not of "CREATE". This is
because most of the flags are passed to xe_bo_create*() family of
functions, changing its behavior. However, since the flags are also
stored in the bo itself and checked elsewhere in the code, it seems
better to just omit the CREATE part.
With those 2 guidelines, all the flags are given the form
XE_BO_FLAG_<FLAG_NAME> with the following commands:
git grep -le "XE_BO_" -- drivers/gpu/drm/xe | xargs sed -i \
-e "s/XE_BO_\([_A-Z0-9]*\)_BIT/XE_BO_\1/g" \
-e 's/XE_BO_CREATE_/XE_BO_FLAG_/g'
git grep -le "XE_BO_" -- drivers/gpu/drm/xe | xargs sed -i -r \
-e 's/XE_BO_(DEFER_BACKING|SCANOUT|FIXED_PLACEMENT|PAGETABLE|NEEDS_CPU_ACCESS|NEEDS_UC|INTERNAL_TEST|INTERNAL_64K|GGTT_INVALIDATE)/XE_BO_FLAG_\1/g'
And then the defines in drivers/gpu/drm/xe/xe_bo.h are adjusted to
follow the coding style.
Reviewed-by: Matthew Auld <matthew.auld@intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20240322142702.186529-3-lucas.demarchi@intel.com
Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com >
2024-04-02 10:33:57 -07:00
Lucas De Marchi
e27f8a45c8
drm/xe: Stop passing user flag to xe_bo_create_user()
...
It's quite redundant to pass XE_BO_CREATE_USER_BIT to
xe_bo_create_user() since the only difference of that function is to
force that flag. Stop passing the flag in the few cases that were
explicitly doing so.
Reviewed-by: Matthew Auld <matthew.auld@intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20240322142702.186529-2-lucas.demarchi@intel.com
Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com >
2024-04-02 10:32:54 -07:00
Himal Prasad Ghimiray
b15e653495
drm/xe/xe_devcoredump: Check NULL before assignments
...
Assign 'xe_devcoredump_snapshot *' and 'xe_device *' only if
'coredump' is not NULL.
v2
- Fix commit messages.
v3
- Define variables before code.(Ashutosh/Jose)
v4
- Drop return check for coredump_to_xe. (Jose/Rodrigo)
v5
- Modify misleading commit message. (Matt)
Cc: Matt Roper <matthew.d.roper@intel.com >
Cc: Ashutosh Dixit <ashutosh.dixit@intel.com >
Cc: José Roberto de Souza <jose.souza@intel.com >
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com >
Signed-off-by: Himal Prasad Ghimiray <himal.prasad.ghimiray@intel.com >
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com >
Reviewed-by: José Roberto de Souza <jose.souza@intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20240328123739.3633428-1-himal.prasad.ghimiray@intel.com
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com >
2024-03-29 11:28:43 -04:00
Karthik Poosa
345dadc4f6
drm/xe/hwmon: Add infra to support card power and energy attributes
...
Add infra to support card power and energy attributes through channel 0.
Package attributes will be now exposed through channel 1 rather than
channel 0 as shown below.
Channel 0 i.e power1/energy1_xxx used for card and
channel 1 i.e power2/energy2_xxx used for package power,energy attributes.
power1/curr1_crit and in0_input are moved to channel 1, i.e.
power2/curr2_crit and in1_input as these are available for package only.
This would be needed for future platforms where they might be
separate registers for package and card power and energy.
Each discrete GPU supported by Xe driver, would have a directory in
/sys/class/hwmon/ with multiple channels under it.
Each channel would have attributes for power, energy etc.
Ex: /sys/class/hwmon/hwmon2/power1_max
/power1_label
/energy1_input
/energy1_label
Attributes will have a label to get more description of it.
Labelling is as below.
power1_label/energy1_label - "card",
power2_label/energy2_label - "pkg".
v2: Fix checkpatch errors.
v3:
- Update intel-xe-hwmon documentation. (Riana, Badal)
- Rename hwmon card channel enum from CHANNEL_PLATFORM
to CHANNEL_CARD. (Riana)
v4:
- Remove unrelated changes from patch. (Anshuman)
- Fix typo in commit msg.
v5:
- Update commit message and intel-xe-hwmon documentation with "Xe"
instead of xe when using it as a name. (Rodrigo)
Signed-off-by: Karthik Poosa <karthik.poosa@intel.com >
Reviewed-by: Badal Nilawar <badal.nilawar@intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20240328175435.3870957-1-karthik.poosa@intel.com
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com >
2024-03-29 11:27:21 -04:00
Michal Wajdeczko
c54eb24f71
drm/xe: Refactor GT debugfs
...
We are abusing struct drm_info_list.data by storing there pointer
to the xe_gt, while it shouldn't be used for any device specific
data. Use recently introduced xe_gt_debugfs_simple_show() that
hides all details how to obtain the xe_gt pointer. This will also
remove the need for making copies of the struct drm_info_list
to get GT specific definitions.
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com >
Link: https://lore.kernel.org/r/20240214115756.1525-4-michal.wajdeczko@intel.com
Signed-off-by: Michal Wajdeczko <michal.wajdeczko@intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20240328162808.451-4-michal.wajdeczko@intel.com
2024-03-29 14:00:07 +01:00
Michal Wajdeczko
19b8f86f4a
drm/xe: Define helper for GT specific debugfs files
...
Many of our debugfs files are GT specific and require a pointer to
struct xe_gt to correctly show its content. Our initial approach
to use drm_info_list.data field to pass pointer not only requires
extra steps (like copying template per each GT) but also abuses
the rule that this data field should not be device specific.
Introduce helper function that will use xe_gt pointer stored at
parent directory level and use .data only to pass actual print
function that would expects xe_gt pointer as a parameter.
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com >
Link: https://lore.kernel.org/r/20240214115756.1525-3-michal.wajdeczko@intel.com
Signed-off-by: Michal Wajdeczko <michal.wajdeczko@intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20240328162808.451-3-michal.wajdeczko@intel.com
2024-03-29 14:00:06 +01:00
Michal Wajdeczko
aee9781f81
drm/xe: Store pointer to struct xe_gt in gt/ debugfs directory
...
Attributes added under 'gt/' directories may wish to use that
in case they can't obtain it from elsewhere.
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com >
Acked-by: Lucas De Marchi <lucas.demarchi@intel.com >
Link: https://lore.kernel.org/r/20240214115756.1525-2-michal.wajdeczko@intel.com
Signed-off-by: Michal Wajdeczko <michal.wajdeczko@intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20240328162808.451-2-michal.wajdeczko@intel.com
2024-03-29 14:00:05 +01:00
Francois Dugast
ca83f9d201
drm/xe/uapi: Define topology types as indexes rather than masks
...
The topology type is an index (not a mask) so define the values
like other indexes instead of using powers of 2. This is also
to make clear that the next type can use value 3. This commit
does not change the existing values so it does not break
compatibility.
Cc: Lucas De Marchi <lucas.demarchi@intel.com >
Suggested-by: Matt Roper <matthew.d.roper@intel.com >
Signed-off-by: Francois Dugast <francois.dugast@intel.com >
Link: https://lore.kernel.org/intel-xe/20240327232317.GI718896@mdroper-desk1.amr.corp.intel.com/
Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20240328140243.7-1-francois.dugast@intel.com
Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com >
2024-03-28 16:57:32 -07:00
Daniele Ceraolo Spurio
d62753a57d
drm/xe/gsc: Implement WA 14018094691
...
The WA states that we need to keep the primary GT powered up during GSC
load to allow the GSC FW to access its registers. We also need to make
sure that one of the registers is locked before starting the load.
v2: fix location of register def (Matt)
Bspec: 55928
Signed-off-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com >
Reviewed-by: Matt Roper <matthew.d.roper@intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20240326224456.518548-1-daniele.ceraolospurio@intel.com
2024-03-28 13:26:31 -07:00
Michal Wajdeczko
aed2c1d70a
drm/xe/pf: Add minimal support for VF_STATE_NOTIFY events
...
GuC will use VF_STATE_NOTIFY events to notify the PF about changes
of the VF state, in particular when a VF FLR was requested. Add
very minimal support for such events to avoid reporting errors due
to unexpected G2H. We will improve handling of these messages later.
While around also add few basic functions to control the VF state
(pause, resume, stop) as we will also exercise them soon.
Signed-off-by: Michal Wajdeczko <michal.wajdeczko@intel.com >
Reviewed-by: Piotr Piórkowski <piotr.piorkowski@intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20240326191518.363-3-michal.wajdeczko@intel.com
2024-03-28 14:01:48 +01:00
Michal Wajdeczko
476f6c48d1
drm/xe/guc: Add VF_STATE_NOTIFY and VF_CONTROL to ABI
...
In upcoming patches the PF driver will add support to handle the
GUC2PF_VF_STATE_NOTIFY events and to send PF2GUC_VF_CONTROL request
messages. Add necessary definitions to our GuC firmware ABI header.
Signed-off-by: Michal Wajdeczko <michal.wajdeczko@intel.com >
Reviewed-by: Piotr Piórkowski <piotr.piorkowski@intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20240326191518.363-2-michal.wajdeczko@intel.com
2024-03-28 14:01:42 +01:00
Michal Wajdeczko
0613834f3d
drm/xe/vf: Add proper detection of the SR-IOV VF mode
...
SR-IOV VF mode detection is based on testing VF capability bit on
the register that is accessible from both the PF and enabled VFs.
Bspec: 49904, 53227
Signed-off-by: Michal Wajdeczko <michal.wajdeczko@intel.com >
Reviewed-by: Matt Roper <matthew.d.roper@intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20240327182740.407-4-michal.wajdeczko@intel.com
2024-03-28 13:45:37 +01:00
Michal Wajdeczko
d79c88c45d
drm/xe: Move SR-IOV probe to xe_device_probe_early()
...
SR-IOV mode detection requires access to the MMIO register and
this can be done now in xe_device_probe_early().
We can also drop explicit has_sriov parameter as this flag is now
already available from xe->info.
Signed-off-by: Michal Wajdeczko <michal.wajdeczko@intel.com >
Reviewed-by: Matt Roper <matthew.d.roper@intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20240327182740.407-3-michal.wajdeczko@intel.com
2024-03-28 13:45:35 +01:00
Michal Wajdeczko
451d261a6e
drm/xe: Separate pure MMIO init from VRAM checkout
...
We can setup root tile registers mapping at the same time as we
do early mapping of the entire MMIO BAR and keep mandatory VRAM
checkout as a separate step. This will allow us to perform SR-IOV
VF mode detection between those two steps using regular MMIO regs
access functions.
Signed-off-by: Michal Wajdeczko <michal.wajdeczko@intel.com >
Cc: Matt Roper <matthew.d.roper@intel.com >
Reviewed-by: Matt Roper <matthew.d.roper@intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20240327182740.407-2-michal.wajdeczko@intel.com
2024-03-28 13:45:33 +01:00
Thomas Hellström
7ee7dd6f30
drm/xe: Move vma rebinding to the drm_exec locking loop
...
Rebinding might allocate page-table bos, causing evictions.
To support blocking locking during these evictions,
perform the rebinding in the drm_exec locking loop.
Also Reserve fence slots where actually needed rather than trying to
predict how many fence slots will be needed over a complete
wound-wait transaction.
v2:
- Remove a leftover call to xe_vm_rebind() (Matt Brost)
- Add a helper function xe_vm_validate_rebind() (Matt Brost)
v3:
- Add comments and squash with previous patch (Matt Brost)
Fixes: 24f947d58f ("drm/xe: Use DRM GPUVM helpers for external- and evicted objects")
Fixes: 29f424eb87 ("drm/xe/exec: move fence reservation")
Cc: Matthew Auld <matthew.auld@intel.com >
Signed-off-by: Thomas Hellström <thomas.hellstrom@linux.intel.com >
Reviewed-by: Matthew Brost <matthew.brost@intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20240327091136.3271-5-thomas.hellstrom@linux.intel.com
2024-03-28 08:39:30 +01:00