thead-dt-for-v6.14: T-HEAD Devicetrees for v6.14
Add mailbox node for the T-Head TH1520 RISC-V SoC. The mailbox bindings
and driver were already merged in v6.13:
b2cf36e4a2 ("dt-bindings: mailbox: Add thead,th1520-mailbox bindings")
5d4d263e1c ("mailbox: Introduce support for T-head TH1520 Mailbox driver")
Signed-off-by: Drew Fustini <drew@pdp7.com>
* tag 'thead-dt-for-v6.14' of https://github.com/pdp7/linux:
riscv: dts: thead: Add mailbox node
In the schematics, the MCLK2 pin is shown as connected to CODEC_CLK32K,
which is derived from the same 32KHZ_PMIC clock as Bluetooth/WiFi and
GPS clocks. 32KHZ_PMIC is connected to the BTCLK pin, represented in
mainline as S2MPS11_CLK_BT.
Add the MCLK2 clock to the WM1811 codec clock property to properly
describe the hardware.
Signed-off-by: Artur Weber <aweber.kernel@gmail.com>
Link: https://lore.kernel.org/r/20240816-midas-audio-tab3-v2-4-48ee7f2293b3@gmail.com
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Renesas DTS updates for v6.14
- Add more serial (SCIF), power monitor, ADC, and sound support for
the RZ/G3S SoC and the RZ/G3S SMARC SoM and development board,
- Add support for the R-Car V4H ES3.0 (R8A779G3) SoC on the White Hawk
Single development board,
- Add display support for the R-Car V4M SoC and the Gray Hawk Single
development board,
- Add video capture support for the Gray Hawk Single development
board,
- Add initial support for the RZ/G3E (R9A09G047) SoC and the RZ/G3E
SMARC SoM and Carrier-II EVK development board,
- Add support for 5-port MATEnet on the Falcon Ethernet sub-board,
- Miscellaneous fixes and improvements.
* tag 'renesas-dts-for-v6.14-tag1' of https://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel: (33 commits)
arm64: dts: renesas: r9a09g047: Add I2C nodes
arm64: dts: renesas: rzg3s-smarc: Add sound card
arm64: dts: renesas: rzg3s-smarc: Enable SSI3
arm64: dts: renesas: Add da7212 audio codec node
arm64: dts: renesas: rzg3s-smarc-som: Add versa3 clock generator node
arm64: dts: renesas: r9a08g045: Add SSI nodes
arm64: dts: renesas: rzg3s-smarc-som: Enable ADC
arm64: dts: renesas: r9a08g045: Add ADC node
arm64: dts: renesas: Add initial device tree for RZ/G3E SMARC EVK board
arm64: dts: renesas: Add initial support for RZ/G3E SMARC SoM
arm64: dts: renesas: r9a09g047: Add OPP table
arm64: dts: renesas: Add initial DTSI for RZ/G3E SoC
arm64: dts: renesas: falcon-ethernet: Describe PHYs connected on the breakout board
arm64: dts: renesas: r8a779a0: Remove address- and size-cells from AVB[1-5]
dt-bindings: clock: renesas: Document RZ/G3E SoC CPG
dt-bindings: soc: renesas: Document RZ/G3E SMARC SoM and Carrier-II EVK
dt-bindings: soc: renesas: Document Renesas RZ/G3E SoC variants
arm64: dts: renesas: gray-hawk-single: Add video capture support
arm64: dts: renesas: gray-hawk-single: Add DisplayPort support
arm64: dts: renesas: r8a779h0: Add display support
...
Link: https://lore.kernel.org/r/cover.1734689803.git.geert+renesas@glider.be
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
STM32 DT for v6.14, round 1
Highlights:
----------
- MPU:
- STM32MP13:
- Populate all timer counter nodes in Soc file.
- Enable counter (timers) on stm32mp135f-dk.
- DH core: increase CPU voltage to fit with STM32MP135F datasheet.
- STMP32MP15:
- Populate all timer counter nodes in Soc file.
- Enable counter (timers) on stm32mp15 EV1 and DK boards.
- OCTAVO:
- LXA-TAC (gen1/2): disable RTC, update aliases and
adjust USB gadget.
- Add LXA-TAC gen3 based on OSD32MP153x SIP:
STMP32MP153, RAM, PMIC.
- DH: minor fixes.
- STM32MP25:
- Enable imx335/CSI/DCMIPP pipeline on stm32mp257f-ev1.
- Add I2S, SAI, SPDIFRX supports.
- Add and enable COMBOPHY on stm32mp257f-ev1. Combophy is used
by PCIe and USB3.
* tag 'stm32-dt-for-v6.14-1' of https://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32: (23 commits)
arm64: dts: st: enable imx335/csi/dcmipp pipeline on stm32mp257f-ev1
arm64: dts: st: add csi & dcmipp node in stm32mp25
ARM: dts: stm32: Swap USART3 and UART8 alias on STM32MP15xx DHCOM SoM
ARM: dts: stm32: add counter subnodes on stm32mp157 dk boards
ARM: dts: stm32: add counter subnodes on stm32mp157c-ev1
ARM: dts: stm32: add counter subnodes on stm32mp135f-dk
ARM: dts: stm32: populate all timer counter nodes on stm32mp15
ARM: dts: stm32: populate all timer counter nodes on stm32mp13
ARM: dts: stm32: lxa-tac: Add support for generation 3 devices
ARM: dts: stm32: lxa-tac: move adc and gpio{e,g} to gen{1,2} boards
dt-bindings: arm: stm32: add compatible strings for Linux Automation LXA TAC gen 3
ARM: dts: stm32: lxa-tac: adjust USB gadget fifo sizes for multi function
ARM: dts: stm32: lxa-tac: extend the alias table
ARM: dts: stm32: lxa-tac: disable the real time clock
ARM: dts: stm32: Fix IPCC EXTI declaration on stm32mp151
ARM: dts: stm32: Sort M24256E write-lockable page in DH STM32MP13xx DHCOR SoM DT
ARM: dts: stm32: Increase CPU core voltage on STM32MP13xx DHCOR SoM
ARM: dts: stm32: Deduplicate serial aliases and chosen node for STM32MP15xx DHCOM SoM
arm64: dts: st: Enable COMBOPHY on the stm32mp257f-ev1 board
arm64: dts: st: Add combophy node on stm32mp251
...
Link: https://lore.kernel.org/r/7ffcca65-3953-413a-bcf3-0702a6b0518b@foss.st.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Enable the camera pipeline with a imx335 sensor connected to the
dcmipp via the csi interface.
Signed-off-by: Alain Volmat <alain.volmat@foss.st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
Add nodes describing the csi and dcmipp controllers handling the
camera pipeline on the stm32mp25x.
Signed-off-by: Alain Volmat <alain.volmat@foss.st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
Swap USART3 and UART8 aliases on STM32MP15xx DHCOM SoM,
make sure UART8 is listed first, USART3 second, because
the UART8 is labeled as UART2 on the SoM pinout, while
USART3 is labeled as UART3 on the SoM pinout.
Fixes: 34e0c7847d ("ARM: dts: stm32: Add DH Electronics DHCOM STM32MP1 SoM and PDK2 board")
Signed-off-by: Marek Vasut <marex@denx.de>
Reviewed-by: Christoph Niedermaier <cniedermaier@dh-electronics.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
Enable the counter nodes without dedicated pins. With such configuration,
the counter interface can be used on internal clock to generate events.
Signed-off-by: Fabrice Gasnier <fabrice.gasnier@foss.st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
Enable the counter nodes without dedicated pins. With such configuration,
the counter interface can be used on internal clock to generate events.
Signed-off-by: Fabrice Gasnier <fabrice.gasnier@foss.st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
Enable the counter nodes without dedicated pins. With such configuration,
the counter interface can be used on internal clock to generate events.
Signed-off-by: Fabrice Gasnier <fabrice.gasnier@foss.st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
Renesas RZ/G3E DT Binding Definitions
DT bindings and binding definitions for the Renesas RZ/G3E (R9A09G047)
SoC, shared by driver and DT source files.
The debug serial of the RZ/G3S is SCIF0 which is routed on the Renesas
RZ SMARC Carrier II board on the SER3_UART. Use serial3 alias for it for
better hardware description. Along with it, the chosen properties were
moved to the device tree corresponding to the RZ SMARC Carrier II board.
Fixes: adb4f0c569 ("arm64: dts: renesas: Add initial support for RZ/G3S SMARC SoM")
Fixes: d1ae4200bb ("arm64: dts: renesas: Add initial device tree for RZ SMARC Carrier-II Board")
Signed-off-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/20241115134401.3893008-6-claudiu.beznea.uj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
